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Length: 3484 (0xd9c) Types: TextFile Names: »COMMON_DECLS.S«
└─⟦e0c43619c⟧ Bits:30005797 CR80 Disc pack ( Vol:FNJ1 861029/EC CR80 S/W Package II+III+IV+V+VII ) └─ ⟦this⟧ »CSP007_V0501.D!CSS7000.D!COMMON_DECLS.S«
%LIST %LIST %LIST "----------------------------------------------------------------------- " " MODULE NAME: Test Program Environment " MODULE ID NBR: 7000 " MODULE VERSION: 03 " MODULE RELEASE: 01 " MODULE TYPE: prefix " SPECIFICATIONS: none " AUTHOR/DATE: JAS/850710 " DELIVERABLE: yes " SOURCE LANGUAGE: SWELL " COMPILE COMPUTER: CR80 " TARGET COMPUTER: CR80 " OPERATING SYSTEM: none/AMOS " "----------------------------------------------------------------------- " " CHANGE RECORD " " VERSION RELEASE AUTHOR/DATE DESCRIPTION OF CHANGE " ------- ------- ----------- --------------------- " " 01 04 OLO/030685 local_action_cause extended with " bus_switch and semreg_timeout. " 02 01 PHF/850624 TPE version and release update " 03 01 JAS/850710 TPE version and release update " "----------------------------------------------------------------------- %NOLIST %NOLIST %NOLIST "======================================================================= " " Standard Declarations " "======================================================================= const tpe_version = 3; tpe_release = 1; nil = #FFFF; null = 0; etx = 3; cr = 13; nl = 10; sp = 32; context_addr = -2; V24_interrupt_id = #3D; RTC_interrupt_id = #3E; Power_interrupt_id = #3F; type boolean = ( false, true ); fail_pass = ( fail, pass ); done_forbidden = ( done, forbidden ); TPE_variant = ( offline_TPE, online_TPE ); mx_step_type = ( no_step, mx_step_1, mx_step_2 ); psw_bits = ( cpu_state_bit, trace_bit, user_data_map_bit_0, user_data_map_bit_1, C_flag, V_flag, S_flag, Z_flag, cpu_number_bit_0, cpu_number_bit_1, cpu_number_bit_2, local_interrupt_bit, alt_instr_set_bit, cache_active_bit, cpu_io_mask_bit, timer_mask_bit ); local_action_cause = ( fast_timer, illegal_instruction, parityerror, timeout, bound_violation, trace_interrupt, non_maskable_interrupt, emergency_action, NMI_executed, bus_switch, semreg_timeout ); cpu_context = record level : integer; bound : integer; registers : array [0..7] of integer; base : integer; user_map : integer; prog : integer; prpc : integer; timer : integer; psw : integer; link_base : integer; link_data_page : integer; local_action_return : integer; local_action_cause : integer; iv : integer; timer_preset : integer; end; time_record = record year : integer; month : integer; day : integer; hour : integer; minute : integer; second : integer; end; message_type = ( normal_mess, warning_mess, error_mess ); «a5»