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⟦b0e2a62f7⟧ TextFile

    Length: 8327 (0x2087)
    Types: TextFile
    Names: »HWINIT.SRC«

Derivation

└─⟦af81bc460⟧ Bits:30005550 8" CR80 Floppy CR80FD_0034 ( MATRIX Source and Abs-files )
└─⟦af81bc460⟧ Intel_ISIS_II
    └─ ⟦this⟧ »HWINIT.SRC«

TextFile

	CSEG\r
******* ADDRESSES OF INTERRUPTROUTINES ****************************************\r
; CTC INTERRUPT\r
\r
	PUBLIC	ICTC,HWINIT\r
	EXTRN	TQMMON,RECOV\r
\r
ICTC:	DW	TQMMON		;CH. 0 (TQM INTERRUPT TIMER)\r
	DW	0		;CH. 1 (DUMMY INTERRUPT)\r
	DW	RECOV		;CH. 2 (FAULT RECOVERY INTERRUPT)\r
	DW	RECOV		;CH. 3 (DUMMY INTERRUPT)\r
;\r
;\r
;\r
	DW	RECOV		;DUMMY\r
	DW	RECOV		;DUMMY\r
	DW	RECOV		;DUMMY\r
	DW	RECOV		;DUMMY\r
;\r
; SIO INTERRUPT\r
\r
	EXTRN	TRXINT,RECINT\r
ISIO1:	DW	TRXINT		;SIO1 CH. 1, INT.0\r
	DW	MATEXT		;SIO1 CH. 1, INT.1\r
	DW	RECINT		;SIO1 CH. 1, INT.2\r
	DW	MATERR		;SIO1 CH. 1, INT.3\r
	DW	RECOV		;SIO1 CH. 0, INT.4\r
	DW	RECOV		;SIO1 CH. 0, INT.5\r
	DW	RECOV		;SIO1 CH. 0, INT.6\r
	DW	RECOV		;SIO1 CH. 0, INT.7\r
ISIO2:	DW	RECOV		;SIO2 CH. 3, INT.0\r
	DW	RECOV		;SIO2 CH. 3, INT.1\r
	DW	RECOV		;SIO2 CH. 3, INT.2\r
	DW	RECOV		;SIO2 CH. 3, INT.3\r
	DW	RECOV		;SIO2 CH. 2, INT.4\r
	DW	RECOV		;SIO2 CH. 2, INT.5\r
	DW	RECOV		;SIO2 CH. 2, INT.6\r
	DW	RECOV		;SIO2 CH. 2, INT.7\r
;\r
;\r
******* HARDWARE INITIALIZATION **********************************************\r
\r
ACOUNT:	DEFL	080H		; PORT ADDRESS ON CPU (COUNTER)\r
ACTC:	DEFL	0B0H		; PORT ADDRESS ON CPU (CTC)\r
APIO:	DEFL	0C0H		; PORT ADDRESS ON CPU (PIO)\r
ASIO1:	DEFL	0E0H		; PORT ADDRESS ON CPU (SIO1)\r
ASIO2:	DEFL	0F0H		; PORT ADDRESS ON CPU (SIO2)\r
\r
HWINIT:				;INITIALIZE CTC, CH.0 FOR TQM-TIMER\r
CTCINI:	LD	BC,ACTC\r
	LD	A,0A7H		;LOAD CONTROL WORD, CH.0:\r
	OUT	(C),A		;RESET,LOAD TIME CONST.,\r
				;INT. TRIGGER, (INT. CLK. 4Mhz.),\r
				;NEG. SLOPE, PRESCALE 256X125 (8 msec.),\r
				;TIMER MODE, INTERRUPT ENABLED.\r
	LD	A,125		;\r
	OUT	(C),A		;\r
;\r
				;INITIALIZE CTC, CH. 2 FOR FAULT RECOVERY INTERRUPT\r
	LD	BC,ACTC+2	;\r
	LD	A,05		;LOAD CONTROL WORD, CH. 2\r
	OUT	(C),A		;NO RESET, LOAD TIME CONST.,\r
				;INT. TRIGGER, (INT. CLK. 4Mhz.),\r
				;NEG. SLOPE, PRESCALE 16X10 (appr. 40 usec.)\r
				;TIMER MODE, INTERRUPT DISABLED.\r
	LD	A,10		;\r
	OUT	(C),A		;\r
;\r
;\r
;\r
;===========================\r
; USERS H/W INITIALIZATION\r
;===========================\r
\r
\r
;COUNTER'S :\r
\r
CNTINI:	LD	BC,ACOUNT+3		;ADDRESS OF CONTROL REGISTER\r
	LD	A,36H			;SELECT MODE 3,LSB,MSB,SC0\r
	OUT	(C),A\r
	LD	A,76H			;SELECT MODE 3,LSB,MSB,SC1\r
	OUT	(C),A			;\r
	LD	A,0B6H			;SELECT MODE 3,LSB,MSB,SC2\r
	OUT	(C),A			;\r
	LD	DE,34H			;COMMON SCALE VALUE\r
	LD	BC,ACOUNT		;COUNTER #0\r
	OUT	(C),E			;SCALE VALUE TO REG. 0\r
	OUT	(C),D\r
	INC	BC			;COUNTER #1\r
	OUT	(C),E			;SCALE VALUE TO REG. 1\r
	OUT	(C),D			;\r
	INC	BC			;COUNTER #2\r
	OUT	(C),E			;SCALE VALUE TO REG. 2\r
	OUT	(C),D			;\r
;\r
;\r
;\r
;SIO'S :\r
;\r
SIOINI:	LD	BC,ASIO1+3		;SIO COMMAND ADDRESS, SIO1, CH.B\r
	LD	DE,0018H                ;2xRESET SIO1,CH.B\r
	OUT	(C),D\r
	OUT	(C),E\r
	OUT	(C),D\r
	OUT	(C),E\r
	LD	DE,044FH		;REG. 4, PAR. EVEN, 2 STOP BITS, x16 CLK. MODE\r
	OUT	(C),D\r
	OUT	(C),E\r
	LD	DE,0341H		;REG. 3, REC. EN., 7 BITS/CHAR.\r
	OUT	(C),D\r
	OUT	(C),E\r
	LD	DE,0528H		;REG. 5, TRX. EN., 7 BITS/CHAR.\r
	OUT	(C),D\r
	OUT	(C),E\r
	LD	DE,0116H		;REG. 1, TRX.,REC INT. ENABLE, STATUS AFFECTS VECTOR.\r
	OUT	(C),D\r
	OUT	(C),E\r
;\r
	DEC	BC			;RESET THE 3 UNUSED SIO CHANNELS:\r
	LD	DE,0018H		;\r
	OUT	(C),D			;SIO1,CH.A\r
	OUT	(C),E			;\r
	LD	BC,ASIO2+2		;\r
	OUT	(C),D			;SIO2,CH.A\r
	OUT	(C),E			;\r
	INC	BC			;\r
	OUT	(C),D			;SIO2,CH.B\r
	OUT	(C),E			;\r
;\r
;\r
;PIO'S :\r
;\r
	JR	PIOINI\r
DIRECT:	DB	80H			;(0013H)\r
	DB	80H			;(0017H) PORTS 25,26,27,28\r
	DB	0EH			;(0015H)\r
\r
	DB	80H			;(001BH)\r
	DB	80H			;(001FH) PORTS 29,30,31,32\r
	DB	0EH			;(001DH)\r
\r
	DB	80H			;(0023H)\r
	DB	80H			;(0027H) PORTS 2,24,33,34\r
	DB	0EH			;(0025H)\r
\r
	DB	9BH			;(002BH)\r
	DB	90H			;(002FH) PORTS 1,23,18,19\r
	DB	0F0H			;(002DH)\r
\r
	DB	80H			;(0033H)\r
	DB	80H			;(0037H) PORTS 4,6,8,10\r
	DB	0EH			;(0035H)\r
\r
	DB	9BH			;(003BH)\r
	DB	90H			;(003FH) PORTS 3,5,7,9\r
	DB	0F0H			;(003DH)\r
\r
	DB	80H			;(0043H)\r
	DB	80H			;(0047H) PORTS 12,14,44,48\r
	DB	0EH			;(0045H)\r
\r
	DB	9BH			;(004BH)\r
	DB	90H			;(004FH) PORTS 11,13,45\r
	DB	0F0H			;(004DH)\r
\r
EXTEND:	DB	9BH			;(4013H)\r
	DB	90H			;(4017H) PORTS 21,69,70,71\r
	DB	0F0H			;(4015H)\r
\r
	DB	9BH			;(401BH)\r
	DB	90H			;(401FH) PORTS 72,73,74,75\r
	DB	0F0H			;(401DH)\r
\r
EXT1:	DB	9BH			;(402BH)\r
	DB	90H			;(402FH) PORTS 67,50,52,54\r
	DB	0F0H			;(402DH)\r
\r
EXT2:	DB	80H			;(4043H)\r
	DB	80H			;(4047H) PORTS 42,46,22,63\r
	DB	0EH			;(4045H)\r
\r
	DB	9BH			;(404BH)\r
	DB	90H			;(404FH) PORTS 43,15,16,17\r
	DB	0F0H			;(404DH)\r
\r
	DB	9BH			;(4053H)\r
	DB	90H			;(4057H) PORTS 56,58,60,62\r
	DB	0F0H			;(4055H)\r
\r
\r
PLOOP:	LD	D,(HL)			;\r
	OUT	(C),D			;LOAD CTR. WORD 1\r
	INC	BC			;\r
	INC	BC			;\r
	INC	BC			;\r
	INC	BC			;\r
	INC	HL			;\r
	LD	D,(HL)			;\r
	OUT	(C),D			;LOAD CTR. WORD 2\r
	DEC	BC			;\r
	DEC	BC			;\r
	INC	HL			;\r
	LD	D,(HL)			;\r
	OUT	(C),D			;LOAD CTR. WORD 3\r
	INC	BC			;SET POINTERS TO NEXT MODULE\r
	INC	BC			;\r
	INC	BC			;\r
	INC	BC			;\r
	INC	BC			;\r
	INC	BC			;\r
	INC	HL			;\r
	DEC	A			;TEST IF PRESET MODULE WAS THE LAST IN BLOCK\r
	JR	NZ,PLOOP		;IF NO THEN PRESET NEXT MODULE IN BLOCK\r
					;ELSE\r
	RET				;EXIT SUBROUTINE\r
;\r
PIOINI:	LD	A,8			;INITIALIZE ALL PORTS IN DIRECT ADDRESSING FIELD\r
	LD	BC,0013H\r
	LD	HL,DIRECT\r
	CALL	PLOOP\r
	LD	A,2			;INITIALIZE ALL PORTS IN EXTENDED ADDRESSING FIELD\r
	LD	BC,4013H\r
	LD	HL,EXTEND\r
	CALL	PLOOP\r
	LD	A,1\r
	LD	BC,402BH\r
	LD	HL,EXT1\r
	CALL	PLOOP\r
	LD	A,3\r
	LD	BC,4043H\r
	LD	HL,EXT2\r
	CALL	PLOOP\r
	JR	PIOCNT\r
					;REM.!! ALL PORTS NOT USED\r
					;ARE INITIALIZED AS OUTPUTS\r
\r
\r
\r
INIT1	DB	80H			;(4023H)\r
	DB	80H			;(4027H) PORTS 20,40,41,68\r
	DB	0EH			;(4025H)\r
\r
	DB	80H			;(4033H)\r
	DB	80H			;(4037H) PORTS 49,51,53,35\r
	DB	0EH			;(4035H)\r
\r
	DB	80H			;(403BH)\r
	DB	80H			;(403FH) PORTS 36,37,38,39\r
	DB	0EH			;(403DH)\r
\r
      	DB	89H			;(405BH)\r
	DB	90H			;(405FH) PORTS 55,57,64,66\r
	DB	0F6H			;(405DH)\r
\r
	DB	80H			;(4063H)\r
	DB	80H			;(4067H) PORTS 59,61,63,65\r
	DB	0EH			;(4065H)\r
\r
\r
\r
PIOOUT:	LD	A,(HL)\r
	OUT	(C),A		;LOAD CTR. WORD 1\r
	INC	BC\r
	INC	BC\r
	INC	BC\r
	INC	BC\r
	INC	HL\r
	LD	A,(HL)\r
	OUT	(C),A		;LOAD CTR. WORD 2\r
	DEC	BC\r
	DEC	BC\r
	DEC	BC\r
	DEC	BC\r
	DEC	BC\r
	DEC	BC\r
	DEC	BC\r
	LD	A,0FFH\r
	OUT	(C),A		;NEUTRALIZE OUTPUT PORT 0\r
	INC	BC\r
	OUT	(C),A		;NEUTRALIZE OUTPUT PORT 1\r
	INC	BC\r
	LD	D,A\r
	LD	A,(HL)\r
	CP	90H\r
	JR	Z,PIONXT	;IF ALL PIO'S ARE OUTPUT PORTS THEN\r
	LD	A,D		;BEGIN\r
	OUT	(C),A		;  NEUTRALIZE OUTPUT PORT 2\r
	INC	BC		;\r
	INC	BC		;\r
	OUT	(C),A		;  NEUTRALIZE OUTPUT PORT 4\r
	DEC	BC		;\r
	DEC	BC		;END\r
PIONXT:	INC	BC\r
	INC	BC\r
	INC	BC\r
	INC	HL\r
	LD	A,(HL)\r
	OUT	(C),A		;LOAD CTR. WORD 3\r
	INC	HL\r
	RET\r
\r
\r
PIOCNT:	LD	HL,INIT1\r
	LD	BC,4023H\r
	CALL	PIOOUT\r
	LD	BC,4033H\r
	CALL	PIOOUT\r
	LD	BC,403BH\r
	CALL	PIOOUT\r
	LD	BC,405BH\r
	CALL	PIOOUT\r
	LD	BC,4063H\r
	CALL	PIOOUT\r
\r
;	LINK BUFFERS IN INTERNAL EMPTY BUFFER QUEUE\r
;	----------------------------------\r
	EXTRN	SUBENQ\r
;\r
BUFLIN:	LD	A,100\r
	LD	DE,BUFF01\r
	LD	HL,QEMPTY\r
LOOP:	PUSH	AF\r
	PUSH	DE\r
	PUSH	HL\r
	CALL	SUBENQ\r
	POP	HL\r
	POP	DE\r
	POP	AF\r
	DEC	A\r
	JR	Z,MARK\r
	LD	BC,5\r
	EX	DE,HL\r
	ADD	HL,BC\r
	EX	DE,HL\r
	JR	LOOP\r
\r
*****************************************************************************\r
*****************************************************************************\r
\r
	EXTRN	CONDIT\r
\r
\r
MARK:	LD	HL,CONDIT\r
	LD	A,44H\r
	LD	(HL),A		;SET BUSY = 1 AND INITIALIZATION IN PROGRESS FLAG\r
	RET\r
\r
\r
MATEXT:	EX	AF,AF'\r
	EXX\r
	LD	C,ASIO1+2\r
	LD	DE,0030H\r
	OUT	(C),D\r
	OUT	(C),E\r
	EXX\r
	EX	AF,AF'\r
	EI\r
	RETI\r
\r
MATERR:	EX	AF,AF'\r
	EXX\r
	LD	C,ASIO1+2\r
	LD	DE,0010H\r
	OUT	(C),D\r
	OUT	(C),E\r
	EXX\r
	EX	AF,AF'\r
	EI\r
	RETI\r
\r
\r
	DSEG\r
\r
	PUBLIC	QEMPTY,QXI,QIX,QKI,QIK,QSK,QKT,QXT\r
	PUBLIC	QKE,QEK,QET,QEA,QEV,QME,QTEMP,PQH5,PQH8\r
	PUBLIC	QAQEST,QUEST,BUFF01\r
\r
QEMPTY:	DS	8		;EMPTY BUFFER QUEUE\r
QXI	DS	8		;CR80 MOD. --> INVESTIGATE MOD.\r
QIX	DS	8		;INVESTIGATE MOD. --> CR80 MOD.\r
QKI	DS	8		;KEYBORD MOD. --> INVESTIGATE MOD.\r
QIK	DS	8		;INVESTIGATE MOD. --> KEYBORD MOD.\r
QSK	DS	8		;SCAN PROCESS --> KEYBORD PROCESS\r
QKE	DS	8		;ON AIR SCAN MOD./KEYBORD MOD. --> EXECUTE MOD.\r
QEK	DS	8		;EXECUTE MOD. --> KEYBORD MOD.\r
QEA	DS	8		;EXECUTE MOD. --> TFK MATRIX MOD.\r
QEV	DS	8		;EXECUTE MOD. --> I/O MATRIX MOD.\r
QME	DS	8		;TFK MATRIX MOD./I/O MATRIX MOD. --> EXEC MOD.\r
QET	DS	8		;EXECUTE MOD. --> STATUS TRANSM.PROCESS\r
QTEMP	DS	8		;EXECUTE TEMPORARY QUEUE\r
QXT	DS	8		;CR80 PROCESS --> STATUS TRANSMITTING PROCESS\r
QKT	DS	8		;KEYBOARD MODULE --> STATUS TRANSM. PROCESS\r
QAQEST	DS	8		;\r
QUEST	DS	8		;\r
PQH5	DS	8		;CR80 PROCESS Q-HEAD\r
PQH8	DS	8		;STATUS TRANSMITTING PROCESS Q-HEAD\r
;\r
BUFF01:	DS	500		;INTERNAL BUFFERS\r
	END\r