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⟦4046f32de⟧ Wang Wps File
Length: 4319 (0x10df)
Types: Wang Wps File
Notes: CPS/TCM/032
Names: »4281A «
Derivation
└─⟦e9ca1be93⟧ Bits:30006183 8" Wang WCS floppy, CR 0382A
└─ ⟦this⟧ »4281A «
WangText
…02…CPS/TCM/032
…02…JRD/831114…02……02…
MAIN BUS TERMINATION
…02……02…CAMPS
T̲A̲B̲L̲E̲ ̲O̲F̲ ̲C̲O̲N̲T̲E̲N̲T̲S̲
1. SCOPE
2. CONFIGURATION ITEM RELEASE RECORD
3. APPLICATION
3.1 Strap Setting
3.2 Installation
4. SPECIFICATIONS
4.1 Signals and Line Specifications
4.2 Power Requirement
4.3 Mechanical Specification
4.4 Input/Output Connections
5. PARTS LIST
6. DRAWINGS
1. S̲C̲O̲P̲E̲
This document describes the use and function of the
Main Bus Termination Board, P/N 4.04192-01, which is
a dedicated CAMPS module.
The difference from the basic Main Bus Termination
Board, P/N 4.04192-00, is a modification implemented
by ECO 814, which makes addressing of 2 Mega Word of
memory possible.
3. A̲P̲P̲L̲I̲C̲A̲T̲I̲O̲N̲
3.1 S̲t̲r̲a̲p̲ ̲S̲e̲t̲t̲i̲n̲g̲
The MBT-1 is a modified MBT module and is consequently
provided with the two straps SR1 and SR2. Both SR1
and SR2 must be mounted in pos. B.
3.2 I̲n̲s̲t̲a̲l̲l̲a̲t̲i̲o̲n̲
The MBT-1 is designed to be installed in the two right
most slots seen from the rear side in the PU-crate,
P/N 4.07015-03.
4. S̲P̲E̲C̲I̲F̲I̲C̲A̲T̲I̲O̲N̲S̲
4.1 S̲i̲g̲n̲a̲l̲ ̲a̲n̲d̲ ̲L̲i̲n̲e̲ ̲S̲p̲e̲c̲i̲f̲i̲c̲a̲t̲i̲o̲n̲s̲
The module does perform proper termination and voltage
limitation of the different types of main bus signals
of the CR80 computer.
The signal lines: DA (15:0), UP, LP
AD (19:0)
LSO, LS1
R/W
are pulled up to a logic "1" level when the lines are
tri-stated.
The "0" levels will never be less than -0,1V
The "1" levels will never be greater than +4,1V.
See fig. 4.1-1 and 4.1-4.
The signal lines: MC, TRQ, RS, AEM(L) are terminated
to the ground and supply level.
The quiecent voltage of the signal lines is approx.
2.5V.
See fig. 4.1-2.
The clock signals 01, 01 are terminated to ground level
only.
See fig. 4.1-3
Furthermore the module contains the inverter which
is a vital function of the 2M Word memory addressing
capability.
See fig. 4.1-5.
Fig. 4.1-5
Address logic, using the tri-state facility of the
54S241 bus driver.
Drive capability: I…0f…OL sink max…0e… = 38 m…0f…A…0e….
I…0f…OH source Max…0e…= 1,3 m…0f…A…0e…
Output enable time to low level …0f…=…0e… 38 nsec.
Output disable time from low level …0f…=…0e… 32 nsec.
4.2 P̲o̲w̲e̲r̲ ̲R̲e̲q̲u̲i̲r̲e̲m̲e̲n̲t̲
Supply voltage V…0f…CC P.U.…0e… = 5.2V
V…0f…CC C.U…0e… = 5,45V See section
3.1
I…0f…CC peak…0e… = 430 mA
4.3 M̲e̲c̲h̲a̲n̲i̲c̲a̲l̲ ̲S̲p̲e̲c̲i̲f̲i̲c̲a̲t̲i̲o̲n̲
The Main Bus termination module is designed for use
in the two right most special rear slots in PU-crate
P/N 4.07015-03. It shall be noted that component side
(normally equal to s̲i̲d̲e̲ ̲B̲ in art-work aspect and connector
assignment on standard M-Modules) is equal to connector
side A.
Length = 280 mm
Height = 121 mm
Width = 17.1 mm
Weight = 0,16 kg.
4.4 I̲n̲p̲u̲t̲/̲O̲u̲t̲p̲u̲t̲ ̲C̲o̲n̲n̲e̲c̲t̲i̲o̲n̲s̲
Rear View
̲B̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲A̲ ̲
gnd 43 gnd
gnd 42 gnd
+5V 41 +5V
+5V 40 +5V
gnd 39 gnd
gnd 38 [2
gnd 37 AEM(L)
AD19 36 AD18
gnd 35 [1
gnd 34 R/W(L/H)
gnd 33 AEO(L)
gnd 32 AD23
gnd 31 TRQ(L)
gnd 30 RS(L)
MC(H) 29 AE1(L)
LP 28 UP
gnd 27 gnd
LS1 26 LSO
17 25 16
15 24 14
13 23 12
11 22 10
ADDRESS 9 21 8 ADDRESS
(AD) gnd 20 gnd (AD)
7 19 6
5 18 4
3 17 2
1 16 0
gnd 15 gnd
14
gnd 13 gnd
12
11
gnd 10 gnd
15 9 14
13 8 12
11 7 10
DATA (DA) 9 6
8
DATA
(DA)
7 5 6
5 4 4
3 3 2
1 2 0
gnd 1 gnd
F̲I̲G̲U̲R̲E̲ ̲4̲.̲4̲-̲1̲ ̲I̲N̲P̲U̲T̲/̲O̲U̲T̲P̲U̲T̲ ̲C̲O̲N̲N̲E̲C̲T̲I̲O̲N̲S̲
