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Names: »~ORPHAN42.11«
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WangText
LKSAA - VOLUME II Issue 1.4
Part 1 SYS/84-04.24
TECHNICAL PROPOSAL Page
2.7 S̲E̲C̲U̲R̲I̲T̲Y̲
2.7.1 S̲e̲c̲u̲r̲i̲t̲y̲ ̲A̲s̲s̲u̲r̲a̲n̲c̲e̲ ̲V̲i̲a̲ ̲H̲a̲r̲d̲w̲a̲r̲e̲
2.7.1.1 P̲r̲i̲n̲c̲i̲p̲a̲l̲ ̲H̲a̲r̲d̲w̲a̲r̲e̲ ̲A̲r̲c̲h̲i̲t̲e̲c̲t̲u̲r̲e̲
The principal hardware architecture is shown on figure
2.7.1-1. The principal cmponents are:
- PU RAM
The main memory of the system. It is only accessible
by the CPU's and only via the MAP. The PU RAM consists
of up to 2M words of 16 bits.
- CPU
Up to 5 central processes units.
CPU's may access PU RAM, CU RAM andPeripheral Processors
via MAP.
- Peripheral Module
A peripheral module controls a device or a set
of similar devices (disks, communication lines
etc.)
It consists of CU RAM and a Peripheral Processor.
- CU RAM
Random access memory in a
