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⟦73e38896f⟧ Wang Wps File
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Names: »~ORPHAN66.00«
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WangText
…05……00……00……00……00…B…02……00……00…B
A…0c…A…06…@…0b…@…02…@
?…0b…?…0f…?…05…?…06…>…0e…>…02…>
>…06…=…0e…=…02…=…07…<…0f……86…1 …02… …02… …02…
3198A
ACCESS SYS/1983-01-25
PART II - TECHNICAL DATA Page #
T̲A̲B̲L̲E̲ ̲O̲F̲ ̲C̲O̲N̲T̲E̲N̲T̲S̲
4.2.1 Communication Software .................
4.2.1.1 Local Area Network .................
4.2.1.1.1 Network Topology ...............
4.2.1.1.2 Network Configuration ..........
4.2.1.1.3 Functional Descrption .........
4.2.1.1.4 TDX Bus Data Transfer ..........
4.2.1.1.5 TDX Bus Host Interface (STI/TIA)
4.2.1.1.6 TDX Bus Terminal Adapter .......
4.2.1.2 Long-Haul Communication Network
Interface .........................
4.2.2.1 Operating System ...................
4.2.2.1.1 Overview of DAMOS Operational
Software .......................
4.2.2.1.2 Security .......................
4.2.2.1.3 Kernl .........................
4.2.2.1.3.1 Resource Management ........
4.2.2.1.3.2 Process Management
4.2.2.1.3.3 Memory Management
4.2.2.1.3.4 Process Communication ......
4.2.2.1.3.5 CPU Management ............
4.2.2.1.3.6 Processing Unit Management .
4.2.2.3.7 Transport Mechanisms ...........
4.2.2.3.7.1 Basic Transport Service ....
4.2.2.3.7.2 Basic Datagram Service .....
4.2.2.1.4 DAMOS Inpt/Output .............
4.2.2.1.5 File Management System .........
4.2.2.1.5.1 Device and Volume Handling .
4.2.2.1.5.2 Directories ................
4.2.2.1.5.3 Files ......................
4.22.1.5.3.1 File Types .............
4.2.2.1.5.3.2 File Commands ..........
4.2.2.1.5.4 User Handling ..............
4.2.2.1.5.5 Disk Integrity .............
4.2.2.1.5.5.1 Security ...............
4.2.2.1.5.5.2 Redundant Disks ........
4.2.2.1.5.5.3 Bad Sectors ............
4.2.2.1.5.6 Access Methods .............
4.2.2.1.5.6.1 Unstructured Acces ....
4.2.2.1.5.6.2 Indexed Sequential
Access .................
4.2.2.1.6 Magnetic Tape File Management
System .........................
4.2.2.1.6.1 Device functions ...........
4.2.2.1.6.2 Volume functions ...........
4.2.2.1.6.3 File functions .............
42.2.1.6.4 Record functions ...........
4.2.2.1.7 Terminal Management System .....
4.2.2.1.7.1 Transfer of I/O Data .......
4.2.2.1.7.1.1 File Mode ..............
4.2.2.1.7.1.2 Communication Mode .....
4.2.2.1.7.2 User Handling ..............
4.2.2.1.7.3 Hardware Categories ........
4.2.2.1.7.3.1 Terminal Controllers ...
4.2.2.1.7.3.2 Lines ..................
4.2.2.1.7.3.3 Units ..................
4.2.2.1.8 System Initialization ..........
4.2.2.1.9 Highlevel Operating System
(HIOS) .......................
4.2.2.1.10 System Generation Software ...
.2.2.1.11 Diagnostic Programs ..........
4.2.2.1.11.1 Off-line Diagnostic
Programs ..................
4.2.2.1.11.2 On-Line Diagnostic
Programs ..................
4.2.2.3 Language Processors ................
4.2.2.4 General Utilities ..................
4.2.2.10 Statistics .......................
4.2.2.11 Optical Character Reader ......... …86…1
…02… …02… …02… …02…
4.2.1 C̲o̲m̲m̲u̲n̲i̲c̲a̲t̲i̲o̲n̲ ̲s̲o̲f̲t̲w̲a̲r̲e̲
4.2.1.1 L̲o̲c̲a̲l̲ ̲A̲r̲e̲a̲ ̲N̲e̲t̲w̲o̲r̲k̲
4.2.1.1.1 N̲e̲t̲w̲o̲r̲k̲ ̲T̲o̲p̲o̲l̲o̲g̲y̲
The Local Area Network topology is based on a star
mesk of individually dualized, time diision multiplexed
TDX buses. Each TDX bus is via a front-end processor
(STI) connected to a dualized CR80 host computer. Communica-
tion between individual TDX buses is established through
the connected CR80 host computer.
The TDX local network esign complies with the International
Standards Organization's seven-level Open Systems Interconnection
Reference Model. This facilitates the integration of
the TDX-net with networks supplied by other manufacturers.
4.2.1.1.2 N̲e̲t̲w̲o̲r̲k̲ ̲C̲o̲n̲f̲i̲g̲u̲r̲a̲t̲i̲n̲
Each TDX bus configuration consists of:
- a double twisted pair cable (bus)
- a TDX-Controller
- up to 140 I/O devices
The I/O devices can be divided into:
- CR80 host interfaces (up to 12)
- serial link interfaces (up to 122)
Indiviual TDX buses are interconnected either through
mutual host computers or through CR80 host-to-host
suprabus.
4.2.1.1.3 F̲u̲n̲c̲t̲i̲o̲n̲a̲l̲ ̲D̲e̲s̲c̲r̲i̲p̲t̲i̲o̲n̲
A single or dualized TDX bus is monitored and controlled
by the TDX Controller which performs the following
tasks:
- Synchronize communication n the upper bus by inserting
a MUX-No. in the HDLC frame on the lower bus.
- Answer a bandwidth request and allocate bandwidth
according to the request.
- Poll and appended devices to collect diagnostic
information.
- Communicate with a Watchog (in a dualized TDX Controller
Configuration).
- Select one of two upper buses to optimize performance
in a dualized bus system.
The TDX Controller outputs a continous bitstream of
1.8432 Mbit/Sec. on the lower bus. This stream is organized
i frames of 288 bits each, 6400 per second.
All frames received from the "upper" bus are transmitted
on the "lower" bus delayed one frame. Only if the CRC
of a received frame is not correct or if the frame
is destined to Host No. 0 (the Controlleritself), the
frame will not be swapped to the transmitter buffer.
When a received frame is distined to host No. 0, it
is loaded to the controller processor which is managing
the Mux table. The received frame may contain a request
for a changed bandidth to a given TDX device (BW-request).
The synchronization is achieved by inserting as second
byte in the HDLC frame on the lower bus, a Device No.
taken from a Mux table that is scanned according to
the speed level assigned to each device of te TDX system.
Figure 4.2.1.1.3-1 TDX-Frame
All devices with their unique Device No. on the TDX-BUS
look at the Mux byte, and if it is identical to its
Device No., this device has the use of the upper bus,
to transmit data t the end of the frame on the lower
bus, provided that the lower bus CRC check shows no
errors. This ensures that only one device will transmit
on the upper bus at any time.
The bandwidth allocation is determined by the Mux table
which is changeale (dynamic). A request for a changed
bandwidth to a specified device received on the upper
bus is accepted if the system bandwidth is large enough
or reflected if the system bandwidth is too small.
The answer (ACK, NACK) is sent to the requesting evice,
when a free time slice occurs on the lower bus. The
dummy Device No.FF (which is inserted in the MUX table,
to allow the Controller access to the lower bus in
the following frame) has a minimum bandwidth on 100
bit/sec. giving a free time slt to answers at least
every 1.28 sec.
The diagnostic information is collected by polling
each device connected to the system. If an answer is
not received within 4 scans in the Mux table, a retransmission
is executed. After three requests not ansered, the
device is perceived as not connected to the system.
The upper bus switch-over feature is achieved by counting
errorfree received frames from the upper bus (both
frames destined to the controller and frames swapped
to the lower bus) eachtime the Mux table has been read
completely. If this count is less than 1:4 of the previous
count, the bus is switched. This implies that one device
may be removed every 1.28 sec. without changing buses,
but removing a number of devices instantly cuses a
switch of upper buses.
FIG. 4.2.1.1.2-1
TDX FRAME LAYOU…86…1 …02… …02… …02… …02…
4.2.1.1.4 T̲D̲X̲ ̲B̲u̲s̲ ̲D̲a̲t̲a̲ ̲T̲r̲a̲n̲s̲f̲e̲r̲
In the following is given an example of a data transfer
between devices on a TDX bus shown in figure 4.2.1.1.4-1.
Figure 42.1.1.4-1 TDX-bus
Let us suppose that device 3 wants to send some data
to device 1. The sequence of events is as follows.
T̲i̲m̲e̲ ̲X̲.̲ The controller inserts a '3' into the MUX
field of the frame currently passing through it.
T̲i̲m̲e̲ ̲X̲ ̲+̲ ̲1̲ ̲s̲l̲o̲t̲.̲ Deice 3 notices its own address (3)
as a MUX number on the lower bus, so it prepares itself
for transmission of a frame.
T̲i̲m̲e̲ ̲X̲ ̲+̲ ̲2̲ ̲s̲l̲o̲t̲s̲.̲ Device 3 generates and transmits
a frame containing 128 bits of useful data and a '1'
in the destination addess field. This frame is transmitted
on the upper bus. Meanwhile, as always, one frame is
being processed by the controller and another frame
is transmitted on the lower bus and is accepted by
the device that it is addressed to.
T̲i̲m̲e̲ ̲X̲ ̲+̲ ̲3̲ ̲s̲l̲o̲t̲s̲.̲ Data from device 3 has arrived at
the controller. The controller adds a MUX number to
the frame. This is a message to some other device that
means "you may tranmit in 2 slots' time". The destination
address (in this case: 1) remains in the frame. Timing
signals are also added.
T̲i̲m̲e̲ ̲X̲ ̲+̲ ̲4̲ ̲s̲l̲o̲t̲s̲.̲ All the devices look at the destination
field of the current frame on the lower bus. In this
example, device realises that this frame is for itself,
and accepts it. Various error checks are performed
by the device and if all is well it extracts the useful
data bits. If all is not well, it issues a special
frame (when it gets a chance via the MUX number mchanism)
to the controller. This frame requests device 3 to
re-transmit the data.
This sequence is illustrated in figure 4.2.1.1.4-2.
Note that the lower bus has continous transmission.
If no device has recently taken up its option to transmit,then
the controller "invents" a frame and sends it along
to a bogus device. Conversely, if a device tries to
send out frames more frequently than the MUX table
currently allows, it just has to wait. However, the
MUX table may be altered by the contoller if the device
makes a habit of trying to flood the bus. This mechanism
is the Dynamic Bandwidth Allocation mentioned previously.
DATA TRANSFER ON THE TDX BUS
Figure 4.2.1.1.4-2…86…1 …02… …02… …02… …02…
4.2.1.1.5 T̲D̲X̲ ̲B̲u̲s̲ ̲H̲o̲s̲t̲ ̲I̲n̲t̲e̲r̲f̲a̲c̲e̲ ̲(̲S̲T̲I̲/̲T̲I̲A̲)̲
In the range of TDX-devices the STI makes the high
performance end interfacing of a CR80 minicomputer
to the TDX-bus system.
The STI s a high bandwidth device which is able to
interface to other devices connected to the TDX-bus.
It may address 4096 logical lines through the TDX-system,
and each line may have bandwidth allocated individually.
The current implementation of STI-han
