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⟦8336b4ad5⟧ Wang Wps File
Length: 64170 (0xfaaa)
Types: Wang Wps File
Notes: CPS/TPR/005
Names: »1570A «
Derivation
└─⟦518101e25⟧ Bits:30005806 8" Wang WCS floppy, CR 0110A
└─ ⟦this⟧ »1570A «
WangText
…00……00……00……00……00…3…0a……00……00…3…0b…3…0f…3…02…3
3…06…2…09…2…0d…2…00…2
1…08…1…0b…1…00…1…02…1…05…0…08…0…0c…0…0f…0…02…0…06…/…0a…/…0f…/…02…/…06….…09….…0b….…0f….…01….
.…05…-…0a…-…0b…-…0c…-…0d…-…0e…-…0f…-…00…-…01…-…02…-
-…86…1 …02… …02… …02…
…02… CPS/TPR/005
…02… 820419…02……02…
DSMT (PROTOTYPE) HARDWARE TEST SPECIFICATION
AND PROCEDURES…02… 811218…02… CAMPS
A P P E N D I X A…01…*********************************
S̲y̲s̲t̲e̲m̲ ̲0̲ ̲C̲o̲n̲f̲i̲g̲u̲r̲a̲t̲i̲o̲n̲
1. Scope
2. Baseline Documentation
3. Integration Area Layout
4. Connectivity
5. Supplier/Equipment Specification
5.1 CR/ED
5.2 Control Data
5.3 Abacus Controls
5.4 Delta Data
5.5 Tracor
5.6 Electronic Enclosures
5.7 Captor Corp.
5.8 Versitron Inc.
5.9 Atlantic Research Corp.
5.10 Knud Wex]e
5.11 Multikomponent
5.12 H.R. Electronic
5.13 CR/SD
5.14 TBD
5.15 Spectrum
6. Configuration/Equipment Specification
6.1 Bay A-B-C
6.2 Bay D-E-F
6.3 Frequency Stabilizer Assembly
6.4 Remote TARE Assembly
6.5 Peripheral Equipment
6.6 Inter Unit Cable Assembly
7. H/W Configuration Description
7.1 Racks
7.2 Terminals
7.3 External Circuits
7.4 Connection of Terminals and External Circuits
1̲.̲ ̲ ̲S̲C̲O̲P̲E̲
The scope of this document is to establish a specification
of the equipment forming the CAMPS System 0 to be used
for the DSMT hardware acceptance test.
2̲.̲ ̲ ̲B̲A̲S̲E̲L̲I̲N̲E̲ ̲D̲O̲C̲U̲M̲E̲N̲T̲A̲T̲I̲O̲N̲
CAMPS Hardware Assembly Breakdown/Hardware Tree
CPS/SDS/017, Issue 1.
3̲.̲ ̲ ̲I̲N̲T̲E̲G̲R̲A̲T̲I̲O̲N̲ ̲A̲R̲E̲A̲ ̲L̲A̲Y̲O̲U̲T̲
Integration of System 0 and the subsequent DSMT hardware
acceptance test will take place in section E of the
integration area.
Overleaf is shown a layout of the system where the
25 VDUs and 9 MSPs are accommodated on three decks
of shelves. (MSPs on the lower shelves).
INTEGRATION AREA E WITH SYSTEM 0 INSTALLED…86…1 …02… …02… …02… …02…
4. C̲o̲n̲n̲e̲c̲t̲i̲v̲i̲t̲y̲
The connectivity illustrated by table 4-1 concerns
the possibilities for connection of the different types
of terminals and external circuits to the CAMPS system
0.
Two subsets are addressed:
a) Connectivity of VDU's and Medium Speed Printers,
Low Speed Teleprinters, Papertape Reader/Puncher,
and OCR.
b) Connectivity of CCIS, SCARS, and TARE circuitry.
The numbers of terminals are given and the modules/items
of the distribution equipment supplied for each data
exchange channel are given.
VDU INTERFACE WIRED 32
CAPACITY EQUIPPED 32
CONNECTED CAPACITY, VDUs 24
MEDIUM SPEED TELE- WIRED 16
PRINTER INTERFACE
CAPACITY EQUIPPED 12
CONNECTED CAPACITY, MED. SP. 8
TELEPRINTERS
CCIS/SCARS INTERFACE WIRED 2
CAPACITY EQUIPPED 2
TARE INTERFACE WIRED 6
CAPACITY EQUIPPED 4
LOW SPEED TELE- WIRED 24
PRINTER INTERFACE
CAPACITY EQUIPPED 23
PTP/PTR INTERFACE WIRED 1
CAPACITY EQUIPPED 1
CONNECTED CAPACITY 1
PTP/PTR
OCR INTERFACE WIRED 2
CAPACITY EQUIPPED 1
CONNECTED CAPACITY 1
OCR
TABLE 4-1
5̲.̲ ̲ ̲S̲U̲P̲P̲L̲I̲E̲R̲/̲E̲Q̲U̲I̲P̲M̲E̲N̲T̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲A̲T̲I̲O̲N̲
For further information on items see CPS/SDS/017.
5.1 C̲R̲/̲E̲D̲
Q̲t̲y̲.̲
Processor Crate
2
Channel Crate
1
Watchdog Crate
1
CTX Crate 11
D-Fan Assy
3
S-Fan Assy
6
Panel Mounting Rail Type 1 18
Panel Mounting Rail Type 2 18
Mounting Rail 390x142x20 15
Mounting Rail 390x40x20 19
Supporting Slide Left 35
Supporting Slide Right 35
Supporting Slide for Fan Left
6
Supporting Slide for Fan Right
6
Rack 35U with Front Door (700 mm Deep)
1
Rack 35U (550 Deep)
1
Supporting Slide for Freq. Stabl. Left
3
Supporting Slide for Freq. Stabl. Right
3
Blank Panel 1U
4
Blank Panel 2U
1
C̲R̲/̲E̲D̲
Q̲t̲y̲.̲
Blank Panel 1U
4
Blank Panel 3U
9
Blank Panel 10U
3
Blank Panel 1M Front S 78
Blank Panel 1M Front D 32
Blank Panel 2M Front S 25
Blank Panel 8M Front D
1
Blank Panel 1M Rear S
1
Blank Panel 4M Rear S 28
Power Distribution Panel
9
Mains Switch
6
X-Net Terminal Outlet 26
Floppy Disk (2 Units)
1
Power Supply CR80S 10
Power Supply CR80D
6
MAP I/O DMA
2
RAM 64K
2
RAM 128K
2
CPU-CACHE
6
STI
2
TIA
4
MIA
2
Q̲t̲y̲.̲
CCA
3
MBT 10
Disk Controller
3
Floppy Disk Controller
1
CUCP
1
LTU
5
LIA-N
4
SFA
1
DCA
3
CIA-A
1
CIA-B
1
WCA
1
TDX Controller
2
BSM-X 10
LTUX-S 17
Back Panel Type 8
2
BSM-X Panel 10
CCBA Panel
1
CCB Panel
3
Term Resistor P/N 6.44720-20
4
Term Resistor P/N 5.04258-00
2
Data Channel Cable P/N 5.05415-00
2
CCB Cable P/N 5.05413-00
1
Q̲t̲y̲.̲
CCB Cable P/N 5.05414-00
1
CCB Cable P/N 5.05434-00
1
WDCC Cable P/N 5-05412-00
2
X-Net Bus Cable P/N 5-05402-00 44
TIA to X-Net Outlet Cable P/N 5.05417-00
4
TDX-Ctrl. to X-Net Outlet Cable P/N 5.05418-00
2
BSM-X to X-Net Outlet Cable P/N 5.05416-00 20
BSM-x to TDX Ctrl. Cable 5.05441-01
2
80 D Power Cable 0.5 m P/N 5.05410-00
4
80 D Power Cable 1.0 m P/N 5.05410-01
8
80 D Power Cable 1.5 m P/N 5.05317-00
4
80 S Power Cable 0.5 m P/N 5.05409-00 12
80 S Power Cable 1.0 m P/N 5.05409-01 14
80 S Power Cable 1.5 m P/N 5.05313-00
6
80 S Power Cable 2.5 m P/N 5.05409-02
2
80 S Power Cable 3.5 m P/N 5.05409-03
1
Floppy Disk Cable P/N 5.05411-00
1
X-Net Bus Cable between Rack C and D
4
5.2 C̲O̲N̲T̲R̲O̲L̲ ̲D̲A̲T̲A̲
Disk Drive MMD
2
Disk Drive SMD
1
Stretching Slide MMD Left
2
Stretching Slide MMD Right
2
Stretching Slide SMD Left
1
Stretching Slide SMD Right
1
Disk Drive Cable A
3
Disk Drive Cable B
3
Q̲t̲y̲.̲
5.3 A̲B̲A̲C̲U̲S̲ ̲C̲O̲N̲T̲R̲O̲L̲S̲
Frequency Stabilizer
3
5.4 D̲E̲L̲T̲A̲ ̲D̲A̲T̲A̲
VDU Delta 7260 TC 25
5.5 T̲R̲A̲C̲O̲R̲
MSP Tracor 8000
9
5.6 E̲L̲E̲C̲T̲R̲O̲N̲I̲C̲ ̲E̲N̲C̲L̲O̲S̲U̲R̲E̲S̲
Rack Left End
2
Rack Intermediate
2
Rack Right End
2
5.7 C̲A̲P̲T̲O̲R̲ ̲C̲O̲R̲P̲.̲
Power Line Filter
3
5.8 V̲E̲R̲S̲I̲T̲R̲O̲N̲ ̲I̲N̲C̲.̲
Opto T/R 34
Adaptor Power Supply 12
5.9 A̲T̲L̲A̲N̲T̲I̲C̲ ̲R̲E̲S̲E̲A̲R̲C̲H̲ ̲C̲O̲R̲P̲.̲
V24/V28 (L/L) Adaptor 1 channel
7
V24/V28 (L/L) Adaptor 4 channel
7
Filter Box
1
Q̲t̲y̲.̲
5.10 K̲n̲u̲d̲ ̲W̲e̲x̲]̲e̲
Cable Channel 14
5.11 M̲U̲L̲T̲I̲K̲O̲M̲P̲O̲N̲E̲N̲T̲
V24 Cable P/N 5.05420-00
8
V24 Cable P/N 5.05420-02
8
V24 Cable P/N 5.05420-03
4
V24 Cable P/N 5.05420-04
4
V24 Cable P/N 5.05421-01
2
V24 Cable P/N 5.05422-00
2
V24 Cable P/N 5.05422-01
6
Internal Cable Type 1
2
5.12 H̲.̲R̲.̲ ̲E̲L̲E̲C̲T̲R̲O̲N̲I̲C̲
Ground Wire P/N 5.05419-01 12
Ground Wire P/N 5.05419-02 12
Ground Wire P/N 5.05419-03
6
Ground Wire for BP-8
2
Ground Wire between Freq. Stabl. and
Panel Mounting Rails
3
Ground Wire between Freq. Stabl. Power Switch
and PMR
1
Ground Wire between Freq. Stabl. Panel Mounting
Rails
3
Ground Wire between TARE Rack Panel Mounting Rails
3
5.13 C̲R̲/̲S̲D̲
Cable Channel Assy. 11
Cable Tie Assy.
2
Power Switch Panel for Frequency Stabilizer
1
Power Cable for Frequency Stabilizer 1m
2
Power Cable for Frequency Stabilizer 2.5m
2
Power Cable for Frequency Stabilizer 3m
2
Opto Cable (Length TBD) 34
Power Cable between Freq. Stabl. and Rack. A
3
Ground Wire between Freq. Stabl. and Rack. A
1
5.14 T̲B̲D̲ Q̲t̲y̲.̲
Identification Plate
2
V24 BPJF for TARE Rack
1
VF BPJF for TARE Rack
1
Modem
2
V24 Cables in TARE Rack
4
PTP/PTR
1
Signal Cable to PTP/PTR
1
OCR
1
Signal Cable to OCR
1
5.15 S̲p̲e̲c̲t̲r̲u̲m̲ ̲
Filtered Connector 10 poles 29
Filtered Connector 18 poles
6…86…1
…02…
…02…
…02…
…02…
…02…
6̲.̲ ̲ ̲C̲O̲N̲F̲I̲G̲U̲R̲A̲T̲I̲O̲N̲/̲E̲Q̲U̲I̲P̲M̲E̲N̲T̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲A̲T̲I̲O̲N̲
For further information on items see CPS/SDS/017
6.1 B̲A̲Y̲ ̲A̲-̲B̲-̲C̲
R̲a̲c̲k̲ ̲A̲ Q̲t̲y̲.̲
Left End Rack
1
Processor Unit
-
Processor Crate
1
Power Supply CR80D
2
MAP I/O DMA
1
STI
1
RAM 64K
1
RAM 128K
1
CPU CACHE
3
Blank Panel 1M Front D 10
MBT
4
TIA
2
MIA
1
CCA
1
D-Fan Assy.
1
Disk Drive MMD
1
Mains Switch
1
X-Net Terminal Outlet
2
Power Distribution Panel
1
Power Line Filter
1
Blank Panel 1U
1
Blank Panel 3U
1
Blank Panel 10U
1
R̲a̲c̲k̲ ̲B̲ Q̲t̲y̲.̲
Intermediate Rack
1
Channel Unit
-
Channel Crate
1
Power Supply CR80D
2
Disk Controller
3
Floppy Disk Controller
1
LTU
4
Blank Panel 1M Front D
6
MBT
2
CCA
1
LIA-N
4
SFA
1
DCA
3
CIA-A
1
CIA-B
1
CUCP
!
D-Fan Assy.
1
Watchdog Unit
-
Watchdog Crate
1
LTU
1
Blank Panel 1M Front D
6
WCA
1
CCBA Panel
1
Blank Panel 8M Front D
1
Floppy Disk (2 units)
1
Disk Drive SMD
1
Mains Switch
1
Power Distribution Panel
1
Power Line Filter
1
Blank Panel 1U
1
Blank Panel 3U
1
R̲a̲c̲k̲ ̲C̲ Q̲t̲y̲.̲
Right End Rack
1
Processor Unit
-
Processor Crate
1
Power Supply CR80D
2
MAP I/O DMA
1
STI
1
RAM 64K
1
RAM 128K
1
CPU CACHE
3
Blank Panel 1M Front 10
MBT
4
TIA
2
MIA
1
CCA
1
D-Fan Assy.
1
Adaptor Unit
-
Opto T/R
2
V24/V28 (L/L) Adaptor 1 Channel
6
Blank Panel 1M Front S
7
Blank Panel 2M Front S
5
Blank Panel 1M Rear S
1
Adaptor Power Supply
2
Back Panel
2
CTX Crate
1
Cable Channel Assy.
1
S-Fan Assy.
1
Disk Drive MMD
1
Mains Switch
1
X-Net Terminal Outlet
2
Power Distribution Panel
2
Blank Panel 1U
2
Blank Panel 3U
1
Ground wire for BP8
2
CCB Panel
1
C̲a̲b̲i̲n̲e̲t̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲ ̲(̲R̲a̲c̲k̲ ̲A̲-̲B̲-̲C̲)̲ Q̲t̲y̲.̲
Rack A Assy.
1
Rack B Assy.
1
Rack C Assy.
1
Identification Plate
1
Ground Wire P/N 5.05419-01
6
Ground Wire P/N 5.05419-02
6
Ground Wire P/N 5.05419-03
3
Supporting Slide Left 13
Supporting Slide Right 13
Stretching Slide MMD Left
2
Stretching Slide MMD Right
2
Panel Mounting Rail Type 1
9
Panel Mounting Rail Type 2
9
Cable Channel
7
Mounting Rail 390x142x20
3
Mounting Rail 390x40x20 11
Stretching Slide SMD Left
1
Stretching Slide SMD Right
1
Supporting Slide for Fan Left
1
Supporting Slide for Fan Right
1
Cable Tie Assy.
1
Inter Rack Cable Assembly (Rack A-B-C) Qty.
Data Channel Cable P/N 5.05415-00
2
CCB Cable P/N 5.05413-00
1
Disk Drive Cable A
2
Disk Drive Cable B
2
WDCC Cable P/N 5.05412-00
2
X-Net Bus Cable P/N 5.05402-00
4
V24 Cable P/N 5.05422-00
2
V24 Cable P/N 5.05422-01
6
80D Power Cable 1m P/N 5.05410-01
4
80S Power Cable 2.5m P/N 5.05409-02
1
80S Power Cable 3.5m P/N 5.05409-03
1
80S Power Cable 1.5m P/N 5.05313-00
3
R̲a̲c̲k̲ ̲A̲ ̲I̲n̲t̲e̲r̲n̲a̲l̲ ̲C̲a̲b̲l̲e̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲ Q̲t̲y̲.̲
TIA to X-Net Outlet Cable P/N 5.05417-00
2
80D Power Cable 0.5m P/N 5.05410-00
2
80D Power Cable 1m P/N 5.05410-01
2
80S Power Cable 1m P/N 5.05409-01
1
80D Power Cable 1.5m P/N 5.05317-00
1
Term Resistor P/N 6.44720-20
4
R̲a̲c̲k̲ ̲B̲ ̲I̲n̲t̲e̲r̲n̲a̲l̲ ̲C̲a̲b̲l̲e̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲
Floppy Disk Cable P/N 5.05411-00
1
Disk Drive Cable A
1
Disk Drive Cable B
1
80D Power Cable 1.5m P/N 5.05317-00
2
80S Power Cable 0.5m P/N 5.05409-00
1
80S Power Cable 1m P/N 5.05409-01
1
Term Resistor P/N 5.04258-00
2
R̲a̲c̲k̲ ̲C̲ ̲I̲n̲t̲e̲r̲n̲a̲l̲ ̲C̲a̲b̲l̲e̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲
TIA to X-Net Outlet Cable P/N 5.05417-00
2
80D Power Cable 0.5m P/N 5.05410-00
2
80D Power Cable 1m P/N 505410-01
2
80D Power Cable 1.5m P/N 5.05317-00
1
80S Power Cable 0.5m P/N 5.05409-00
1
6.2 B̲A̲Y̲ ̲D̲-̲E̲-̲F̲ Q̲t̲y̲.̲
Rack D: Left End
1
Cable Channel Assy
4
TDX Unit (#4)
-
CTX Crate
1
TDX Controller
1
BSM-X
1
LTUX-S
2
Opto T/R
8
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S
3
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
BSM-X to TDX Ctrl Cable
1
TDX Unit (#3)
-
CTX Crate
1
BSM-X
1
LTUX-S
2
V24/V28 (L/L) Adaptor 4 Channel
1
Power Supply CR80S
1
Blank Panel 1M Front S 10
Blank Panel 2M Front S
2
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 4M Rear S
1
Intern Cable Type 1
2
S-Fan Assy
2
TDX Unit (#2)
-
CTX Crate
1
BSM-X
1
LTUX-S
2
Opto T/R
8
Power Supply CR80S
1
Adapter Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S
4
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
TDX Unit (#1)
-
CTX Crate
1
TDX Controller
1
BSM-X
1
LTUX-S
2
Opto T/R
8
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S
3
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
BSM-X to TDX ctrl Cable
1
Mains Switch
1
X-Net Terminal Outlet 10
Power Distribution Panel
2
CCB Panel
1
Blank Panel 3U
1
R̲a̲c̲k̲ ̲E̲:̲ ̲ ̲I̲n̲t̲e̲r̲m̲e̲d̲i̲a̲t̲e̲
1
Cable Channel Assy.
4
TDX Unit (#8)
-
CTX Crate
1
BSM-X
1
LTUX-S
1
V24/V28 (L/L) Adaptor 4 Channel
1
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S
9
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
TDX Unit (#7)
-
CTX Crate
1
BSM-X
1
LTUX-S
1
V24/V28 (L/L) Adaptor 4 channel
1
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S 10
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
Q̲t̲y̲.̲
S-Fan Assy.
2
TDX Unit (#6)
-
CTX Crate
1
BSM-X
1
LTUX-S
1
V24/V28 (L/L) Adaptor 4 channel
1
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S 11
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
TDX Unit (#5)
-
CTX Crate
1
BSM-X
1
LTUX-S
2
Opto T/R
8
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S
4
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
Mains Switch
1
X-Net Terminal Outlet
8
Power Distribution Panel
2
Power Line Filter
1
Blank Panel 3U
1
Q̲t̲y̲.̲
R̲a̲c̲k̲ ̲F̲:̲ ̲ ̲R̲i̲g̲h̲t̲ ̲E̲n̲d̲
1
Cable Channel Assy
2
TDX Unit (#10)
-
CTX Crate
1
BSM-X
1
LTUX-S
2
V24/V28 (L/L) Adaptor 4 Channel
1
V24/V28 (L/L) Adaptor 1 Channel
1
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front S
9
Blank Panel 2M Front S
2
Blank Panel 4M Rear S
3
TDX Unit (#9)
-
CTX Crate
1
BSM-X
1
LTUX-S
2
V24/V28 (L/L) Adaptor 4 Channel
2
Power Supply CR80S
1
Adaptor Power Supply
1
BSM-X Panel
1
Blank Panel 1M Front
8
Blank Panel 2M Front
2
Blank Panel 4M Rear
3
Mains Switch
1
X-Net Terminal Outlet
4
Power Distribution Panel
1
CCB Panel
1
Filter Box
1
Blank Panel 3U
1
Blank Panel 5U
1
Blank Panel 10U
1
S-Fan Assy.
1
C̲a̲b̲i̲n̲e̲t̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲ ̲(̲R̲a̲c̲k̲ ̲D̲-̲E̲-̲F̲)̲ Q̲t̲y̲.̲
Rack D Assy.
1
Rack E Assy.
1
Rack F Assy.
1
Identification Plate
1
Ground Wire P/N 5.05419-01
6
Ground Wire P/N 5.05419-02
6
Ground Wire P/N 5.05419-03
3
Supporting Slide Left 22
Supporting Slide Right 22
Supporting Slide for Fan Left
5
Supporting Slide for Fan Right
5
Panel Mounting Rail Type 1
9
Panel Mounting Rail Type 2
9
Mounting Rail 390x142x20 12
Mounting Rail 390x40x20
8
Cable Channel
7
Cable Tie Assy.
1
I̲n̲t̲e̲r̲ ̲R̲a̲c̲k̲ ̲C̲a̲b̲l̲e̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲ ̲(̲R̲a̲c̲k̲ ̲D̲-̲E̲-̲F̲)̲ Q̲t̲y̲.̲
CCB Cable P/N 5.05414-00
1
X-Net Bus Cable P/N 5.05402-00
8
V24 Cable 3.6 m P/N05420-04
4
V24 Cable 3.3m P/N 5.05420-03
4
V24 Cable 3m P/N 5.05420-02
8
80S Power Cable 1.5m: P/N 5.05313-00
3
R̲a̲c̲k̲ ̲D̲ ̲I̲n̲t̲e̲r̲n̲a̲l̲ ̲C̲a̲b̲l̲e̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲ Q̲t̲y̲.̲
TDX-Ctrl. to X-Net Outlet P/N 5.05418-00
2
BSM-X to X-Net Outlet P/N 5.05416-00
8
80S Power Cable 0.5m P/N 5.05409-00
4
80S Power Cable 1m P/N 5.05409-01
4
X-Net Bus Cable P/N 5.05402-00 16
R̲a̲c̲k̲ ̲E̲ ̲I̲n̲t̲e̲r̲n̲a̲l̲ ̲C̲a̲b̲l̲e̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲
BSM-X to X-Net Outlet P/N 5.05416-00
8
X-Net Bus Cable P/N 5.05402-00 12
80S Power Cable 0.5m P/N 5.05409-00
4
80S Power Cable 1m P/N 5.05409-01
6
R̲a̲c̲k̲ ̲F̲ ̲I̲n̲t̲e̲r̲n̲a̲l̲ ̲C̲a̲b̲l̲e̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲
BSM-X to X-Net outlet P/N 5.05416-00
4
X-Net Bus Cable P/N 5.05402-00
4
V24 Cable 240cm P/N 5.05420-00
8
V24 Cable 270cm P/N 5.05421-01
2
80S Power Cable 0.5m P/N 5.05409-00
2
80S Power Cable 1m P/N 5.05409-01
2
6.3 F̲R̲E̲Q̲U̲E̲N̲C̲Y̲ ̲S̲T̲A̲B̲I̲L̲I̲Z̲E̲R̲ ̲A̲S̲S̲E̲M̲B̲L̲Y̲ Q̲t̲y̲.̲
Power Switch Panel
1
Frequency Stabilizer
3
Blank Panel 3U
3
Blank Panel 2U
1
Power Cable 1m
2
Power Cable 2.5m
2
Power Cable 3m
2
Rack 35U with Front Door (700 mm Deep)
1
Ground Wire Between Stabl. and Panel Mount. R.
3
Ground Wire Between Pow. SW. Pnl. and P.M.R.
1
Ground Wire Between P.M.R.s
3
Supporting Slide Right
3
Supporting Slide Left
3
6.4 R̲E̲M̲O̲T̲E̲ ̲T̲A̲R̲E̲ ̲A̲S̲S̲E̲M̲B̲L̲Y̲ Q̲t̲y̲.̲
V24 BPJF
1
VF BPJF
1
Modem
2
Mains Switch
1
Power Distribution Panel
1
Blank Panel 1U
2
Blank Panel 2U
1
Blank Panel 3U
3
Blank Panel 10U
1
V24 Cable
4
Rack 35U (550 mm Deep)
1
Ground Wire Between Panel Mounting Rails
3
6.5 P̲E̲R̲I̲P̲H̲E̲R̲A̲L̲ ̲E̲Q̲U̲I̲P̲M̲E̲N̲T̲
VDU Delta 7260 TC 25
MSP Tracor 8000
9
PTP/PTR
1
OCR
1
6.6 I̲N̲T̲E̲R̲ ̲U̲N̲I̲T̲ ̲C̲A̲B̲L̲E̲ ̲A̲S̲S̲E̲M̲B̲L̲Y̲ Q̲t̲y̲.̲
Opto Cables 34
Signal Cable to PTP/PTR
1
Signal Cable to OCR
1
X-Net Bus Cable Between Rack D and C
4
V24 Cable Between Rack C and D
6
Power Cable Between Stabl. and Rack A
3
Ground Cable Between Stabl. and Rack A
1
CCB Cable 3.6m P/N 5.05434-00
1
7̲ ̲ ̲H̲/̲W̲ ̲C̲O̲N̲F̲I̲G̲U̲R̲A̲T̲I̲O̲N̲ ̲D̲E̲S̲C̲R̲I̲P̲T̲I̲O̲N̲
This section describes the structure of the CAMPS DSMT
H/W configuration applicable for the DSMT H/W test.
7.1 R̲A̲C̲K̲S̲
The PROCESSOR RACK ASSY is shown in figure 7.1-1, the
LINE TERMINATION RACK ASSY is shown in figure 7.1-2,
the FREQUENCY STABILIZER RACK ASSY is shown in figure
7.1-3 and the REMOTE TARE RACK ASSY is shown in figure
7.1-4.
Crate/Panel layouts are shown in figures identified
below:
PU #1/#2 front crate : figure 7.1-5
PU #1/#2 rear crate : figure 7.1-6
CU front crate : figure 7.1-7
CU rear crate : figure 7.1-8
WDP front/rear crate : figure 7.1-9
Adapter crate front/rear crate : figure 7.1-10
TU # 1 front/rear crate : figure 7.1-11
TU # 2 front/rear crate : figure 7.1-11
TU # 3 front/rear crate : figure 7.1-12
TU # 4 front/rear crate : figure 7.1-11
TU # 5 front/rear crate : figure 7.1-11
TU # 6 front/rear crate : figure 7.1-12
TU # 7 front/rear crate : figure 7.1-12
TU # 8 front/rear crate : figure 7.1-12
TU # 9 front/rear crate : figure 7.1-13
TU # 10 front/rear crate : figure 7.1-14
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲1̲
P̲R̲O̲C̲E̲S̲S̲O̲R̲ ̲R̲A̲C̲K̲ ̲A̲S̲S̲E̲M̲B̲L̲Y̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲2̲
L̲I̲N̲E̲ ̲T̲E̲R̲M̲I̲N̲A̲T̲I̲O̲N̲ ̲R̲A̲C̲K̲ ̲A̲S̲S̲E̲M̲B̲L̲Y̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲3̲
F̲R̲E̲Q̲U̲E̲N̲C̲Y̲ ̲S̲T̲A̲B̲I̲L̲I̲Z̲E̲R̲ ̲R̲A̲C̲K̲ ̲A̲S̲S̲E̲M̲B̲L̲Y̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲4̲
R̲E̲M̲O̲T̲E̲ ̲T̲A̲R̲E̲ ̲R̲A̲C̲K̲ ̲A̲S̲S̲E̲M̲B̲L̲Y̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲5̲
P̲U̲#̲1̲/̲#̲2̲ ̲F̲R̲O̲N̲T̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲6̲
P̲U̲#̲1̲/̲#̲2̲ ̲R̲E̲A̲R̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲7̲
C̲U̲ ̲F̲R̲O̲N̲T̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲8̲
C̲U̲ ̲R̲E̲A̲R̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲9̲
W̲D̲P̲ ̲F̲R̲O̲N̲T̲/̲R̲E̲A̲R̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲1̲0̲
A̲D̲A̲P̲T̲E̲R̲ ̲C̲R̲A̲T̲E̲ ̲F̲R̲O̲N̲T̲/̲R̲E̲A̲R̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲1̲1̲
T̲U̲#̲1̲/̲#̲2̲/̲#̲4̲/̲#̲5̲ ̲F̲R̲O̲N̲T̲/̲R̲E̲A̲R̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲1̲2̲
T̲U̲#̲3̲/̲#̲6̲/̲#̲7̲/̲#̲8̲ ̲F̲R̲O̲N̲T̲/̲R̲E̲A̲R̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲1̲3̲
T̲U̲#̲9̲ ̲F̲R̲O̲N̲T̲/̲R̲E̲A̲R̲ ̲C̲R̲A̲T̲E̲
F̲I̲G̲U̲R̲E̲ ̲7̲.̲1̲-̲1̲4̲
T̲U̲#̲1̲0̲ ̲F̲R̲O̲N̲T̲/̲R̲E̲A̲R̲ ̲C̲R̲A̲T̲E̲
7.2 T̲e̲r̲m̲i̲n̲a̲l̲s̲
A number of terminals is connected to the DSMT system.
These terminals comprises:
24 Visual Display Units (VDUs)
8 Medium Speed Printers (MSPs)
1 Paper Tape Reader/Puncher (PTR/PTP)
1 VDU as a substitute for the Optical Character
Reader, if the OCR is unavailable.
The different terminals are connected to the DSMT system
as specified in section 7.4.
7.3 E̲x̲t̲e̲r̲n̲a̲l̲ ̲C̲i̲r̲c̲u̲i̲t̲s̲
SCARSII and ACCIS will be simulated by a VDU.
Each TARE circuit will be simulated by one of the two
types of test equipment as described in sec. 3.7.1b.2
of the testspecification.
7.4 C̲o̲n̲n̲e̲c̲t̲i̲o̲n̲ ̲o̲f̲ ̲T̲e̲r̲m̲i̲n̲a̲l̲s̲ ̲a̲n̲d̲ ̲E̲x̲t̲e̲r̲n̲a̲l̲ ̲C̲i̲r̲c̲u̲i̲t̲s̲
To ease identification of terminals connected to the
TDX system via signal adapters and LTUX-Ss, each terminal
and the link between the terminal and the signal adapter
is given a three digit identifier. Each digit is a
hexadecimal number. The format of the identifier is
'XYZ' and the terminal having this identification is
connected via link (opto or V24) XYZ to channel Z (1-4)
of LTUX-S Y (1-2) in TDX Unit (TU) # X (1-A). E.g.:
a MSP has the identifier A23 meaning that the MSP is
connected via link A23 to channel 3 of LTUX-S no. 2
in TDX Unit 10 (10 = #A).
An external circuit is identified similar to terminals
with the crate identifier being zero (identifying the
Channel Unit). Thus an external circuit connected to
LTU/LIA-N NO. 3 channel 2 and the associated V24 link
is identified as 032.
Figure 7.4-1
V̲2̲4̲ ̲F̲i̲l̲t̲e̲r̲ ̲B̲o̲x̲,̲ ̲P̲l̲u̲g̲ ̲l̲o̲c̲a̲t̲i̲o̲n̲s̲
V24 links enters/leaves the DSMT system via Filtered
CANNON D-connectors in the V24 Filter Box (ref. fig.
7.4-1) situated in rack F. These connectors are numbered
consecutively from J1 to J53. In figure 7.4-2 is given
a cross-reference between filter box connectors and
V24 link identifiers.
Identifier Filter box Connector Function DEVICE NOTES
ID#
011 J 26 TARE
012 J 27 TARE
021 J 28 TARE
022 J 29 TARE
031 J 30 ACCIS
041 J 31 SCARS II
111 N/A VDU #11 OPTO
112 N/A VDU #11 OPTO
113 N/A VDU #11 OPTO
114 N/A MSP #11 OPTO
121 N/A VDU #12 OPTO
122 N/A VDU #12 OPTO
123 N/A VDU #12 OPTO
124 N/A MSP #12 OPTO
211 N/A VDU #21 OPTO
212 N/A VDU #21 OPTO
213 N/A VDU #21 OPTO
214 N/A MSP #21 OPTO
221 N/A VDU #22 OPTO
222 N/A VDU #22 OPTO
223 N/A VDU #22 OPTO
224 N/A MSP #22 OPTO
F̲I̲G̲U̲R̲E̲ ̲7̲.̲4̲-̲2̲ ̲(̲s̲h̲e̲e̲t̲ ̲1̲ ̲o̲f̲ ̲3̲)̲
L̲i̲n̲k̲ ̲i̲d̲e̲n̲t̲i̲f̲i̲e̲r̲ ̲/̲ ̲F̲i̲l̲t̲e̲r̲ ̲B̲o̲x̲ ̲s̲o̲c̲k̲e̲t̲ ̲c̲r̲o̲s̲s̲-̲r̲e̲f̲e̲r̲e̲n̲c̲e̲
Identifier Filter Box Connector Function DEVICE NOTES
ID#
311 J 1 LSM #31
312 J 2 LSM #31
313 J 3 LSM #31
314 J 4 LSM #31
411 N/A VDU #41 OPTO
412 N/A VDU #41 OPTO
413 N/A VDU #41 OPTO
414 N/A MSP #41 OPTO
421 N/A VDU #42 OPTO
422 N/A VDU #42 OPTO
423 N/A VDU #42 OPTO
424 N/A MSP #42 OPTO
511 N/A VDU #51 OPTO
512 N/A VDU #51 OPTO
513 N/A VDU #51 OPTO
514 N/A MSP #51 OPTO
521 N/A VDU #52 OPTO
522 N/A VDU #52 OPTO
523 N/A VDU #52 OPTO
524 N/A MSP #52 OPTO
611 J 5 LSM #61
612 J 6 LSM #61
613 J 7 LSM #61
614 J 8 LSM #61
F̲I̲G̲U̲R̲E̲ ̲7̲.̲4̲-̲2̲ ̲(̲s̲h̲e̲e̲t̲ ̲2̲ ̲o̲f̲ ̲3̲)̲
L̲i̲n̲k̲ ̲I̲d̲e̲n̲t̲i̲f̲i̲e̲r̲ ̲/̲ ̲F̲i̲l̲t̲e̲r̲ ̲B̲o̲x̲ ̲C̲o̲n̲n̲e̲c̲t̲o̲r̲ ̲C̲r̲o̲s̲s̲-̲R̲e̲f̲e̲r̲e̲n̲c̲e̲
Identifier Filter Box Connector Function DEVICE NOTES
ID#
711 J 9 LSM #71
712 J 10 LSM #71
713 J 11 LSM #71
714 J 12 LSM #71
811 J 13 LSM #81
812 J 14 LSM #81
813 J 15 LSM #81
814 J 16 LSM #81
911 J 17 LSM #91
912 J 18 LSM #91
913 J 19 LSM #91
914 J 20 LSM #91
921 J 21 LSM #92
922 J 22 LSM #92
923 J 23 LSM #92
924 J 24 LSM #92
A11 J 25 PTR/PTP #A1
A12 NOT USED
A13 NOT USED
A14 NOT USED
A21 J32 OCR #A2
F̲I̲G̲U̲R̲E̲ ̲7̲.̲4̲-̲2̲
L̲i̲n̲k̲ ̲I̲d̲e̲n̲t̲i̲f̲i̲e̲r̲ ̲/̲ ̲F̲i̲l̲t̲e̲r̲ ̲B̲o̲x̲ ̲C̲o̲n̲n̲e̲c̲t̲o̲r̲ ̲C̲r̲o̲s̲s̲-̲R̲e̲f̲e̲r̲e̲n̲c̲e̲
A P P E N D I X B
********************************
NGTS 40
Method 516
Procedure V
Bench Handling
In the following are given the NGTS 40 sections and paragraphs
relevant for Bench handling test.
3.2.1 P̲r̲e̲t̲e̲s̲t̲ ̲p̲e̲r̲f̲o̲r̲m̲a̲n̲c̲e̲ ̲r̲e̲c̲o̲r̲d̲.̲
Prior to proceeding with any of the test methods, the
test item shall be operated under standard ambient
conditions (see 3.1) and a record made of all data
necessary to determine compliance with required performance.
These data shall provide the criteria for checking
satisfactory performance of the test item either during,
or at the conclusion of the test, or both as required.
Certification by signature and date block is required
as specified in 3.4.
3.2.4 V̲i̲s̲u̲a̲l̲ ̲i̲n̲s̲p̲e̲c̲t̲i̲o̲n̲ ̲a̲n̲d̲ ̲f̲a̲i̲l̲u̲r̲e̲ ̲c̲r̲i̲t̲e̲r̲i̲a̲
When specified herein, the test item shall be visually
inspected and a record made of any damage or deterioration
resulting from the test. If a test chamber is used
for the test, perform a visual inspection of the test
item within the chamber at test conditions, when possible.
Upon completion of the test, visually inspect the test
item again after the test item has been returned to
standard ambient conditions. Deterioration, corrosion
or change in tolerance limits of any internal or external
parts which could in any manner prevent the test item
from meeting operational service or maintenance requirements
shall provide reason to consider the test item as having
failed to withstand the conditions of the test.
3.7 P̲r̲o̲c̲e̲d̲u̲r̲e̲ ̲V̲.̲ ̲B̲e̲n̲c̲h̲ ̲h̲a̲n̲d̲l̲i̲n̲g̲ ̲t̲e̲s̲t̲
This test is conducted to determine the ability of
equipment to withstand the shock encountered during
servicing. The chassis and front panel assembly shall
be removed from its enclosure, as for servicing, and
placed in a suitable position for servicing on a horizontal
solid wooden bench top at least 1-5/8 inches thick.
The test shall be performed, as follows, in a manner
simulating shocks liable to occur during servicing:
Step 1 - Using one edge as a pivot, lift the opposite edge
of the chassis until one of the following conditions
occurs (whichever occurs first):
(a) The chassis forms an angle of 45 degrees with
the horizontal bench top.
(b) The lifted edge of the chassis has been raised
4 inches above the horizontal bench top.
(c) The lifted edge of the chassis is just below
the point of perfect balance.
Let the chassis drop back freely to the horizontal bench
top. Repeat, using other practical edges of the same horizontal
face as pivot points, for a total of four drops.
Step 2 - Repeat Step 1, with the test item resting on other
faces until it has been dropped for a total of
four times on each face on which the test could
be placed practicably during servicing. The test
item shall not be operating during the test. At
the conclusion of the test, the test item shall
be operated and the results compared with the
data obtained in accordance with Section 3, paragraph
3.2.1. The test item shall then be inspected as
specified in Section 3, paragraph 3.2.4.…86…1
…02… …02… …02… …02… …02… …02… …02…
…02…
A P P E N D I X C
********************************
1̲ ̲G̲E̲N̲E̲R̲A̲L̲
During the DSMT H/W test a number of inputcommands of the
type:
DO #page.displacement
are used.
This commandtype is used to activate a testsequence resident
in main memory, i.e the actual testprogram now accepts
testcommands from this testsequence and not from the OC.
When the activated testsequence has finished, commandinputs
are again taken from the OC. Testsequences used in the
testprocedures are explained in the following. The Device
Handler commands used to implement the sequences are all
explained in ref (6) of sec. 3.7 in the testspecification.
2̲ ̲D̲I̲S̲K̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
2.1 D̲I̲S̲K̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE
LAZY DOGS BACK 0123456789…08…)
GENERATE (1,0,32)
DISK.DRIVE ̲STATUS (#1023,#500,0,0)
DISK.DRIVE ̲STATUS (#1023,#500,0,1)
DISK.DRIVE ̲STATUS (#1025,#540,0,0)
DISK.DRIVE ̲STATUS (#1026,#580,0,0)
DISK.DRIVE ̲STATUS (#1026,#580,0,1)
DISK.MARK ̲AND ̲PROTECT (#1023,#500,MMD82,0,0,#1FFFF,
#200FE)
DISK.MARK ̲AND ̲PROTECT (#1025,#540,SMD80,0,0,#1FFFF,
#200FE)
DISK.MARK ̲AND ̲PROTECT (#1026,#580,MMD82,0,0,#1FFFF,
#200FE)
DISK.INITIALIZE (#1023,#500)
DISK.INCLUDE (#1023,MMD00,0,0,MMD82)
DISK.INCLUDE (#1023,MMD01,0,1,MMD82)
DISK.INCLUDE (#1025,SMD0,0,0,SMD80)
DISK.INCLUDE (#1026,MMD10,0,0,MMD82)
DISK.INCLUDE (#1026,MMD11,0,1,MMD82)
DISK.WRITE (MMD00,1,#100,0)
DISK.WRITE (MMD01,1,#500,0)
DISK.WRITE (SMD0,1,#100,0)
DISK.WRITE (MMD10,1,#100,0)
DISK.WRITE (MMD11,1,#500,0)
CLEAR (1)
DISK.READ (MMD00,1,#100,1)
COMPARE (0,1,32)
CLEAR (1)
DISK.READ (MMD01,1,#500,1)
COMPARE (0,1,32)
CLEAR (1)
DISK.READ (SMD0,1,#100,1)
COMPARE (0,1,32)
CLEAR (1)
DISK.READ (MMD10,1,#100,1)
COMPARE (0,1,32)
CLEAR (1)
DISK.READ (MMD11,1,#500,1)
COMPARE (0,1,32)
CLEAR (1)
DISK.EXCLUDE (MMD00)
DISK.EXCLUDE (MMD01)
DISK.EXCLUDE (SMD0)
DISK.EXCLUDE (MMD10)
DISK.EXCLUDE (MMD11)
DISK.SHUTDOWN (#1023)
DISK.SHUTDOWN (#1025)
DISK.SHUTDOWN (#1026)
END
2.2 F̲L̲O̲P̲P̲Y̲ ̲D̲I̲S̲K̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789…08…)
GENERATE (1,0,32)
FD.BUF ̲RAM ̲TEST (#1001)
FD.WRITE ̲VERIFY ̲TEST (#1001,FD500,0)
FD.WRITE ̲VERIFY ̲TEST (#1001,FD500,1)
FD.INITIALIZE (#1001)
FD.INCLUDE (#1001,FD0,0,FD500)
FD.INCLUDE (#1001,FD1,1,FD500)
FD.STATUS (FD0)
FD.STATUS (FD1)
FD.WRITE (FD0,1,#400,0)
FD.WRITE (FD1,1,#400,0)
CLEAR (1)
FD.READ (FD0,1,#400,1)
COMPARE (0,1,32)
CLEAR (1)
FD.READ (FD1,1,#400,1)
COMPARE (0,1,32)
CLEAR (1)
FD.EXCLUDE (FD0)
FD.EXCLUDE (FD1)
FD.SHUTDOWN (#1001)
END
3̲ ̲L̲T̲U̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
3.1 L̲T̲U̲ ̲#̲1̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#630E #0E0B #0063) "Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.INITIALIZE (#1007,#400)
LTU.OPEN ̲SUBDEVICE (#1007,0,LTU,0)
LTU.STATUS (#1007)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,62)
CLEAR (6)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,5)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
END
LTU.STATUS (#1007)
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#1007)
END
3.2 L̲T̲U̲ ̲#̲2̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#630E #0E0B #0063) "Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.INITIALIZE (#1008,#410)
LTU.OPEN ̲SUBDEVICE (#1008,0,LTU,0)
LTU.STATUS (#1008)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,62)
CLEAR (6)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,5)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
END
LTU.STATUS (#1008)
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#1008)
END
3.3 L̲T̲U̲ ̲#̲3̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#630E #0E0B #0063) "Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.INITIALIZE (#100B,#420)
LTU.OPEN ̲SUBDEVICE (#100B,0,LTU,0)
LTU.STATUS (#100B)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,62)
CLEAR (6)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,5)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
END
LTU.STATUS (#100B)
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100B)
END
3.4 L̲T̲U̲ ̲#̲3̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲2̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#630E #0E0B #0063) "Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.INITIALIZE (#100B,#420)
LTU.OPEN ̲SUBDEVICE (#100B,0,LTU,1)
LTU.STATUS (#100B)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,62)
CLEAR (6)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,5)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
END
LTU.STATUS (#100B)
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100B)
END
3.5 L̲T̲U̲ ̲#̲4̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#630E #0E0B #0063) "Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.INITIALIZE (#100D,#430)
LTU.OPEN ̲SUBDEVICE (#100D,0,LTU,0)
LTU.STATUS (#100D)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,62)
CLEAR (6)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,5)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
END
LTU.STATUS (#100D)
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100D)
END
3.6 L̲T̲U̲ ̲#̲4̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲2̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#630E #0E0B #0063) "Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.INITIALIZE (#100D,#430)
LTU.OPEN ̲SUBDEVICE (#100D,0,LTU,2)
LTU.STATUS (#100D)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,62)
CLEAR (6)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,5)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,6,63)
COMPARE (1,6,31)
CLEAR (6)
END
LTU.STATUS (#100D)
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100D)
END
4̲ ̲L̲T̲U̲X̲-̲S̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲,̲ ̲V̲D̲U̲ ̲A̲N̲D̲ ̲M̲S̲P̲
These testsequences consist of a common testsequence (common
to all link tests) and for each link to be tested two specific
link testsequences.
4.1 V̲D̲U̲ ̲C̲O̲M̲M̲O̲N̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲;̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#630E #0E0B #0063) "Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
TDX.STATUS (#32)
TDX.WRITE (#F,2,4)
REPEAT 24 TDX.WRITE (#F,1,62)
CLEAR (6)
TDX.WRITE (#F,3,7)
TDX.WRITE (#F,5,2)
TDX.READ (#F,6,63)
COMPARE (1,6,31)
CLEAR (6)
REPEAT 23
BEGIN
TDX.WRITE (#F,4,5)
TDX.WRITE (#F,5,2)
TDX.READ (#F,6,63)
COMPARE (1,6,31)
CLEAR (6)
END
TDX.STATUS (#32)
END
4.2 M̲S̲P̲ ̲C̲O̲M̲M̲O̲N̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
DEFINE (2,#521B #000D) "ESC S(CR), read
status"
DEFINE (3,#007F) "Correct MSP status
transferred"
DEFINE (4,#481B #000D) "ESC H(CR), skip
to home"
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,1)
GENERATE (4,4,2)
TDX.STATUS (#32)
TDX.WRITE (#F,4,3)
REPEAT 60 TDX.WRITE (#F,1,62)
TDX.WRITE (#F,4,3)
CLEAR (5)
TDX.WRITE (#F,2,3)
TDX.READ (#F,5,2)
COMPARE (3,5,2)
CLEAR (5)
TDX.STATUS (#32)
END
4.3 L̲I̲N̲K̲ ̲1̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#11,5)
TDX.OPEN ̲VDU (#32,0,#11,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#11)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.4 L̲I̲N̲K̲ ̲1̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#11,5)
TDX.OPEN ̲VDU (#32,0,#11,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#11)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.5 L̲I̲N̲K̲ ̲1̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#11,5)
TDX.OPEN ̲VDU (#32,0,#11,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#11)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.6 L̲I̲N̲K̲ ̲1̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#11,5)
TDX.OPEN ̲VDU (#32,0,#11,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#11)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.7 L̲I̲N̲K̲ ̲1̲2̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#12,5)
TDX.OPEN ̲VDU (#32,0,#12,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#12)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.8 L̲I̲N̲K̲ ̲1̲2̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#12,5)
TDX.OPEN ̲VDU (#32,0,#12,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#12)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.9 L̲I̲N̲K̲ ̲1̲2̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#12,5)
TDX.OPEN ̲VDU (#32,0,#12,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#12)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.10 L̲I̲N̲K̲ ̲1̲2̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#12,5)
TDX.OPEN ̲VDU (#32,0,#12,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#12)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.11 L̲I̲N̲K̲ ̲2̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#21,5)
TDX.OPEN ̲VDU (#32,0,#21,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#21)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.12 L̲I̲N̲K̲ ̲2̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#21,5)
TDX.OPEN ̲VDU (#32,0,#21,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#21)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.13 L̲I̲N̲K̲ ̲2̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#21,5)
TDX.OPEN ̲VDU (#32,0,#21,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#21)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.14 L̲I̲N̲K̲ ̲2̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#21,5)
TDX.OPEN ̲VDU (#32,0,#21,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#21)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.15 L̲I̲N̲K̲ ̲2̲2̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#22,5)
TDX.OPEN ̲VDU (#32,0,#22,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#22)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.16 L̲I̲N̲K̲ ̲2̲2̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#22,5)
TDX.OPEN ̲VDU (#32,0,#22,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#22)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.17 L̲I̲N̲K̲ ̲2̲2̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#22,5)
TDX.OPEN ̲VDU (#32,0,#22,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#22)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.18 L̲I̲N̲K̲ ̲2̲2̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#22,5)
TDX.OPEN ̲VDU (#32,0,#22,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#22)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.19 L̲I̲N̲K̲ ̲3̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#31,5)
TDX.OPEN ̲VDU (#32,0,#31,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#31)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.20 L̲I̲N̲K̲ ̲3̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#31,5)
TDX.OPEN ̲VDU (#32,0,#31,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#31)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.21 L̲I̲N̲K̲ ̲3̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#31,5)
TDX.OPEN ̲VDU (#32,0,#31,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#31)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.22 L̲I̲N̲K̲ ̲3̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#31,5)
TDX.OPEN ̲VDU (#32,0,#31,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#31)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.23 L̲I̲N̲K̲ ̲4̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#41,5)
TDX.OPEN ̲VDU (#32,0,#41,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#41)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.24 L̲I̲N̲K̲ ̲4̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#41,5)
TDX.OPEN ̲VDU (#32,0,#41,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#41)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.25 L̲I̲N̲K̲ ̲4̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#41,5)
TDX.OPEN ̲VDU (#32,0,#41,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#41)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.26 L̲I̲N̲K̲ ̲4̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#41,5)
TDX.OPEN ̲VDU (#32,0,#41,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#41)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.27 L̲I̲N̲K̲ ̲4̲2̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#42,5)
TDX.OPEN ̲VDU (#32,0,#42,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#42)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.28 L̲I̲N̲K̲ ̲4̲2̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#42,5)
TDX.OPEN ̲VDU (#32,0,#42,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#42)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.29 L̲I̲N̲K̲ ̲4̲2̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#42,5)
TDX.OPEN ̲VDU (#32,0,#42,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#42)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.30 L̲I̲N̲K̲ ̲4̲2̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#42,5)
TDX.OPEN ̲VDU (#32,0,#42,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#42)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.31 L̲I̲N̲K̲ ̲5̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#51,5)
TDX.OPEN ̲VDU (#32,0,#51,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#51)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.32 L̲I̲N̲K̲ ̲5̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#51,5)
TDX.OPEN ̲VDU (#32,0,#51,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#51)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.33 L̲I̲N̲K̲ ̲5̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#51,5)
TDX.OPEN ̲VDU (#32,0,#51,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#51)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.34 L̲I̲N̲K̲ ̲5̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#51,5)
TDX.OPEN ̲VDU (#32,0,#51,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#51)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.35 L̲I̲N̲K̲ ̲5̲2̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#52,5)
TDX.OPEN ̲VDU (#32,0,#52,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#52)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.36 L̲I̲N̲K̲ ̲5̲2̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#52,5)
TDX.OPEN ̲VDU (#32,0,#52,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#52)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.37 L̲I̲N̲K̲ ̲5̲2̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#52,5)
TDX.OPEN ̲VDU (#32,0,#52,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#52)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.38 L̲I̲N̲K̲ ̲5̲2̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#52,5)
TDX.OPEN ̲VDU (#32,0,#52,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#52)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.39 L̲I̲N̲K̲ ̲6̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#61,5)
TDX.OPEN ̲VDU (#32,0,#61,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#61)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.40 L̲I̲N̲K̲ ̲6̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#61,5)
TDX.OPEN ̲VDU (#32,0,#61,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#61)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.41 L̲I̲N̲K̲ ̲6̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#61,5)
TDX.OPEN ̲VDU (#32,0,#61,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#61)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.42 L̲I̲N̲K̲ ̲6̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#61,5)
TDX.OPEN ̲VDU (#32,0,#61,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#61)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.43 L̲I̲N̲K̲ ̲7̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#71,5)
TDX.OPEN ̲VDU (#32,0,#71,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#71)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.44 L̲I̲N̲K̲ ̲7̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#71,5)
TDX.OPEN ̲VDU (#32,0,#71,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#71)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.45 L̲I̲N̲K̲ ̲7̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#71,5)
TDX.OPEN ̲VDU (#32,0,#71,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#71)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.46 L̲I̲N̲K̲ ̲7̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#71,5)
TDX.OPEN ̲VDU (#32,0,#71,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#71)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.47 L̲I̲N̲K̲ ̲8̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#81,5)
TDX.OPEN ̲VDU (#32,0,#81,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#81)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.48 L̲I̲N̲K̲ ̲8̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#81,5)
TDX.OPEN ̲VDU (#32,0,#81,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#81)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.49 L̲I̲N̲K̲ ̲8̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#81,5)
TDX.OPEN ̲VDU (#32,0,#81,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#81)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.50 L̲I̲N̲K̲ ̲8̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#81,5)
TDX.OPEN ̲VDU (#32,0,#81,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#81)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.51 L̲I̲N̲K̲ ̲9̲1̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#91,5)
TDX.OPEN ̲VDU (#32,0,#91,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#91)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.52 L̲I̲N̲K̲ ̲9̲1̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#91,5)
TDX.OPEN ̲VDU (#32,0,#91,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#91)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.53 L̲I̲N̲K̲ ̲9̲1̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#91,5)
TDX.OPEN ̲VDU (#32,0,#91,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#91)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.54 L̲I̲N̲K̲ ̲9̲1̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#91,5)
TDX.OPEN ̲VDU (#32,0,#91,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#91)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.55 L̲I̲N̲K̲ ̲9̲2̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#92,5)
TDX.OPEN ̲VDU (#32,0,#92,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#92)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.56 L̲I̲N̲K̲ ̲9̲2̲2̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#92,5)
TDX.OPEN ̲VDU (#32,0,#92,5,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#92)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.57 L̲I̲N̲K̲ ̲9̲2̲3̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#92,5)
TDX.OPEN ̲VDU (#32,0,#92,7,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#92)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.58 L̲I̲N̲K̲ ̲9̲2̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#92,5)
TDX.OPEN ̲VDU (#32,0,#92,9,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#92)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
4.59 L̲I̲N̲K̲ ̲A̲2̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
These testsequences, along with the VDU common testsequence
(sec. 4.1), are only applied if the OCR is unavailable.
In this case the link is tested with a VDU connected.
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#A2,5)
TDX.OPEN ̲VDU (#32,0,#A2,3,5,#F)
END
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#A2)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
5̲ ̲P̲T̲P̲/̲P̲T̲R̲ ̲A̲N̲D̲ ̲O̲C̲R̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
5.1 L̲I̲N̲K̲ ̲A̲1̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲ ̲(̲P̲T̲P̲/̲P̲T̲R̲)̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#A1,5)
TDX.OPEN ̲VDU (#32,0,#A1,3,5,#F)
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:13:)(:10:)…08…)
GENERATE (1,1,31)
CLEAR (2)
TDX.WRITE (#F,1,62)
TDX.READ (#F,2,62)
COMPARE (1,2,31)
CLEAR (2)
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#A2)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
5.2 L̲I̲N̲K̲ ̲A̲2̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲ ̲(̲O̲C̲R̲)̲,̲ ̲D̲O̲ ̲#̲p̲a̲g̲e̲.̲d̲i̲s̲p̲l̲a̲c̲e̲m̲e̲n̲t̲
This test is only applied if the OCR is available at
the time of the test.
BEGIN
TDX.INITIALIZE (#32)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,#A2,5)
TDX.OPEN ̲VDU (#32,0,#A2,3,5,#F)
(Body wil be defined when the actual OCR is known
)
TDX.CLOSE ̲VDU (#F)
TDX.CLOSE ̲SUBDEVICE (#32,0,#A2)
TDX.CLOSE ̲BUS (#32,0)
TDX.SHUTDOWN (#32)
END
A P P E N D I X D
********************************
TBD
