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Notes: CPS/PSP/001
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…00……00……00……00……00……09……0a……00……00……09……0b……09……02……09……07……86…1 …02… …02… …02…
…02…CPS/PSP/001
RESYNCHRONIZATION MODULE CR 80112 …02…IJO/840309…02……02…
PRODUCT SPECIFICATION
…02…ISSUE 1…02…CAMPS
T̲A̲B̲L̲E̲ ̲O̲F̲ ̲C̲O̲N̲T̲E̲N̲T̲S̲
0 SCOPE .........................................
4
1 APPLICABLE DOCUMENTS ...........................
4
2 INTRODUCTION ...................................
4
2.1 BLOCK DIAGRAM ..............................
4
3 ELECTRICAL INTERFACE ...........................
6
3.1 V24 Channels ...............................
6
3.1.1 Resync.circuits:105, 106, 107 and 109 ..
6
3.1.1.1 Inputs .............................
6
3.1.1.2 Outputs ............................
6
3.1.2 Circuits: 103, 104, 108.2, 114 and 115 .
6
3.1.2.1 Passive ............................
6
3.1.2.2 Active .............................
6
3.1.3 Circuit 101 ............................
8
3.2 Alarm Output ...............................
8
3.3 Reset Input ................................
8
3.4 Power Supply ...............................
9
3.5 Interface Connections ......................
9
4 MECHANICAL INTERFACE ...........................
12
5 FUNCTIONAL DESCRIPTION .........................
13
5.1 Single Channel Operation ...................
13
6 INSTALLATION ...................................
13
6.1 V24 Interface ..............................
13
6.2 Alarm Interface ............................
13
7 OPTIONS ........................................
17
7.1 Variant Specification ......................
17
7.2 Strap Setting ..............................
17
0. S̲C̲O̲P̲E̲
This document specifies the interface, operation and
performance of the Resynchronization Module, which
provides the posibility of interfacing two independent
V24 HOST-CRYPTO channels.
1. A̲P̲P̲L̲I̲C̲A̲B̲L̲E̲ ̲D̲O̲C̲U̲M̲E̲N̲T̲S̲
DOC (1) CTX - CRATE
CR 1053 - /000 - -/00
TECHNICAL MANUAL
CSD-MIC/005/TCM/0019
DOC (2) RESYNCHRONIZATION MODULE
CR 80112/000 - -/0 -
TECHNICAL MANUAL
2. I̲N̲T̲R̲O̲D̲U̲C̲T̲I̲O̲N̲
2.1 B̲L̲O̲C̲K̲D̲I̲A̲G̲R̲A̲M̲.̲
In figure 2-1 the Module Block Diagram is shown. The
Resynchronization Module consists of two functionally
independent circuits each controlling one HOST-CRYPTO
V24-interface channel.
Each channel has the ability of initially synchronizing
and resynchronizing (if synchronizing is lost) its
V24 line.
If synchronization is not achieved within three attempts
the line is closed and an alarm is issued.
Reset of an erroneous channel is executed by pressing
the common Reset Button located on the front panel.
Figure 2-1 BLOCK DIAGRAM
3. E̲L̲E̲C̲T̲R̲I̲C̲A̲L̲ ̲I̲N̲T̲E̲R̲F̲A̲C̲E̲
3.1 V̲2̲4̲ ̲C̲H̲A̲N̲N̲E̲L̲S̲
3.1.1 R̲e̲s̲y̲n̲c̲h̲r̲o̲n̲i̲z̲a̲t̲i̲o̲n̲ ̲c̲i̲r̲c̲u̲i̲t̲s̲:̲ ̲1̲0̲5̲,̲ ̲1̲0̲6̲,̲ ̲1̲0̲7̲ ̲a̲n̲d̲ ̲1̲0̲9̲.
3.1.1.1 I̲n̲p̲u̲t̲s̲
Specifications meet EIA RS-232-C or MIL-STD-188C requirements
(jumper selectable). All inputs are fail- safe (offset
+ 3V).
3.1.1.2 O̲u̲t̲p̲u̲t̲s̲
Specifications meet MIL-STD-118C requirements. Slew-rate
is resistor selectable to max. required Baud-rate (Ref.
table 3.1-1). Shortcircuit protected.
3.1.2 C̲i̲r̲c̲u̲i̲t̲s̲:̲ ̲1̲0̲3̲,̲ ̲1̲0̲4̲,̲ ̲1̲0̲8̲.̲2̲,̲ ̲1̲1̲4̲ ̲a̲n̲d̲ ̲1̲1̲5̲
3.1.2.1 P̲a̲s̲s̲i̲v̲e̲
By means of straps these circuits can be fed directly
through the module.
3.1.2.2 A̲c̲t̲i̲v̲e̲
a) Input specifications meet EIA RS-232-C or MIL-STD-188C
requirements (jumper selectable).
b) Output specifications meet MIL-STD-188C requirements.
Slew-rate is resistor selectable to max. required
Baud-rate (Ref. Table 3.2-1 and 3.1-2). Shortcircuit
protected.
B̲a̲u̲d̲-̲r̲a̲t̲e̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲S̲l̲e̲w̲-̲r̲a̲t̲e̲ ̲r̲e̲s̲i̲s̲t̲o̲r̲
300 2.2M
600 1.2M
1200 680K
2400 330K
4800 180K
9600 82K
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Table 3.1-1 Baud-rate vs. slew-rate resistor value.
C̲i̲r̲c̲u̲i̲t̲:̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲1̲:̲ ̲ ̲ ̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲2̲:̲
103/104 R22 R63
105/106 R25 R66
107/109 R35 R76
108.2 R39 R81
114/115 R41 R83
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Table 3.1-2 Slew-rate resistors.
3.1.3 C̲i̲r̲c̲u̲i̲t̲ ̲1̲0̲1̲
Frame ground can be terminated for each V24 connector
individually.
3.2 A̲l̲a̲r̲m̲ ̲O̲u̲t̲p̲u̲t̲
One common alarm for both channels.
Normal: "1" Logical high
Alarm: "0" Logical low
Active low (Open collector)
V…0f…OH…0e… max. + 15V
V…0f…OL…0e… + o.5V
I…0f…SINK…0e… max. 16 mA
3.3 R̲e̲s̲e̲t̲ ̲I̲n̲p̲u̲t̲ ̲(̲O̲p̲t̲i̲o̲n̲a̲l̲)̲
Reset can be performed by an external active low signal.
Normal: "1" Logical high
Reset : "0" Logical low
Passive pull-up
V…0f…IH…0e… max. + 5.0V
V…0f…IL…0e… + 0.7V
I…0f…I…0e… max. - 3.7 mA.
3.4 P̲o̲w̲e̲r̲ ̲S̲u̲p̲p̲l̲y̲
The module is powered from the CTX-Crate mainbus and
requires:
+5V …0e…+…0f…/…0f…-…0e… 5% typ. 150 mA
+12V …0e…+…0f…/…0f…-…0e… 5% typ. 500 mA
-12V …0e…+…0f…/…0f…-…0e… 5% typ. 500 mA
Pin layout of mainbus edgeconnector (P1) is shown in
Figure 3.5-2.
3.5 I̲n̲t̲e̲r̲f̲a̲c̲e̲ ̲C̲o̲n̲n̲e̲c̲t̲i̲o̲n̲s̲
The Resynchronization Module interfaces to the Host-
and Crypto lines via Cannon DB-25 connectors and the
front panel. Pin layout is shown in Figure 3.5-1.
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲P̲i̲n̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲C̲i̲r̲c̲u̲i̲t̲ ̲ ̲ ̲ ̲ ̲
1 101
7 102
2 103
3 104
4 105
5 106
6 107
20 108.2
8 109
15 114
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲1̲7̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲1̲1̲5̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Figure 3.5-1 V24 connector Layout. (J1 - J4).
̲ ̲ ̲ ̲A̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲P̲i̲n̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲B̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
1
2
Not used . Not used
.
.
34
Sign. Gnd. 35 Sign. Gnd.
NC 36 NC
GND 37 GND
+ 12V 38 + 12V
- 12V 39 - 12V
+ 5V 40 + 5V
+ 5V 41 + 5V
GND 42 GND
̲ ̲ ̲ ̲G̲N̲D̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲4̲3̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲G̲N̲D̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Figure 3.5-2 CTX Mother Board connections (P1).
The Resynchronization Module interfaces to the BSM-X
via a 48 pin connector (P2) located above the CTX-
Motherboard (normally u-Bus position). Pin layout is
shown in Figure 3.5-3.
̲ ̲ ̲ ̲P̲i̲n̲ ̲ ̲ ̲ ̲ ̲a̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲b̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲c̲ ̲ ̲ ̲ ̲
16 GND GND
15
14 Reset in GND
13 Thermo in * Alarm
12 GND GND *
11
10
9
8
7
6
5
4 Thermo in *
3 GND *
2
̲ ̲ ̲ ̲ ̲1̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Figure 5.1-3 BSM-X Connections (P2).
* pins reserved for external coupling of thermo
sensor.
4. M̲E̲C̲H̲A̲N̲I̲C̲A̲L̲ ̲I̲N̲T̲E̲R̲F̲A̲C̲E̲
The Resynchronization Module is located in a double
CAMAC-module and fits into a standard 86 pin connector
and a 48 pin connector in the CTX-Crate.
HOST interface connectors J1 and J3 (CANNON DB25S)
and CRYPTO interface connectors J2 and J4 (CANNON DB25P)
are located on the front panel.
Figure 4-1. Physical appearance.
Height: 221.5 mm
Width: 34.2 mm
Depth : 336.3 mm
Weight: 0.65 kg
5 F̲U̲N̲C̲T̲I̲O̲N̲A̲L̲ ̲D̲E̲S̲C̲R̲I̲P̲T̲I̲O̲N̲
The two HOST-CRYPTO channels are functionally independent
except for the Common Synch. Error Output and Reset
functions.
The following description applies for both channels.
Please refer to Block Diagram, Figure 2-1.
On module power-up all outputs are brought low, and
the sequence logic waits for circuit 107b (CRYPTO DSR)
to go high.
Circuit 107b is monitored high for 1.5 sec., then the
logic waits for 105a (HOST RTS) indicating synchronization
wanted.
When 105a goes high, 105b is also brought high for
3 sec., and 106b (CRYPTO CTS) and 109b (CRYPTO DCD)
are monitored.
If both go high within 3 sec. 106a is brought high,
this indicates synchronization is established and traffic
can be passed as long as 105a, 106b and 109b are high.
If 106b or 109b fails to go high within 3 sec., after
105b is brought high, this is recognized as an unsuccessful
attempt to synchronize the crypto link, and 105b is
brought low for 1.5 sec., and the synchronization procedure
is repeated.
If synchronization is not achieved within 3 attempts,
this is recognized as a link failure and an error signal
(active low) is issued, in addition a LED on the front
panel is lit indicating the erroneous channel.
Reset of a failed channel is performed by pressing
the reset button located on the front panel, this causes
the whole process (3 synch.attempts) to be repeated.
Pressing the reset button does in no way influence
an already synchronized channel.
If synchronization is obtained and then later on lost,
due to loss of circuit 106b or 109b, this is recognized
as an new situation and 3 synch. attempts are performed.
5.1 S̲i̲n̲g̲l̲e̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲O̲p̲e̲r̲a̲t̲i̲o̲n̲
If only one channel is used the other is simply left
open, both V24 connectors unused is recognized as an
idle situation.
6 I̲N̲S̲T̲A̲L̲L̲A̲T̲I̲O̲N̲
The Resynchronization Module must be located in front
slot no. 7 of a CTX-Crate, where it is powered from
the motherboard connections (+5, +12 and -12V) and
connects to external alarm circuity via P2.
6.1 V̲2̲4̲ ̲I̲n̲t̲e̲r̲f̲a̲c̲e̲
Figure 6-1 shows a typical application of the Resynch.
Module (only one channel is shown).
6.2 A̲l̲a̲r̲m̲ ̲I̲n̲t̲e̲r̲f̲a̲c̲e̲
In Figure 6-2 is shown the interconnections between
the Resync. Module and the CTX-Crate motherboard. Enabling
control-signals to be routed to the BSM-X, where initial
processing is performed.
Figure 6-1: Resynch. Module V24 Interface.
Typical Application (1 channel).
Figure 6-2: Alarm Interface
Motherboard connections.
7 O̲P̲T̲I̲O̲N̲S̲
7.1 V̲a̲r̲i̲a̲n̲t̲ ̲S̲p̲e̲c̲i̲f̲i̲c̲a̲t̲i̲o̲n̲
The Resynchronization Module can be equipped for different
applications.
a) C̲R̲ ̲8̲0̲1̲1̲2̲/̲0̲0̲0̲ ̲-̲ ̲-̲ ̲/̲0̲0̲,̲ ̲ ̲ ̲p̲/̲n̲:̲ ̲4̲.̲0̲4̲2̲7̲6̲-̲0̲0̲
All circuits are active and can be strapped to
meet RS-232-C or MIL-188-C requirements independently.
b) C̲R̲ ̲8̲0̲1̲1̲2̲/̲0̲0̲0̲ ̲-̲ ̲-̲/̲0̲1̲,̲ ̲ ̲ ̲p̲/̲n̲:̲ ̲4̲.̲0̲4̲2̲7̲6̲-̲0̲1̲
Circuits 103,104, 108.2, 114 and 115 are passive,
which means that DCE and DTE interface must apply
to same requirements, i.e. RS-232-C or MIL-188-C.
7.2 S̲t̲r̲a̲p̲ ̲S̲e̲t̲t̲i̲n̲g̲
Table 7.2.-1 and 7.2.-2 shows the strapping possibilities
for channel 1 and channel 2 respectively, also is indicated
for which variant a specific strap option is applicable.
C̲H̲A̲N̲N̲E̲L̲ ̲ ̲1̲:̲
Circuit Strap Function Version
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
103 SR1 mounted Circuit passive 01
103 SR2 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input im-
pedance.
103/104 SR3 mounted RS-232-C hysteresis 00
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
103/104 SR4 A RS-232-C(DCE) to MIL- 00
188-C(DTE).
B RS-232-C to RS-232-C
or MIL-188-C to MIL-
188-C.
104 SR5 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input impe-
dance.
104 SR6 mounted Circuit passive 01
105 SR7 open Reserved for future --
applications.
105 SR8 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
105/106 SR9 mounted RS-232-C hysteresis 00/01
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
106 SR10 open Reserved for future
-
-
applications.
106 SR11 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
C̲H̲A̲N̲N̲E̲L̲ ̲ ̲1̲:̲
Circuit Strap Function Version
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
107/109 SR12 mounted RS-232-C hysteresis 00/01
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
107 SR13 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
109 SR14 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
108.2 SR15 mounted Circuit passive 01
108.2 SR16 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input impe-
dance.
108-2 SR17 mounted RS-232-C hysteresis 00
+/- 2.6V
open MIL-188-C hysteresis
+/- 0.45V.
114 SR18 mounted Circuit passive. 01
114/115 SR19 mounted RS-232-C hysteresis 00
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
114 SR20 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input impe-
dance.
115 SR21 mounted Circuit passive. 01
115 SR22 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input impe-
dance.
C̲H̲A̲N̲N̲E̲L̲ ̲ ̲1̲:̲
Circuit Strap Function Version
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
101 SR47 mounted Protective ground 00/01
connected to J1.
SR48 mounted Protective ground 00/01
connected to J2.
Tabel 7.2-1
Strap setting Channel 1.
C̲H̲A̲N̲N̲E̲L̲ ̲ ̲2̲:̲
Circuit Strap Function Version
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
103 SR23 mounted Circuit passive 01
103 SR24 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input im-
pedance.
103/104 SR25 mounted RS-232-C hysteresis 00
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
103/104 SR26 A RS-232-C(DCE) to MIL- 00
188-C(DTE).
B RS-232-C to RS-232-C
or MIL-188-C to MIL-
188-C.
104 SR27 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input impe-
dance.
104 SR28 mounted Circuit passive 01
105 SR29 open Reserved for future --
applications.
105 SR30 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
105/106 SR31 mounted RS-232-C hysteresis 00/01
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
106 SR32 open Reserved for future
-
-
applications.
106 SR33 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
C̲H̲A̲N̲N̲E̲L̲ ̲ ̲2̲:̲
Circuit Strap Function Version
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
107/109 SR34 mounted RS-232-C hysteresis 00/01
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
107 SR35 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
109 SR36 mounted RS-232-C input impe- 00/01
dance.
open MIL-188-C input impe-
dance.
108.2 SR37 mounted Circuit passive 01
108.2 SR38 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input impe-
dance.
108-2 SR39 mounted RS-232-C hysteresis 00
+/- 2.6V
open MIL-188-C hysteresis
+/- 0.45V.
114 SR40 mounted Circuit passive. 01
114/115 SR41 mounted RS-232-C hysteresis 00
+/- 2.6V.
open MIL-188-C hysteresis
+/- 0.45V.
114 SR42 mounted RS-232-C input impe- 00
dance.
open MIL-188-C input impe-
dance.
115 SR43 mounted Circuit passive. 01
115 SR44 mounted RS-232-C input impe- 00
dance.
open MIL-188-C inout impe-
dance.
C̲H̲A̲N̲N̲E̲L̲ ̲ ̲2̲:̲
Circuit Strap Function Version
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
101 SR45 mounted Protective ground 00/01
connected to J3.
SR46 mounted Protective ground 00/01
connected to J4.
Tabel 7.2-2
Strap setting Channel 2.
