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Derivation
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LIST
OF
CONTENTS
7. RMA
7.1 Introduction
7.2 Reliability
Models
and
Block
Diagrams
7.2.1 Reliability
Models
fo
PU's
7.2.2 Reliability
Models
for
CU's
7.2.3 Node
Reliability
7.24 EMH
Reliability
7.2.5 GTW
Reliability
7.2.6 Site
Reliability
7.2.7 NCC
Subsystem
7.2.8 Network
Availability
7.3 Equipment
Mean
Time
Between
Failures
(MTBF)
7.4 Equipment
Maintainability
(MTTR)
7.5 RMA
Analysis
7.5.1 RMA
Analysis
for
Communicaton
Lines…86…1
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7 R̲E̲L̲I̲A̲B̲I̲L̲I̲T̲Y̲,̲M̲A̲I̲N̲T̲A̲I̲N̲A̲B̲I̲L̲I̲T̲Y̲
̲A̲N̲D̲
̲A̲V̲A̲I̲L̲A̲B̲I̲L̲I̲T̲Y̲
̲A̲N̲A̲L̲Y̲S̲I̲S̲
This
chapter
provides
the
detailed
analysis
of
the
reliability
and
maintainability
provided
by
the
proposed
equipment
Emphasis
has
been
given
to
include
the
analysis
for
the
range
covered
by
the
proposed
system
architecture.
Furthermore,
detailed
information
with
respect
to
failure
rates
and
repair
times
is
provided
for
the
various
components
and
modules
includedin
the
architecture.
7.1 I̲N̲T̲R̲O̲D̲U̲C̲T̲I̲O̲N̲
The
availablity
of
the
proposed
equipment
is
very
high
due
not
only
to
a
high
reliability
of
individual
system
elments,
but
not
least
due
to
the
chosen
CR80
computer
configuration,
where
functional
like
elments
automatically
substitute
each
other
in
case
of
failure.
Overall
system
availability
has
been
calculated.
The
high
system
availability
has
been
achieved
by
use
of
highly
reliable
modules,
redundant
processor
units
and
line
termination
units,and
automatic
reconfiguration
facilities.
Care
has
been
taken
to
ensure
that
single
point
errors
do
not
cause
total
system
failure.
The
reliability
criteria
imposed
on
the
computer
systems
has
been
evaluated
and
the
proposed
hardware/software
opeational
system
analysed
to
determine
the
degree
of
availability
and
data
integrity
provided.
In
this
chapter
reliability
is
stated
in
numerical
terms
and
the
detailed
predictions
derived
from
mathematical
models
presented.
The
availability
predicions
are
made
in
accordance
with
system
reliability
models
and
block
daiagrams
corresponding
to
the
proposed
configuration.
This
procedure
involves
the
use
of
module
level
and
processor
unit
level
failure
rates,
or
MTBF,
(mean
time
between
failure)ans
repair
times
or
MTTR,
(mean
time
to
repair);
these
factors
are
used
in
conjunction
with
a
realistic
modelling
of
the
configuration
to
arrive
at
system
level
MTBF
and
availability.
Tabulated
results
of
the
analysis
are
presented
including
the
eliabilty
factors:
system
MTBF
and
repair
time
MTTR.…86…1
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The
basic
elements
of
the
proposed
system
architecture
are
constituted
by
standard
CR80
units.
Reliabilty
and
maintainability
engineering
was
significant
factor
in
guiding
the
deveopment
of
the
CR80.
The
CR80
architecture
is
designed
with
a
capability
to
achieve
a
highly
reliable
computer
system
in
a
cost-effective
way.
It
provides
a
reliable
set
of
services
to
the
users
of
the
system,
because
it
may
be
customised
to
the
atual
availability
requirements.
The
CR80
fault
tolerant
computers
are
designed
to
avoid
a
single
point
errors
of
all
critical
system
elements
by
provision
of
redundancy
paths,processor
capabilities
and
power
supplies.
The
architecture
reflects
th
fact
that
the
reliability
of
peripheral
devices
is
lower
than
that
of
the
associated
CR80
device
controllers.
This
applies
equally
well
to
communication
lines
where
modems
are
used
as
part
of
the
transmission
media.
Thus,
the
peripheral
devices
,
odems,
communication
lines,
etc
impact
the
system
availability
much
more
than
the
corresponding
device
controllers.
In
connection
with
communication
lines,
the
CR80
CU's
utilises
n
out
of
n+1
LTU's
and
n
LIA-S's
to
achieve
the
highest
possible
aailability
to
individual
subscribers.
The
functions
of
a
failed
LTU
can
automatically
be
taken
over
by
the
spare
LTU,
electronically
controlled
by
enabling
the
appropriate
LIA-S.
To
assure
this
very
highly
reliable
product,
several
criterias
werealso
introduced
on
the
module
level:
An
extensive
use
of
hi-rel,
mil-spec
components,
ICs
are
tested
to
the
requirements
of
MIL-STD
883
level
B
or
similar.…86…1
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…02…
All
hardware
is
designed
in
accordance
with
the
general
CR80
H/W
design
principles.
These
include
derating
specifications,
which
greatly
enhance
the
reliability
and
reduce
the
senibility
to
parameter
variations.
Critical
modules
feature
a
Built-In(BIT)
capability
as
well
as
a
display
of
the
main
states
of
the
internal
process
by
Light
Emitting
Diodes
on
the
module
front
plate.
This
greatly
improves
module
maintainability
as
it
provides
debug
and
trouble
shooting
methods,
which
reduce
the
repair
time.
A
high
quality
production
line,
which
includes
high
quality
soldering,
inspection,
burn-in
and
an
extensive
automatic
functional
test.
7.2 R̲E̲L̲I̲A̲B̲I̲L̲I̲T̲Y̲
̲M̲O̲D̲E̲L̲S̲
̲A̲N̲D̲B̲L̲O̲C̲K̲
̲ ̲D̲I̲A̲G̲R̲A̲M̲S̲
The
computer
system
is
partitioned
into
system
elements
and
the
models
used
for
relaibility
and
availabilty
predictions
show
how
the
proposed
equipment
provides
the
high
degree
of
reliability
required.
The
system
reliability
chaacteristics
for
the
system
are
stated
in
numerical
terms
by
mathematical
models;
the
supporting
detailed
predictions
are
presented
in
this
chapter.
The
system
models
are
partitioned
into
modular
units
and
system
elements
that
reflect
the
redundancyof
the
configuration;
it
accounts
for
all
interconnections
and
switching
points.
The
MTBF
and
MTTR
for
the
individual
elements
used
in
the
calculations
were
obtained
from
experience
with
similar
equipment
on
the
NICS-TARE,FIKS
and
CAMPS
programmes.The
figures
quoted
on
peripheral
equipment
are
based
on
data
supplied
by
the
manufacturers.
The
equipment
has
been
partitioned
and
functions
apportioned
so
that
system
elements
can
have
only
two
states
-
operable
or
failed.
System
elements
are
esentially
stand-alone
and
free
of
chain
failures.
Careful
attention
has
been
paid
in
the
design
to
eliminate
series
risk
elements.
Redundants
units
are
repairable
without
interruption
of
service.
Maintenance
and
reconfiguration
is
possible
withoutcompromising
system
performance…86…1
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The
primary
source
selected
for
authenticated
relaibility
data
and
predictions
is
the
MIL-HDBK-217.
The
failure
rate
data
are
primarily
obtained
from
experience
from
previous
progrmmes
and
continuously
revised
as
part
of
the
maintenance
programme
on
concurrent
programmes.
The
relialibility
models
which
apply
to
the
proposed
configurations
are
identified
in
the
figures
shown
on
the
following
pages.…86…1
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…02…
…02…
…02…
7.2.1 R̲e̲l̲i̲a̲b̲i̲l̲i̲t̲y̲
̲M̲o̲d̲e̲l̲s̲
̲f̲o̲r̲
̲P̲U̲'̲s̲
The
relaibility
models
MTBF
and
availability
predictions
for
the
Processing
Units
are
shown
in
the
figure
below:
N̲O̲D̲E̲ ̲P̲R̲O̲C̲E̲S̲S̲O̲ ̲U̲N̲I̲T̲
Fig.III 7.2.1-1…86…1 …02… …02… …02… …02…
N̲M̲H̲ ̲P̲R̲O̲C̲E̲S̲S̲O̲R̲ ̲U̲N̲I̲T̲
Fig.III 7.2.1-2…86…1 …02… …02… …02… …02…
N̲C̲C̲ ̲&̲ ̲G̲A̲T̲E̲W̲A̲Y̲ ̲P̲R̲O̲C̲E̲S̲S̲O̲R̲ ̲U̲N̲I̲T̲
Fig. III 7.2.1-3…86…1 …02… …02… …02… …02…
E̲M̲H̲ ̲P̲R̲O̲C̲E̲S̲S̲O̲R̲ ̲U̲N̲I̲T̲
Fig. III 7.2.1-4…86…1 …02… …02… …02… …02…
F̲E̲P̲ ̲P̲R̲O̲C̲E̲S̲S̲O̲R̲ ̲U̲N̲I̲T̲ ̲(̲M̲A̲X̲ ̲C̲O̲N̲F̲I̲G̲U̲R̲A̲T̲I̲O̲N̲)̲
Fig. III 7.2.1-5…86…1 …02… …02… …02… …02…
7.2.2 R̲e̲l̲i̲a̲b̲i̲l̲i̲t̲y̲
̲M̲o̲d̲e̲l̲s̲
̲f̲o̲r̲
̲C̲U̲'̲s̲
The
reliability
models,
MTBF
and
availability
for
the
channel
units
are
shown
in
the
figures
below.
N̲o̲d̲e̲
̲C̲h̲a̲n̲n̲e̲l̲
̲U̲n̲i̲t̲
̲#̲
̲1̲
N̲o̲d̲e̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲U̲n̲i̲t̲ ̲#̲ ̲2̲
N̲o̲d̲e̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲U̲n̲i̲t̲ ̲#̲ ̲3̲ ̲
E̲M̲H̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲U̲n̲i̲t̲
G̲T̲Y̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲U̲n̲i̲t̲
N̲C̲C̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲U̲n̲i̲t̲
F̲E̲P̲ ̲C̲h̲a̲n̲n̲e̲l̲ ̲U̲n̲i̲t̲
7.2.3 N̲o̲d̲e̲ ̲R̲e̲l̲i̲a̲b̲i̲l̲i̲t̲y̲
Shown in the figure below is the Node Reliability model
7.2.4 E̲M̲H̲ ̲R̲e̲l̲i̲a̲b̲i̲l̲i̲t̲y̲
In the figure below the reliability for the EMH is
shown.
7.2.5 G̲T̲W̲ ̲R̲e̲l̲i̲a̲b̲i̲l̲i̲t̲y̲
In the figure below the reliability for the Gateway
Processor is shown.
7.2.6 S̲i̲t̲e̲ ̲R̲e̲l̲i̲a̲b̲i̲l̲i̲t̲y̲
In the figures below the reliability models for the
sites are shown.
