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⟦b5030aa18⟧ Wang Wps File
Length: 40080 (0x9c90)
Types: Wang Wps File
Notes: CPS/TPR/040 FAT SITE 10
Names: »3952A «
Derivation
└─⟦4e53744cd⟧ Bits:30006176 8" Wang WCS floppy, CR 0344A
└─ ⟦this⟧ »3952A «
WangText
…00……00……00……00……00…H…0a……00……00…H…0b…H…00…H G…09…G…0e…G
F…08…F…0d…F…02…F…07…E…0b…E…0f…E
E…07…D…0a…D…0f…D
…02…CPS/TPR/040
…02…CSV/830818…02……02…
FACTORY ACCEPTANCE TEST SPECIFICATION
AND PROCEDURES, SITE 10…02……02…CAMPS
A P P E N D I X A
********************************
1̲ ̲G̲E̲N̲E̲R̲A̲L̲
During the Factory Acceptance test a number of inputcommands
of the type:
DO (BODY)
are used.
This commandtype is used to activate a testsequence resident
in main memory, i.e the actual testprogram now accepts testcommands
from this testsequence and not from the OC. When the activated
testsequence has finished, commandinputs are again taken from
the OC. Testsequences used in the testprocedures are explained
in the following.
2̲ ̲D̲I̲S̲K̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
2.1 D̲I̲S̲K̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲T̲E̲S̲T̲
DISK.INITIALIZE(#1023,#500)
DISK.INITIALIZE(#1025,#540)
DISK.INITIALIZE(#1026,#580)
FD.INITIALIZE(#1001)
DISK.INCLUDE (#1023,MMD0,0,0,MMD82)
DISK.INCLUDE (#1023,MMD1,0,1,MMD82)
DISK.INCLUDE (#1025,SMD0,0,0,SMD80)
DISK.INCLUDE (#1026,MMD2,0,0,MMD82)
DISK.INCLUDE (#1026,MMD3,0,1,MMD82)
FD.INCLUDE(#1001,FD0,0,FD ̲SINGLE)
FD.INCLUDE(#1001,FD1,1,FD ̲SINGLE)
REPORTLEVEL = 2
DEFINE (1,'THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789')
GENERATE(1,0,32)
REPEAT 10
BEGIN
DISK.WRITE(MMDO,1,#100.0,0)
DISK.WRITE(MMD1,1,#500.0,0)
DISK.WRITE(MMD0,1,#100.0,0)
DISK.WRITE(MMD2,1,#100.0,0)
DISK.WRITE(MMD3,1,#500.0,0)
FD.WRITE(FD0,1,400,0)
FD.WRITE(FD1,1,400,0)
CLEAR(1)
DISK.READ(MMD0,1,#100.0,1)
COMPARE(0,1,32)
CLEAR(1)
DISK.READ(MMD1,1,#500.0,1)
COMPARE(0,1,32)
CLEAR(1)
DISK.READ(SMD0,1,#100.0,1)
COMPARE(0,1,32)
CLEAR(1)
DISK.READ(MMD2,1,#100.0,1)
COMPARE(0,1,32)
CLEAR(1)
DISK.READ(MMD3,1,#500.0,1)
COMPARE(0,1,32)
CLEAR(1)
FD.READ(FD0,1,#400,1)
COMPARE(0,1,32)
CLEAR(1)
FD.READ(FD1,1,#400,1)
COMPARE(0,1,32)
CLEAR(1)
END
DISK.EXCLUDE (MMD0)
DISK.EXCLUDE (MMD1)
DISK.EXCLUDE (SMD0)
DISK.EXCLUDE (MMD2)
DISK.EXCLUDE (MMD3)
FD.EXCLUDE(FD0)
FD.EXCLUDE(FD1)
DISK.SHUTDOWN(#1023)
DISK.SHUTDOWN(#1025)
DISK.SHUTDOWN(#1026)
FD.SHUTDOWN(#1001)
3̲ ̲L̲T̲U̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
3.1 L̲T̲U̲ ̲#̲1̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲L̲T̲U̲1̲1̲
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#0E1A #0B63 #630E) "Cursor one line
up
Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
REPORTLEVEL = 2
LTU.INITIALIZE (#1007,#400)
LTU.OPEN ̲SUBDEVICE (#1007,0,LTU,2400)
CLEAR(1)
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,61)
CLEAR (0)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,6)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
END
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#1007)
3.2 L̲T̲U̲ ̲#̲2̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲L̲T̲U̲2̲1̲
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#0E1A #0B63 #630E) "Cursor one line
up
Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
REPORTLEVEL = 2
LTU.INITIALIZE (#1008,#410)
LTU.OPEN ̲SUBDEVICE (#1008,0,LTU,2400)
CLEAR(1)
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,61)
CLEAR (0)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,6)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
END
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#1008)
3.3 L̲T̲U̲ ̲#̲3̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲L̲T̲U̲3̲1̲
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#0E1A #0B63 #630E) "Cursor one line
up
Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
REPORTLEVEL = 2
LTU.INITIALIZE (#100B,#420)
LTU.OPEN ̲SUBDEVICE (#100B,0,LTU,2400)
CLEAR(1)
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,61)
CLEAR (0)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,6)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
END
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100B)
3.4 L̲T̲U̲ ̲#̲3̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲2̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲L̲T̲U̲3̲2̲
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#0E1A #0B63 #630E) "Cursor one line
up
Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
REPORTLEVEL = 2
LTU.INITIALIZE (#100B,#420)
LTU.OPEN ̲SUBDEVICE (#100B,2,LTU,2400)
CLEAR(1)
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,61)
CLEAR (0)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,6)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
END
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100B)
3.5 L̲T̲U̲ ̲#̲4̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲1̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲L̲T̲U̲4̲1̲
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#0E1A #0B63 #630E) "Cursor one line
up
Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
REPORTLEVEL = 2
LTU.INITIALIZE (#100D,#430)
LTU.OPEN ̲SUBDEVICE (#100D,0,LTU,2400)
CLEAR(1)
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,61)
CLEAR (0)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,6)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
END
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100D)
3.6 L̲T̲U̲ ̲#̲4̲,̲ ̲C̲H̲A̲N̲N̲E̲L̲ ̲2̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲L̲T̲U̲4̲2̲
DEFINE (1,…08…THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)…08…)
DEFINE (2,#520E #6D0E) "Clear VDU, BTTY
mode"
DEFINE (3,#440E #630E #0E0B #0063)
"Home cursor in page
1, select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (4,#0E1A #0B63 #630E) "Cursor one line
up
Select BLOCK DEFINE,
cursor one line down,
deselect BLOCK DEFINE"
DEFINE (5,#3B0E) "Transmit"
REPORTLEVEL = 2
LTU.INITIALIZE (#100D,#430)
LTU.OPEN ̲SUBDEVICE (#100D,2,LTU,2400)
CLEAR(1)
GENERATE (1,1,31)
GENERATE (2,2,2)
GENERATE (3,3,4)
GENERATE (4,4,3)
GENERATE (5,5,1)
LTU.WRITE (LTU,2,4)
REPEAT 24 LTU.WRITE (LTU,1,61)
CLEAR (0)
LTU.WRITE (LTU,3,7)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
REPEAT 23
BEGIN
LTU.WRITE (LTU,4,6)
LTU.WRITE (LTU,5,2)
LTU.READ (LTU,0,61)
COMPARE (1,0,31)
CLEAR (0)
END
LTU.CLOSE ̲SUBDEVICE(LTU)
LTU.SHUTDOWN (#100D)
4̲ ̲ ̲L̲T̲U̲X̲-̲S̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲,̲ ̲V̲D̲U̲,̲ ̲M̲S̲P̲,̲ ̲P̲T̲P̲/̲P̲T̲R̲,̲ ̲A̲N̲D̲ ̲O̲C̲R̲
These test sequences consist of a common test sequence
(common to all link tests) and for each ling to be
tested two specific link sequences.
4.1 V̲D̲U̲ ̲C̲O̲M̲M̲O̲N̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲V̲D̲U̲8̲
REPORTLEVEL = 2
DEFINE (1,'THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:(13:)')
DEFINE(2,#520E #6D0E)
DEFINE(3,#440E #630E #0E0B #0063)
DEFINE(4,#630E #0E0B #0063)
DEFINE(5,#3B0E)
GENERATE(1,1,31)
GENERATE(2,2,2)
GENERATE(3,3,4)
GENERATE(4,4,3)
GENERATE(5,5,1)
TDX.WRITE(1,2,4)
TDX.WRITE(2,2,4)
TDX.WRITE(3,2,4)
TDX.WRITE(4,2,4)
TDX.WRITE(5,2,4)
TDX.WRITE(6,2,4)
TDX.WRITE(7,2,4)
TDX.WRITE(8,2,4)
REPEAT 24
BEGIN
TDX.WRITE(1,1,62)
TDX.WRITE(2,1,62)
TDX.WRITE(3,1,62)
TDX.WRITE(4,1,62)
TDX.WRITE(5,1,62)
TDX.WRITE(6,1,62)
TDX.WRITE(7,1,62)
TDX.WRITE(8,1,62)
END
TDX.WRITE(1,3,7)
TDX.WRITE(2,3,7)
TDX.WRITE(3,3,7)
TDX.WRITE(4,3,7)
TDX.WRITE(5,3,7)
TDX.WRITE(6,3,7)
TDX.WRITE(7,3,7)
TDX.WRITE(8,3,7)
CLEAR(6)
TDX.WRITE(1,5,2)
TDX.READ(1,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(2,5,2)
TDX.READ(2,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(3,5,2)
TDX.READ(3,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(4,5,2)
TDX.READ(4,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(5,5,2)
TDX.READ(5,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(6,5,2)
TDX.READ(6,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(7,5,2)
TDX.READ(7,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(8,5,2)
TDX.READ(8,6,62)
COMPARE(1,6,30)
REPEAT 23
BEGIN
TDX.WRITE(1,4,5)
TDX.WRITE(2,4,5)
TDX.WRITE(3,4,5)
TDX.WRITE(4,4,5)
TDX.WRITE(5,4,5)
TDX.WRITE(6,4,5)
TDX.WRITE(7,4,5)
TDX.WRITE(8,4,5)
TDX.WRITE(1,5,2)
TDX.WRITE(2,5,2)
TDX.WRITE(3,5,2)
TDX.WRITE(4,5,2)
TDX.WRITE(5,5,2)
TDX.WRITE(6,5,2)
TDX.WRITE(7,5,2)
TDX.WRITE(8,5,2)
CLEAR(6)
TDX.READ(1,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(2,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(3,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(4,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(5,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(6,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(7,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(8,6,62)
COMPARE(1,6,30)
END
4.2 V̲D̲U̲ ̲C̲O̲M̲M̲O̲N̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲V̲D̲U̲4̲
REPORTLEVEL = 2
DEFINE (1,'THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)(:13:)')
DEFINE(2,#520E #6D0E)
DEFINE(3,#440E #630E #0E0B #0063)
DEFINE(4,#630 #0E0B #0063)
DEFINE(5,#3B0E)
GENERATE(1,1,31)
GENERATE(2,2,2)
GENERATE(3,3,4)
GENERATE(4,4,3)
GENERATE(5,5,1)
TDX.WRITE(1,2,4)
TDX.WRITE(2,2,4)
TDX.WRITE(3,2,4)
TDX.WRITE(4,2,4)
REPEAT 24
BEGIN
TDX.WRITE(1,1,62)
TDX.WRITE(2,1,62)
TDX.WRITE(3,1,62)
TDX.WRITE(4,1,62)
END
TDX.WRITE(1,3,7)
TDX.WRITE(2,3,7)
TDX.WRITE(3,3,7)
TDX.WRITE(4,3,7)
CLEAR(6)
TDX.WRITE(1,5,2)
TDX.READ(1,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(2,5,2)
TDX.READ(2,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(3,5,2)
TDX.READ(3,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.WRITE(4,5,2)
TDX.READ(4,6,62)
COMPARE(1,6,30)
REPEAT 23
BEGIN
TDX.WRITE(1,4,5)
TDX.WRITE(2,4,5)
TDX.WRITE(3,4,5)
TDX.WRITE(4,4,5)
TDX.WRITE(1,5,2)
TDX.WRITE(2,5,2)
TDX.WRITE(3,5,2)
TDX.WRITE(4,5,2)
CLEAR(6)
TDX.READ(1,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(2,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(3,6,62)
COMPARE(1,6,30)
CLEAR(6)
TDX.READ(4,6,62)
COMPARE(1,6,30)
END
4.3 M̲S̲P̲ ̲C̲O̲M̲M̲O̲N̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲M̲S̲P̲
DEFINE (1,'(:13:)(:10:)THE QUICK BROWN FOX JUMPS OVER
THE LAZY DOGS BACK 0123456789')
DEFINE(2,#481B #000D)
GENERATE(1,1,31)
GENERATE(2,2,2)
REPEAT 60
BEGIN
TDX.WRITE(1,1,62)
TDX.WRITE(2,1,62)
TDX.WRITE(3,1,62)
TDX.WRITE(4,1,62)
END
TDX.WRITE(1,2,3)
TDX.WRITE(2,2,3)
TDX.WRITE(3,2,3)
TDX.WRITE(4,2,3)
4.4 P̲T̲P̲/̲P̲T̲R̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲P̲T̲P̲/̲P̲T̲R̲
a) D̲O̲ ̲P̲T̲P̲
DEFINE (1,'THE QUICK BROWN FOX JUMPS OVER THE
LAZY DOGS BACK 0123456789(:10:)(:19)')
DEFINE(3,#0000 #0000)
CLEAR(1)
CLEAR(3)
GENERATE(1,1,32)
GENERATE(3,3,2)
REPEAT 5
BEGIN
TDX.WRITE(1,3,4)
TDX.WRITE(1,1,62)
END
b) D̲O̲ ̲P̲T̲R̲
CLEAR(2)
CLEAR(4)
CLEAR(5)
CLEAR(6)
CLEAR(7)
TDX.READ(1,2,61)
TDX.READ(1,4,61)
TDX.READ(1,5,61)
TDX.READ(1,6,61)
TDX.READ(1,7,61)
DUMP 2+30
DUMP 4+30
DUMP 5+30
DUMP 6+30
DUMP 7+30
4.5 O̲C̲R̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲,̲ ̲D̲O̲ ̲O̲C̲R̲
REPORTLEVEL = 2
DEFINE (1,'THE QUICK BROWN FOX JUMPS OVER THE LAZY
DOGS BACK 0123456789(:10:)(:13:)')
DEFINE(2,#250E #6D0E)
DEFINE (3, #440E #630 #0E0B #0063)
DEFINE (4, #630E #0E0B #0063)
DEFINE(5,#3B0E)
GENERATE(1,1,31)
GENERATE(2,2,2)
GENERATE(3,3,4)
GENERATE(4,4,3)
GENERATE(5,5,1)
TDX.WRITE(1,2,4)
REPEAT 24 TDX.WRITE(1,1,62)
CLEAR(6)
TDX.WRITE(1,3,7)
TDX.WRITE(1,5,2)
TDX.READ(1,6,62)
COMPARE(1,6,30)
CLEAR(6)
REPEAT 23
BEGIN
TDX.WRITE(1,4,5)
TDX.WRITE(1,5,2)
TDX.READ(1,6,62)
COMPARE(1,6,30)
CLEAR(6)
END
4.6 T̲T̲Y̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲
DEFINE (1,#021F #1410 #0401 #0717 #0E06 #040F #0A19
#1318 #040C #180D #1D04 #070B #161C #0405)
DEFINE (2,#1E18, #0A01 #1004 #0114 #1204 #1103 #0415
#1809 #051A #1904 #0E03 #040F #161B #0017)
DEFINE (3,#0113 #100A #0715 #1806 #081F #0002)
CLEAR(1)
CLEAR(2)
CLEAR(3)
GENERATE(1,1,14)
GENERATE(2,2,14)
GENERATE(3,3,6)
REPEAT 20
BEGIN
TDX.WRITE(TTY,1,30)
TDX.WRITE(TTY,2,27)
TDX.WRITE(TTY,3,11)
END
4.7 L̲I̲N̲K̲ ̲1̲1̲X̲-̲2̲1̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#11,8)
TDX.OPEN ̲SUBDEVICE(#32,0,#21,8)
TDX.OPEN ̲VDU(#32,0,#11,2,8,1)
TDX.OPEN ̲VDU(#32,0,#11,2,8,2)
TDX.OPEN ̲VDU(#32,0,#11,2,8,3)
TDX.OPEN ̲VDU(#32,0,#11,2,8,4)
TDX.OPEN ̲VDU(#32,0,#21,2,8,5)
TDX.OPEN ̲VDU(#32,0,#21,2,8,6)
TDX.OPEN ̲VDU(#32,0,#21,2,8,7)
TDX.OPEN ̲VDU(#32,0,#21,2,8,8)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲VDU(5)
TDX.CLOSE ̲VDU(6)
TDX.CLOSE ̲VDU(7)
TDX.CLOSE ̲VDU(8)
TDX.CLOSE ̲SUBDEVICE(#32,0,#11)
TDX.CLOSE ̲SUBDEVICE(#32,0,#21)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.8 L̲I̲N̲K̲ ̲1̲2̲X̲-̲2̲2̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#12,8)
TDX.OPEN ̲SUBDEVICE(#32,0,#22,8)
TDX.OPEN ̲VDU(#32,0,#12,2,8,1)
TDX.OPEN ̲VDU(#32,0,#12,2,8,2)
TDX.OPEN ̲VDU(#32,0,#12,2,8,3)
TDX.OPEN ̲VDU(#32,0,#12,2,8,4)
TDX.OPEN ̲VDU(#32,0,#22,2,8,5)
TDX.OPEN ̲VDU(#32,0,#22,2,8,6)
TDX.OPEN ̲VDU(#32,0,#22,2,8,7)
TDX.OPEN ̲VDU(#32,0,#22,2,8,8)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲VDU(5)
TDX.CLOSE ̲VDU(6)
TDX.CLOSE ̲VDU(7)
TDX.CLOSE ̲VDU(8)
TDX.CLOSE ̲SUBDEVICE(#32,0,#12)
TDX.CLOSE ̲SUBDEVICE(#32,0,#22)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.9 L̲I̲N̲K̲ ̲1̲3̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲3̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#13,8)
TDX.OPEN ̲VDU(#32,0,#13,2,8,1)
TDX.OPEN ̲VDU(#32,0,#13,3,8,2)
TDX.OPEN ̲VDU(#32,0,#13,4,8,3)
TDX.OPEN ̲VDU(#32,0,#13,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲3̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#13)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.10 L̲I̲N̲K̲ ̲2̲2̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲2̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#22,8)
TDX.OPEN ̲VDU(#32,0,#22,2,8,1)
TDX.OPEN ̲VDU(#32,0,#22,3,8,2)
TDX.OPEN ̲VDU(#32,0,#22,4,8,3)
TDX.OPEN ̲VDU(#32,0,#22,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲2̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#22)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.11 L̲I̲N̲K̲ ̲2̲3̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲3̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#23,8)
TDX.OPEN ̲VDU(#32,0,#23,2,8,1)
TDX.OPEN ̲VDU(#32,0,#23,3,8,2)
TDX.OPEN ̲VDU(#32,0,#23,4,8,3)
TDX.OPEN ̲VDU(#32,0,#23,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲3̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#23)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.12 L̲I̲N̲K̲ ̲1̲4̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲4̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#14,8)
TDX.OPEN ̲VDU(#32,0,#14,2,8,1)
TDX.OPEN ̲VDU(#32,0,#14,3,8,2)
TDX.OPEN ̲VDU(#32,0,#14,4,8,3)
TDX.OPEN ̲VDU(#32,0,#14,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲4̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#14)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.13 L̲I̲N̲K̲ ̲2̲4̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲4̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#24,8)
TDX.OPEN ̲VDU(#32,0,#24,2,8,1)
TDX.OPEN ̲VDU(#32,0,#24,3,8,2)
TDX.OPEN ̲VDU(#32,0,#24,4,8,3)
TDX.OPEN ̲VDU(#32,0,#24,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲4̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#24)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.14 L̲I̲N̲K̲ ̲1̲5̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲5̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#15,8)
TDX.OPEN ̲VDU(#32,0,#15,2,8,1)
TDX.OPEN ̲VDU(#32,0,#15,3,8,2)
TDX.OPEN ̲VDU(#32,0,#15,4,8,3)
TDX.OPEN ̲VDU(#32,0,#15,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲5̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#15)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.15 L̲I̲N̲K̲ ̲2̲5̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲5̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#25,8)
TDX.OPEN ̲VDU(#32,0,#25,2,8,1)
TDX.OPEN ̲VDU(#32,0,#25,3,8,2)
TDX.OPEN ̲VDU(#32,0,#25,4,8,3)
TDX.OPEN ̲VDU(#32,0,#25,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲5̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#25)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.16 L̲I̲N̲K̲ ̲1̲6̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲6̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#16,8)
TDX.OPEN ̲VDU(#32,0,#16,2,8,1)
TDX.OPEN ̲VDU(#32,0,#16,3,8,2)
TDX.OPEN ̲VDU(#32,0,#16,4,8,3)
TDX.OPEN ̲VDU(#32,0,#16,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲6̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#16)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.17 L̲I̲N̲K̲ ̲2̲6̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲6̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#26,8)
TDX.OPEN ̲VDU(#32,0,#26,2,8,1)
TDX.OPEN ̲VDU(#32,0,#26,3,8,2)
TDX.OPEN ̲VDU(#32,0,#26,4,8,3)
TDX.OPEN ̲VDU(#32,0,#26,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲6̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#26)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.18 L̲I̲N̲K̲ ̲1̲7̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲7̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#17,8)
TDX.OPEN ̲VDU(#32,0,#17,2,8,1)
TDX.OPEN ̲VDU(#32,0,#17,3,8,2)
TDX.OPEN ̲VDU(#32,0,#17,4,8,3)
TDX.OPEN ̲VDU(#32,0,#17,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲7̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#17)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.19 L̲I̲N̲K̲ ̲2̲7̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲7̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#27,8)
TDX.OPEN ̲VDU(#32,0,#27,2,8,1)
TDX.OPEN ̲VDU(#32,0,#27,3,8,2)
TDX.OPEN ̲VDU(#32,0,#27,4,8,3)
TDX.OPEN ̲VDU(#32,0,#27,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲7̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#27)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.20 L̲I̲N̲K̲ ̲1̲8̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲8̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#18,8)
TDX.OPEN ̲VDU(#32,0,#18,2,8,1)
TDX.OPEN ̲VDU(#32,0,#18,3,8,2)
TDX.OPEN ̲VDU(#32,0,#18,4,8,3)
TDX.OPEN ̲VDU(#32,0,#18,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲8̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#18)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.21 L̲I̲N̲K̲ ̲2̲8̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲8̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#28,8)
TDX.OPEN ̲VDU(#32,0,#28,2,8,1)
TDX.OPEN ̲VDU(#32,0,#28,3,8,2)
TDX.OPEN ̲VDU(#32,0,#28,4,8,3)
TDX.OPEN ̲VDU(#32,0,#28,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲8̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#28)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.22 L̲I̲N̲K̲ ̲1̲9̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲9̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#19,8)
TDX.OPEN ̲VDU(#32,0,#19,2,8,1)
TDX.OPEN ̲VDU(#32,0,#19,3,8,2)
TDX.OPEN ̲VDU(#32,0,#19,4,8,3)
TDX.OPEN ̲VDU(#32,0,#19,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲9̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#19)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.23 L̲I̲N̲K̲ ̲2̲9̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲9̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#29,8)
TDX.OPEN ̲VDU(#32,0,#29,2,8,1)
TDX.OPEN ̲VDU(#32,0,#29,3,8,2)
TDX.OPEN ̲VDU(#32,0,#29,4,8,3)
TDX.OPEN ̲VDU(#32,0,#29,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲9̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#29)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.24 L̲I̲N̲K̲ ̲1̲B̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲B̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#1B,8)
TDX.OPEN ̲VDU(#32,0,#1B,2,8,1)
TDX.OPEN ̲VDU(#32,0,#1B,3,8,2)
TDX.OPEN ̲VDU(#32,0,#1B,4,8,3)
TDX.OPEN ̲VDU(#32,0,#1B,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲B̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#1B)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.25 L̲I̲N̲K̲ ̲2̲B̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲B̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#2B,8)
TDX.OPEN ̲VDU(#32,0,#2B,2,8,1)
TDX.OPEN ̲VDU(#32,0,#2B,3,8,2)
TDX.OPEN ̲VDU(#32,0,#2B,4,8,3)
TDX.OPEN ̲VDU(#32,0,#2B,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲B̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#2B)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.26 L̲I̲N̲K̲ ̲1̲C̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲C̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#1C,8)
TDX.OPEN ̲VDU(#32,0,#1C,2,8,1)
TDX.OPEN ̲VDU(#32,0,#1C,3,8,2)
TDX.OPEN ̲VDU(#32,0,#1C,4,8,3)
TDX.OPEN ̲VDU(#32,0,#1C,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲C̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#1C)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.27 L̲I̲N̲K̲ ̲2̲C̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲C̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#2C,8)
TDX.OPEN ̲VDU(#32,0,#2C,2,8,1)
TDX.OPEN ̲VDU(#32,0,#2C,3,8,2)
TDX.OPEN ̲VDU(#32,0,#2C,4,8,3)
TDX.OPEN ̲VDU(#32,0,#2C,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲C̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#2C)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.28 L̲I̲N̲K̲ ̲1̲D̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲D̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#1D,8)
TDX.OPEN ̲VDU(#32,0,#1D,2,8,1)
TDX.OPEN ̲VDU(#32,0,#1D,3,8,2)
TDX.OPEN ̲VDU(#32,0,#1D,4,8,3)
TDX.OPEN ̲VDU(#32,0,#1D,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲D̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#1D)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.29 L̲I̲N̲K̲ ̲2̲D̲X̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲D̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#2D,8)
TDX.OPEN ̲VDU(#32,0,#2D,2,8,1)
TDX.OPEN ̲VDU(#32,0,#2D,3,8,2)
TDX.OPEN ̲VDU(#32,0,#2D,4,8,3)
TDX.OPEN ̲VDU(#32,0,#2D,5,8,4)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲D̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲VDU(2)
TDX.CLOSE ̲VDU(3)
TDX.CLOSE ̲VDU(4)
TDX.CLOSE ̲SUBDEVICE(#32,0,#2D)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.30 L̲I̲N̲K̲ ̲2̲3̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲3̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#23,8)
TDX.OPEN ̲VDU(#32,0,#23,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲3̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#23)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.31 L̲I̲N̲K̲ ̲2̲5̲4̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲5̲4̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#25,8)
TDX.OPEN ̲VDU(#32,0,#25,5,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲5̲4̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#25)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.32 L̲I̲N̲K̲ ̲1̲6̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲6̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#16,8)
TDX.OPEN ̲VDU(#32,0,#16,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲6̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#16)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.33 L̲I̲N̲K̲ ̲1̲7̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲7̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#17,8)
TDX.OPEN ̲VDU(#32,0,#17,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲7̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#17)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.34 L̲I̲N̲K̲ ̲2̲7̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲7̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#27,8)
TDX.OPEN ̲VDU(#32,0,#27,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲7̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#27)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.35 L̲I̲N̲K̲ ̲1̲8̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲8̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#18,8)
TDX.OPEN ̲VDU(#32,0,#18,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲8̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#18)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.36 L̲I̲N̲K̲ ̲2̲8̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲8̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#28,8)
TDX.OPEN ̲VDU(#32,0,#28,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲8̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#28)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.37 L̲I̲N̲K̲ ̲1̲A̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲A̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#1A,8)
TDX.OPEN ̲VDU(#32,0,#1A,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲A̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#1A)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.38 L̲I̲N̲K̲ ̲2̲A̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲A̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#2A,8)
TDX.OPEN ̲VDU(#32,0,#2A,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲2̲A̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#2A)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.39 L̲I̲N̲K̲ ̲1̲7̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲7̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#17,8)
TDX.OPEN ̲VDU(#32,0,#17,2,8,TTY)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲7̲1̲
TDX.CLOSE ̲VDU(TTY)
TDX.CLOSE ̲SUBDEVICE(#32,0,#17)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.40 L̲I̲N̲K̲ ̲1̲5̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲1̲5̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS(#32,0)
TDX.OPEN ̲SUBDEVICE(#32,0,#15,8)
TDX.OPEN ̲VDU(#32,0,#15,2,8,TTY)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲5̲1̲
TDX.CLOSE ̲VDU(TTY)
TDX.CLOSE ̲SUBDEVICE(#32,0,#15)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN(#32)
4.41 L̲I̲N̲K̲ ̲1̲C̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲ ̲1̲C̲1̲
TDX.INITIALIZE (#32,1)
TDX.OPEN ̲BUS (#32,0)
TDX.OPEN ̲SUBDEVICE (#32,0,"1C,8)
TDX.OPEN ̲VDU (#32,#1C,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲1̲C̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE ̲SUBDEVICE(#32,0,#1C)
TDX.CLOSE ̲BUS(#32,0)
TDX.SHUTDOWN (#32)
4.42 L̲I̲N̲K̲ ̲2̲C̲1̲ ̲S̲P̲E̲C̲I̲F̲I̲C̲ ̲T̲E̲S̲T̲ ̲S̲E̲Q̲U̲E̲N̲C̲E̲S̲
a) O̲p̲e̲n̲,̲ ̲D̲O̲ ̲O̲P̲E̲N̲2̲C̲1̲
TDX.INITIALIZE(#32,1)
TDX.OPEN ̲BUS (#32,1)
TDX.OPEN ̲SUBDEVICE (#32,0,2C,8)
TDX.OPEN ̲VDU (#32,0,#2C,2,8,1)
b) C̲l̲o̲s̲e̲,̲ ̲D̲O̲ ̲C̲L̲O̲S̲E̲ ̲2̲C̲1̲
TDX.CLOSE ̲VDU(1)
TDX.CLOSE-SUBDEVICE (#32,0,#2C)
TDX.CLOSE ̲BUS (#32,0)
TDX-SHUTDOWN (#32)
A̲P̲P̲E̲N̲D̲I̲X̲ ̲ ̲C̲
1.1 G̲e̲n̲e̲r̲a̲l̲
C̲h̲e̲c̲k̲ ̲l̲i̲s̲t̲ ̲u̲s̲e̲d̲ ̲f̲o̲r̲ ̲V̲e̲r̲i̲f̲i̲c̲a̲t̲i̲o̲n̲ ̲o̲f̲ ̲t̲h̲e̲ ̲S̲i̲t̲e C̲o̲n̲f̲i̲g̲u̲r̲a̲t̲i̲o̲n̲
Test Group No. 1 will give verification of the Site
Configuration. In the check list the specified quantity
for each item is tabulated. Further, a Inspected quantity
column, to be used for result recording, exists to
ensure the compliance between the specified and inspected
configuration
C̲o̲m̲p̲u̲t̲e̲r̲ ̲R̲a̲c̲k̲s̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲ Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Rack A Equip. Assy 1
Rack B Equip. Assy 1
Rack C Equip. Assy 1
Cabinet Assy 1
Inter Rack Cable Assy 1
Check list used for Verification of the Site Configuration
6.1 B̲a̲y̲ ̲A̲-̲B̲-̲C̲ Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
R̲a̲c̲k̲ ̲A̲
Processor Crate Assy 1
Processor Crate 1
Power Supply CR80D 2
MAP I/O DMA 1
STI 1
RAM 512K 2
CPU CACHE 3
MBT 4
TIA 2
MIA 1
CCA 1
TSP 1
D-Fan Assy. 1
Disc Drive MMD 1
Mains Switch 220V 1
X-Net Terminal Outlet 2
Thermostate 2
Power Distribution Panel 1
Power Line Filter 1
R̲a̲c̲k̲ ̲B̲
Channel Crate Assy 1
Channel Crate 1
Power Supply CR80D 2
Disc Controller 3
Floppy Disc Controller 1
LTU 4
MBT 2
CCA 1
LIA-N 4
SFA 1
DCA 3
CIA-A 1
CIA-B 1
CUCP 1
TSP 1
Check list used for Verification of the Site Configuration
Serial Spec. Inspec. Compli-
B̲a̲y̲ ̲A̲-̲B̲-̲C̲ No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
D-Fan Assy. 1
Watchdog Crate Assy. 1
Watchdog Crate 1
LTU 1
WCA 1
CCBA Panel 1
Floppy Disc (2 units) 1
Disc Drive SMD 1
Mains Switch 220V 1
Thermostate 2
Power Distribution Panel 1
Power Line Filter 1
Check list used for Verification of the Site Configuration
Serial Spec. Inspec. Compli-
B̲a̲y̲ ̲A̲-̲B̲-̲C̲ No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
R̲a̲c̲k̲ ̲C̲
Processor Crate Assy. 1
Processor Crate 1
Power Supply CR80D 2
MAP I/O DMA 1
STI 1
RAM 512K 2
CPU CACHE 3
MBT 4
TIA 2
MIA 1
CCA 1
TSP 1
D-Fan Assy. 1
Adaptor Crate Assy. 1
Adaptor Crate 1
Opto T/R 2
V24/V28 /L/L) Adaptor
1 Channel 6
Adaptor Power Supply 2
Back Panel Type 8 2
Cable Channel Assy. 1
S-Fan Assy. 1
Disc Drive MMD 1
Mains Switch 220V 1
X-Net Terminal Outlet 2
Thermostate 2
Power Distribution Panel 2
CCB Panel 1
Check list used for Verification of the Site Configuration
C̲a̲b̲i̲n̲e̲t̲ ̲A̲s̲e̲m̲b̲l̲y̲ ̲(̲R̲a̲c̲k̲ ̲A̲-̲B̲-̲C̲)̲ Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Rack A Assembly 1
Rack B Assembly 1
Rack C Asembly 1
R̲a̲c̲k̲ ̲A̲:̲
Right End Rack (LH) 1
R̲a̲c̲k̲ ̲B̲:̲
Intermediate Rack (LH) 1
R̲a̲c̲k̲ ̲C̲:̲
Left End Rack (LH) 1
Check list used for Verification of the Site Configuration
L̲i̲n̲e̲ ̲T̲e̲r̲m̲i̲n̲a̲t̲i̲o̲n̲ Serial Spec. Inspec. Compli-
̲R̲a̲c̲k̲ ̲A̲s̲s̲e̲m̲b̲l̲y̲ No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Rack D Equip. Assy. 1
Rack E Equip. Assy. 1
Rack F Equip. Assy. 1
Rack G Equip. Assy. 1
Cabinet Assembly 1
Inter Rack Cables 1
Check list used for Verification of the Site Configuration
B̲a̲y̲ ̲D̲-̲E̲-̲F̲-̲G̲ Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
R̲a̲c̲k̲ ̲D̲
TDX Crate Assy.# 4 1
CTX-Crate 1
TDX-Controller 1
BSM-X 1
LTUX - S 2
L/L Adapter 1 ch 1
Power Supply 1
Adaptor Power Supply 1
BSM-X Panel 1
TDX Crate Assy.#3 1
CTX-Crate 1
BSM-X 1
LTUX-S 2
Opto-T/R 8
Power Supply 1
Adaptor Power Supply 1
TSP 1
BSM-X Panel 1
TDX Crate Assy.#2 1
CTX-Crate 1
BSM-X 1
LTUX-S 2
Opto - T/R 8
Power Supply 1
Adaptor Power Supply 1
BSM-X Panel 1
TDX Crate Assy. #1 1
CTX-Crate 1
TDX-Controller 1
BSM-X 1
LTUX-S 2
Opto-T/R 8
Power Supply 1
Adaptor Power Supply 1
TSP 1
BSM-X Panel 1
Check list used for Verification of the Site Configuration
B̲a̲y̲ ̲D̲-̲E̲-̲F̲-̲G̲ (Cont'd) Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
S-Fan Assy. 2
Mains Switch 240V 1
X-Net Terminal Outlet 10
Thermostate 2
Power Distribution Panel 2
Cable Channel Assembly 4
CCB panel 1
R̲a̲c̲k̲ ̲E̲:̲
TDX-Crate Assy. #8 1
CTX-Crate 1
BSM-X 1
L/L adapter 4 ch 2
LTUX-S 2
Power Supply 1
BSM-X Panel 1
S-Fan Assy. 2
Mains Switch 240V 1
X-Net Terminal Outlet 8
Thermostate 2
Power Distribution Panel 2
Power Line Filter 1
Cable channel Assembly 4
Check list used for Verification of the Site Configuration
B̲a̲y̲ ̲D̲-̲E̲-̲F̲-̲G̲ Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
TDX Crate Assy.# 7 1
CTX-Crate 1
BSM-X 1
LTUX - S 2
L/L Adapter 4 ch 2
Power Supply 1
Adaptor Power Supply 1
TSP 1
BSM-X Panel 1
TDX Crate Assy.#6 1
CTX-Crate 1
BSM-X 1
LTUX-S 1
L/L Adapter 1 ch 2
Power Supply 1
Adaptor Power Supply 1
BSM-X Panel 1
TDX Crate Assy.#5 1
CTX-Crate 1
BSM-X 1
LTUX-S 2
Opto - T/R 8
TSP 1
Power Supply 1
Adaptor Power Supply 1
BSM-X Panel 1
Check list used for Verification of the Site Configuration
B̲a̲y̲ ̲D̲-̲E̲-̲F̲-̲G̲ (Cont'd) Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Rack F:
TDX-Crate Assy. # 10 1
CTX-Crate 1
BSM-X 2
LTUX-S 1
L/L Adapter 1 ch 1
L/L Adapter 4 ch 1
Power Supply 1
Adapter Power Supply 1
BSM-X Panel 1
TDX-Crate Assy. # 9 1
CTX-Crate 1
BSM-X 1
LTUX-S 2
L/L Adapter 4 ch 2
Power Supply 1
Adapter Power Supply 1
TSP 1
BSM-X Panel 1
Filter box 1
S-Fan Assy 1
Mains Switch 240V 1
X-Net Terminal Outlet 4
Thermostate 1
Power Distribution Panel 1
Cable Channel Assembly 2
CCB Panel 1
Check list used for Verification of the Site Configuration
B̲a̲y̲ ̲D̲-̲E̲-̲F̲-̲G̲ (Cont'd) Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
R̲a̲c̲k̲ ̲G̲
TDX-Crate Assy #11 1
CTX-Crate 1
BSM-X 1
LTUX-S 1
Power Supply 1
Adaptor Power Supply 1
TSP 1
Back Panel Type 8 1
BSM-X Panel 1
Resync. Module 1
Adaptor Crate Assy 1
Adaptor Crate 1
Adaptor Power Supply 1
Back Panel Type 8 2
L/L adaptor 4 ch. 1
S-Fan 1
Mains Switch 240 V 1
X-Net Terminal Outlet 2
Thermostate 1
Power Distribution Panel 1
Stat. Mux. MICRO 800/2 1
Cable Channel Assembly 2
Check list used for Verification of the Site Configuration
C̲a̲b̲i̲n̲e̲t̲ ̲A̲s̲s̲e̲m̲b̲l̲y Serial Spec. Inspec. Compli-
No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Rack D Assembly 1
Rack E Assembly 1
Rack F Assembly 1
Rack G Assembly 1
R̲a̲c̲k̲ ̲D̲:̲
Right End Rack (LH) 1
R̲a̲c̲k̲ ̲E̲:̲
Intermediate Rack (LH) 1
R̲a̲c̲k̲ ̲F̲:̲
Left End Rack (LH) 1
R̲a̲c̲k̲ ̲G̲:̲
Stand Alone Rack (RH) 1
P̲e̲r̲i̲p̲h̲e̲r̲a̲l̲ ̲E̲q̲u̲i̲p̲m̲e̲n̲t̲
VDU Delta 7260 TC 25
MSP Tracor 8000 9
PTR/PTP 1
OCR (Shape provided) 1
Check list used for Verification of the Site Configuration
Frequency Stabilizer Serial Spec. Inspec. Compli-
Rack Assembly No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
Rack Equip. Assy 1
R̲a̲c̲k̲
BY-PASS Switch Panel 1
Frequency Stabilizer 3
Check list used for Verification of the Site Configuration
Remote Tare Serial Spec. Inspec. Compli-
Rack Assembly No. Qty. Qty. ance
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲ ̲
M̲a̲i̲n̲ ̲S̲i̲t̲e̲ ̲R̲a̲c̲k̲
V24 BPJF 1
VF BPJF 1
Modem 2
Main Switch 1
Power Distribution Panel 1
Rack 1
R̲e̲m̲o̲t̲e̲ ̲S̲i̲t̲e̲ ̲R̲a̲c̲k̲s̲ ̲(̲S̲i̲t̲e̲ ̲3̲ ̲a̲n̲d̲ ̲4̲)̲
V24 BPJF 2
VF BPJF 2
Modem 2
Main Switch 2
Power Distribution Panel 2
Rack 2
Check list used for Verification of the Site Configuration
