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⟦a9ea22d02⟧ TextFileVerbose

    Length: 13824 (0x3600)
    Types: TextFileVerbose
    Names: »lmitxt001«

Derivation

└─⟦2c55ea56f⟧ Bits:30001844 SW-save af projekt 1000, Alarm-system
    └─⟦093e2ad1c⟧ 
        └─⟦this⟧ »lmitxt001« 

TextFileVerbose

;;
;; begin lmitxt001
;;
auto:                         ;
   ,,cjp c7 k                 ;
   ir:=300,,,                 ;
   sic:=autodisp,,            ;
racom8085zd0= racom8085 - 7   ;
   ra:=racom8085zd0,,,loop    ;
   rd:=version,,,             ;
                              ;
racom8085m4= racom8085 - 4    ;
   w0:=racom8085m4,,loop      ; clear the registers 3eb thru 3ff
   w1:=0,,push 14             ;
   ra:=w0,w0:=w0++,,          ;
   rd:=,,rfct                 ;
                              ;
   ,,push 3e7                 ;
   ra:=w1,w1:=w1++,,          ;
   rd:=slu:=7ff,,rfct         ; set -1 into the registers 0 thru 3e7
                              ;
   ra:=reg:=firstreg,,loop    ;
   zdx:=slb:=lubase,,loop     ;
   rdx:=sib:=autobase,,loop   ;
   lev:=startlevel,,loop      ;
   w0:=lev,,cjs setlint       ;
   zdw:=,,cjp fetch0          ; firstreg.ps:=0
.p                            ;
stopmode:                     ;
   ir:=ra:=w0:=radummy,,      ;
   w1:=zd,s,                  ;
   ra:=reg,w2:=c:q+0,s,cjp zro fetch; cry:=0
   w1,s,cjp not zro fetch1    ; jump if level shift
   ra:=w0,,cjp b0 stopmode1   ;
   zd:=w1--,,cjp stopmode2    ; countmode, zro=false
stopmode1: ;; breakpointmode
   sib-zd0,s,                 ;
   ,,cjp not zro stopmode2    ;
   sic-zd1,s,                 ;
stopmode2:                    ;
   ra:=reg,,cjp zro fetch     ; goto if zro then fetch else
   c:w0-w0,,cjp execnext      ;   execnext, with cry=1
                              ;
setslice: ;;
   ra:=reg,,                  ;
setslice1:                    ;
   sic:=rd,,                  ;
   slu:=zd,,                  ;
   slb:=zd2,,                 ;
   sib:=rd2,,crtn             ;
.p                            ;
;; entries into fetch:
                              ;
exec: ;; from mreqq: execute
   int,c:w0-w0,h ,            ; cry:=1
   q:=int xor lev,h ,cjs setslice; ra:=reg
                              ;
fetch1: ;; from fetch with cry=1; from stopmode (*breakpointmode *) with cry=0
;; cry=0 means level shift during breakpointmode
   w6:=lev xor q,s,           ; w6:=int
   rd:=sic,w4:=0,,cjp zro lev0; jump if int=0
   w7:=w6 clr 700,s,          ;
   zd:=slu,,cjp zro internal  ; jump if no external
;; external interrupt:
   w0:=w7,,                   ; w0:=extlevel;
   w7:=w7++w7,,push 1         ;
   ra:=w7:=w7++w7,,rfct       ; w7:=calculated reg addr
   ir:=rd2,w3:=,s,            ;
   w1:=zd,,cjp b0 dummyoriob  ; return to fetch2 if dummyreg
fetch2:                       ;
   ra:=reg:=w7,,cjp fetch3    ; update reg and lev
internal:                     ;
   bus:=w6,,                  ; update reg and lev
   ra:=reg:=swp,,cjp fetch3   ;
lev0:                         ;
   ra:=reg:=7,,               ; update reg and lev
fetch3:                       ;
   lev:=w6,,cjs setslice1     ;
                              ;
execnext: ;; from execnext, ionci, with cry=1
   bf:=errb:=sib,s,cjp cry fetch5; goto if cry then fetch5 else
fetch0: ;; delay, goto fetch
   ,,cjp fetch                ;   fetch (* level shift during breakpointmode *)
                              ;
.instruction mnoop , fetch0   ;
.p                            ;
dummyoriob: ;; from fetch; entry into the block i/o instructions
;; for further explanation, see lmitxt030c.
                              ;
   q:=zdw,,cjp b1 fetch2      ; jump if dummy interrupt
   q and 4,s,                 ; zro := -, to
   w2:=rd0,,                  ; w21:=next addr
   w5:=c:rd,,cjp not zro iobto; cry:=false; w5:=count; if to then goto iobto
   q:=w0 ior 200,,            ; clear level w0:
   w7--sregmax,s,             ; if this level <= sregmax then
   bf:=q,,cjp acy iob1        ; 
   ,h u ,                     ;   clear internal
iob1:                         ;
   q:=q and 7,h ,             ;
   bd:=q,h w ,jmap not 8      ; clear external; goto instruction
.p                            ;
;; logical testsequence in fetch:
;;    1.  mreqq
;;    2.  stopmode
;;    3.  breakpointmode and level shift
;;    4.  level shift
;;    5.  dummy regs
;; the actual test sequence may because of convenience differ from
;; this scheme. the logical testsequence must, however, as a
;; general rule be as outlined above.
                              ;
sfetch:                       ;
   ra:=reg,,cjs setslice1     ;
                              ;
fetch:                        ; time without interrupt: 9,5x = 2,06us
   int,c:w0-w0,h ,cjp not cr mreqq; cry:=1
   q:=int xor lev,h s,cjp not c7 stopmode;
   bf:=errb:=sib,h s,cjp not zro fetch1;
fetch5:                       ;
   zd:=slu,w3:=,h ,cjp b0 dummyregs; jump if ib.bit0
   c:=bd:=errd:=sic,h r ,ldct herror;
   w7:=bd,h w s,cjp not cry fetch6; w7:=readbyte; jump if even addr
   ir:=w0:=w7,h ,jrp not pty fetch7; jump to herror or fetch7
fetch6: ;; even address
   ir:=w0:=swp,h ,jrp not pty fetch7; jump to herror or fetch7
                              ;
;; lmitxt20 contains either dynamic statistics collection, or
;; the following two lines:
;;
;;fetch7:
;;  rd:=sic, sic:=sic++, jmap 8 ; switch to the instruction
.p                            ;
;;
;; procedure herror
;;
;; entry: errb, errd= def.;
;; exit : to fetch;
;;
herror:                       ;proc herror;
   errd:=errd and 7fe,h ,     ; disp:=disp and 0fffe
   q:=56,h ,                  ; 01010lr0: q:= memory error;
   bf:=errb,h ,               ;
   bd,,h w ,                  ; define left and right parity error
   ,,cjv 3 ptyerror1          ; w5:= (d+1) - 1;
.loc                          ;
ptyerror1:                    ;
   q:=q-2,,                   ; remove both left and right parity error
   q:=q-2,,                   ; remove left parity error
   q:=q-2,,                   ; remove right parity error
                              ;
;;send mess to debug console
;;q,errb,errd=message
debugmess:                    ;
   ra:=racom8085,,,loop       ;
   rd1:=q,,loop               ;
   rd2:=errb,,loop            ;
   rd:=errd,,cjs setslice     ;
   led:=6,,,loop              ;
sendmess1:                    ;
   ,,cjp cr k                 ;
   ,,cjs mrequest             ;
   ,,cjp c7 sendmess1         ; wait while run-mode
   ,,cjp sfetch               ;
                              ;
.p                            ;
;;
.instruction mxept            ;
;;
   ,,cjs readlucq             ;
   ,,cjp xept                 ;
;;
;; procedure undefined-instruction
;;
.instruction                  ;
   q:=undefins,,              ; error:=undefined instruction;
                              ;
;;
;; procedure xept(error); (* unconditional program exception *)
;;
;; entry: q= error;
;;
xept:                         ;proc xept;
   w3:=q,,cjs setslice        ;
   ir:=300,w2:=spb,,loop      ;
   w1:=excode--,,loop         ;
   w1:=w1+rdw,,cjs writenext  ; d:= pr+excode-1; writenext(spb,d,error);
   w1:=w1+4,,loop             ; d:= pr+exic-1;
   w3:=rdx,,cjs writenext     ; writenext(spb,d,ib);
   w3:=rd,,cjs writenext      ; writenext(spb,d,ic);
   w5:=w1-8,,loop             ; d:= pr+exadr-1;
   w6:=spb,,cjs readnext      ; readnext(spb,d);
   sib:=bd,h w s,             ; sib:= waitmem;
   rdx:=sib,h ,cjs readnextt  ; ib:=sib; readnextt(spb,d);
   sic:=bd,h w s,cjs terror   ; test parity; sic:= waitmem;
   w5:=w5+maxstackrel,,       ;
   ,,cjs readnext             ; readnext(pb,pr+maxstack);
   w3:=bd,h w s,cjs terror    ; lm:= waitmem; testparity;
   zd0:=w3,,                  ;
   w0:=,,cjs setpswait        ; setpswait((..));
   ,,cjp fetch                ; goto fetch
.p                            ;
;;
;; stack overflow
;;
stackerror:                   ;
   q:=stackovf,,              ; error:= stack overflow;
   ,,cjp xept                 ; goto exception;
.p                            ;
swap:                         ;
   q:=swp and w4,,            ;
   swp,q:=q+w0,,              ;
   w0:=swp and w5,,crtn       ;
                              ;
shiftcom:                     ;
   w3,,cjs swap               ;
   w1,w3:=q,,cjs swap         ;
   w2,w1:=q,,cjs swap         ;
   w0,w2:=q,,crtn             ;
                              ;
mreqq:                        ;
   zd:=slu,,                  ;
   rd:=sic,,cjs mrequest      ;
   ,,cjp fetch                ;
                              ;
mrequest:                     ;
   ir:=300,,,                 ;
   ra:=racom8085,,,           ;
   w2:=zd0,,                  ;
   w1:=zd1,,                  ;
   w3:=zd2,,                  ;
   w4:=0ff,,                  ;
   w5:=swp,,cjv 6 mrq5        ;
                              ;
.loc                          ;
                              ;
mrq5:                         ;
   ,,cjp mrq7a                ; disp:=2; tti interrupt
   c:=w5:=w5--w5,,cjp mrq7    ; disp:=0; timer interrupt
   c:=w5:=0,,cjp mrq7         ; disp:=1; tto interrupt
   ,,cjv 5 mreq               ; normal request
                              ;
mreq:                         ;012345
   ,,cjv 4 mrq1               ;xx0011
   ,,cjv 4 mrq2               ;xx0111
   ,,cjv 4 mrq3               ;xx1011
   ,,cjv 4 mrq4               ;xx1111
                              ;
mrq1:                         ;
   cd,,,cjp putgetdata        ;000011 putgetdata
   ,,cjp k                    ;010011
   ,,cjp mrq14                ;100011 read data
   ,,cjp mrq9                 ;110011 write request
                              ;
mrq2:                         ;
   ccr,,,cjpp exec            ;000111 execute
   ,,cjp k                    ;010111
   ,,cjp mrq21                ;100111 putmem
   ,,cjp mrq19                ;110111 getmem
                              ;
mrq3:                         ;
   w2:=cd and w4,,cjp getregaddr;001011 get register address
   w0:=w0--w0,,cjp mrq10      ;011011 test level  o b s
   ccr,,,jz                   ;101011 autoload
   w0:=reg,,cjp getlev        ;111011 get lev
                              ;
mrq4:                         ;
   ccr,c:w0-w0,,cjpp mrq8     ;001111 execute on curr. level; cry:=1
   bus:=w3,,cjp selftest      ;011111 selfdiagnostic test
   ra:=w1,,cjp mrq23          ;101111 putreg
   ra:=w3,,cjp mrq22          ;111111 getreg
                              ;
mrq7a: ;;set tti interrupt
   c:=w5:=1,,                 ; disp:=2
mrq7: ;;set timer interrupt or console interrupt
   w6:=basedata,,             ;
   ,,ldct mrqerror            ;
   w7:=w5++,,cjs readb65n1    ; w3:=readbyte
   w0:=w3,,cjs setlint        ; setlocalinterrupt(w3)
   ,,cjp mrq10                ; goto end session
                              ;
mrq8:                         ; execute on curr. level:
   ra:=c:reg-0,,cjp execnext  ; cry:=1 ; ra:= reg; goto execnext;
                              ;
mrq9: ;;write request
;; rd1, rd2, rd3 : message
;; zd3 : data byte
                              ;
   w0:=rdw,s,                 ; w021:=message
   w2:=rdx,,                  ;
   w1:=rd,,cjp zro mrq9a      ; jump if no message
   led:=6,,,                  ; send interrupt
   rdw:=,,cjp mrq10a          ; send message
mrq9a: ;; send data byte
   w0:=zd,,                   ;
   w2:=swp,,                  ; w02:=data byte
   zd:=,,cjp mrq10a           ;
                              ;
putgetdata: ;; bus=data to be put
   w0:=swp and w5,,cjs shiftcom;
   w0:=swp,,cjp mrq10a        ;
                              ;
getregaddr:                   ;
   w2:=w2+w2,,push 1          ;
   w2:=w2+w2,,rfct            ;
                              ;
mrq22a:                       ;
   ra:=racom8085,,,           ;
                              ;
mrq10a: ;;update the cyclic buffer
   zd0:=w2,,                  ;
   zd1:=w1,,                  ;
   zdx:=w3,,cjp mrq10         ;
                              ;
getlev:                       ;
   ir:=c:=,,push 2            ;
   w0:=>w0,,rfct              ;
                              ;
mrq10: ;; end session
   cd:=w0,,                   ;
   ccr,,,cjp setslice         ; ra:=reg
                              ;
mrq14: ;;read data
   w2:=basedata,,             ;
   q:=w3 and 3f,,             ;
   w3,w1:=q--,,               ;
   w3:=swp and w4,,cjs writebnext;
   ,,cjp mrq10                ;
.p                            ;
mrq19:                        ;get mem
;;
;; due to the intel multibus memory data are read
;; as two bytes supplying
;; a zero value when no module is answering selection.
;;
   q:=,,ldct err19            ; q remembers any error
   w6:=w1,,                   ;
   w5:=w3--,,cjs readb65n1    ; w3:=the first byte
   bus:=w3,,                  ;
   w2:=swp,,cjs readb65n1     ; w3:= the next byte
   q,s,                       ; zro:=no error
   zd0:=w2:=w2+w3,,           ; zd0 := w2 := the word read
   ,,cjp zro mrq10a           ; goto mrq10a in case of no errors
                              ;
mrqerror: ;; parity error; addr=w6,w7; q=54;
   ccr,errd:=w7,,cjp errw6b   ;
                              ;
err19: ;; remember the displacement in case of error
   w7:=errd,,crtn             ;
                              ;
mrq21: ;;putmem
   w1:=w1--,,cjs writenext    ;
   ,,cjp mrq10                ;
                              ;
mrq22: ;;get reg
   w2:=rd,,cjp mrq22a         ;
                              ;
mrq23: ;;put reg
   rd:=w3,,cjp mrq10          ;
                              ;
;;
;; end lmitxt001
;;
.p                            ;
«eof»