⟦dd824601c⟧

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/*
 * @(#)devvm.h	3.6	7/14/83
 * @(#)Copyright (C) 1983 by National Semiconductor Corp.
 */

/*
 * This module defines the virtual memory addresses used
 * to reference the device registers and RAMs.
 *
 * Because the device registers are located in widely separated parts
 * of physical memory, many page tables would be required to access
 * them all, if the kernel referred to them by their true physical
 * locations.  For this reason, the system page tables are setup
 * to remap most of the device registers into a single 64K segment,
 * just above the ROM monitor.
 *
 * WARNING:  All address are specified twice, once in a form suitable
 *           for assembly files (LOCORE conditional) and once in a form
 *           suitable for C files.  Be sure to make any changes in both
 *           places.
 *
 * The actual physical addresses are defined in module devpm.h.
 */

#ifdef LOCORE

#if NSIO > 0
; SIO board
SIO_BASE:	.equ	x'e040b0
#endif

; Graphics board (screen)
GB_VideoRAM:	.equ	x'c00000

; Rom monitor
PR_Monitor:	.equ	x'e00000  ;Needs PR_Pagelen pages

;Pages e02000 - e02600 are unused and available

; Most of ICL Comet's addresses seem to lie on one page

MPS_PAGE:	.equ	x'e04000  ; page for floppy, printer, disk...

; Floppy and printer
MPS_RAMIO:	.equ	x'e04000  ; ram for read/write
MPS_COMMAND:	.equ	x'e04002  ; command port
MPS_STATUS:	.equ	x'e04004  ; status port
MPS_RAMRESET:	.equ	x'e04006  ; reset ram counter
MPS_INTERRUPT:	.equ	x'e04008  ; interrupt
MPS_HARDRESET:	.equ	x'e0400a  ; hardware reset
MPS_HANDSHAKE:	.equ	x'e0400c  ; handshake bits
MPS_PRINT:	.equ	x'e0400e  ; printer data out port

;Graphics board (keyboard and control)
GB_Keyboard:	.equ	x'e04014
GB_Utility:	.equ	x'e04110
GB_Control:	.equ	x'e04112
  
; Winchester driver
WD_SASIDATA:	.equ	x'e040a0  ; data
WD_SASIIN:	.equ	x'e040a2  ; control in
WD_SASIOUT:	.equ	x'e040a4  ; control out

#if NTCU > 0
; memory assignments for the tape device (word addresses)
TCUA_STATUS:	.equ	x'e04200  ;immediate status (read only)
TCUA_CLRINHIBIT: .equ	x'e04202  ;clear inhibit tape action latch (read only)
TCUA_SETINHIBIT: .equ	x'e04204  ;set inhibit tape action latch (read only)
TCUA_CMMDFIRST:	.equ	x'e04200  ;write first command words
TCUA_CMMDLAST:	.equ	x'e04204  ;write last command word
TCUA_ACK:	.equ	x'e04208  ;interrupt acknowledge
#endif

; memory assignment for the temporary page (used for the memory device)
TEMPPAGE:	.equ	x'e04400  ;physical address set at runtime

; the U. area
BOTU:		.equ	x'e04800  ;Current user u. area (UPAGES long)
BOTXU:		.equ    x'e05000  ;Inactive user u. area (USIZE * NPROC long)

; Free pages after BOTXU + (USIZE * NPROC)

; CPU board
; Because these are used by the ROM monitor, the physical and
; virtual addresses must be identical.
;
CP_MasterICU:	.equ	x'fffe00
; CP_RemoteICU:	.equ	x'fffc00
CP_UsartPAGE:	.equ	x'fff800 ; make sure we don't screw up mmu...
CP_Usart:	.equ	x'fff810
CP_PIO:		.equ	x'fff800
WD_Usart:	.equ	x'fff8a6
WD_Baudrate:	.equ	x'fff8aa
; CP_ErrorReg:	.equ	x'fff200
; CP_TestReg:	.equ	x'fff000
; CP_DiagReg:	.equ	x'ffee00
; CP_IBTLsel:	.equ	x'ffec00
; CP_IBcontrol:	.equ	x'ffea00
; CP_Aux1:	.equ	x'ffe800
; CP_Aux2:	.equ	x'ffe600
; CP_Aux3:	.equ	x'ffe400
; CP_Aux4:	.equ	x'ffe200

#else	/* ! LOCORE */

#define BADR(n)	((unsigned char *)(n))	/* byte address recast */
#define WADR(n)	((unsigned short *)(n))	/* word address recast */

#if NSIO > 0
/*
 * SIO board:
 *	0x10000 bytes of address space consumed,
 *	but only first 0x1c02 need be mapped.
 */
#define SIO_BASE:	BADR(0xe040b0)
#endif NSIO

/* Graphics board (screen) */
#define GB_VideoRAM	0xc00000

/* Rom monitor */
# define PR_Monitor	0xe00000
# define PR_Pagelen	16

/* Pages e02000 - e02600 are unused and available */

/* a page for several Comet things */

#define MPS_PAGE	BADR(0xe04000)	/* start of page */

/* Floppy and printer */
#define MPS_RAMIO	BADR(0xe04000)	/* ram for read/write */
#define MPS_COMMAND	BADR(0xe04002)	/* command port */
#define MPS_STATUS	BADR(0xe04004)  /* status port */
#define MPS_RAMRESET	BADR(0xe04006)	/* reset ram counter */
#define MPS_INTERRUPT	BADR(0xe04008)	/* interrupt */
#define MPS_HARDRESET	BADR(0xe0400a)	/* hardware reset */
#define MPS_HANDSHAKE	BADR(0xe0400c)	/* handshake bits */
#define MPS_PRINT	BADR(0xe0400e)	/* printer data out port */

/* Graphics board (keyboard and control) */
#define	GB_Keyboard	BADR(0xe04014)
#define GB_Utility	BADR(0xe04110)
#define GB_Control	BADR(0xe04112)

/* Winchester driver */
#define WD_SASIDATA	BADR(0xe040a0)	/* data */
#define WD_SASIIN	BADR(0xe040a2)	/* control in */
#define WD_SASIOUT	BADR(0xe040a4)	/* control out */

#if NTCU > 0
/* memory assignments for the tape device (word addresses) */
#define TCUA_STATUS	WADR(0xe04200)  /* immediate status (read only) */
#define TCUA_CLRINHIBIT	WADR(0xe04202)  /* clear inhibit (read only) */
#define TCUA_SETINHIBIT	WADR(0xe04204)  /* set inhibit (read only) */
#define TCUA_CMMDFIRST	WADR(0xe04200)  /* write first command words */
#define TCUA_CMMDLAST	WADR(0xe04204)  /* write last command word */
#define TCUA_ACK	WADR(0xe04208)  /* interrupt acknowledge */
#endif

/* memory assignment for the temporary page (used for the memory device) */
#define	TEMPPAGE	0xe04400	/* physical address set at runtime */

/* the U. area */
#define BOTU		0xe04800	/* Current u. area (UPAGES long) */
#define BOTXU		0xe05000	/* Inactive user u. area */
					/* (USIZE * NPROC) long */
/* Free pages after BOTXU + (USIZE * NPROC) */

/* CPU board */
/* Because these are used by the ROM monitor, the physical and
 * virtual addresses must be identical.
 */
#define 	CP_MasterICU	0xfffe00
/* #define 	CP_RemoteICU	0xfffc00	*/
#define		CP_UsartPAGE	0xfff800 /* make sure... */
#define		CP_Usart	0xfff810
#define 	CP_PIO		0xfff800
#define 	WD_Usart	0xfff8a6	
#define 	WD_Baudrate	0xfff8aa	
/* #define 	CP_ErrorReg	0xfff200	*/
/* #define 	CP_TestReg	0xfff000	*/
/* #define 	CP_DiagReg	0xffee00	*/
/* #define 	CP_IBTLsel	0xffec00	*/
/* #define 	CP_IBcontrol	0xffea00	*/
/* #define 	CP_Aux1		0xffe800	*/
/* #define 	CP_Aux2		0xffe600	*/
/* #define 	CP_Aux3		0xffe400	*/
/* #define 	CP_Aux4		0xffe200	*/

#endif
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ICL Comet 32

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