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DataMuseum.dkPresents historical artifacts from the history of: CP/M |
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Length: 5632 (0x1600)
Types: RcTekst
Names: »44RT2157.WP«
└─⟦481be0aa0⟧ Bits:30008870 Diskette med 42-I og 44-RT dokumenter
└─⟦this⟧ »44RT2157.WP«
╱04002d4e0a0006000000000201413140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
i↲
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┆b0┆┆a2┆┆e2┆┆a1┆TABLE OF CONTENTS ┆05┆PAGE↲
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┆b0┆1. INTRODUCTION ┆f0┆............................................ 1↲
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┆b0┆2. PROTOCOL┆f0┆ ................................................ 2↲
2.1 Address Character .................................. 3↲
2.2 Data Character ..................................... 3↲
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┆b0┆3. SELECTION OF CIRCUIT II┆f0┆ ................................. 4↲
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┆b0┆4. HARDWARE AND EXAMPLES┆f0┆ ................................... 5↲
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ii↲
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┆14┆┆b3┆ ┆0b┆↲
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┆b0┆┆a1┆1. INTRODUCTION↲
↲
┆84┆The protocol is designed as a local network for VDU ↓
┆19┆┆89┆┄┄terminals in the RC850 family and are connected to an ↓
┆19┆┆89┆┄┄RC3900.↲
↲
┆84┆The line used is a high speed twisted pair connection ↓
┆19┆┆89┆┄┄with the following characteristics:↲
↲
- Half duplex operation↲
- High speed serial data transfer↲
- A line length of maximum 1500 meters.↲
↲
┆84┆The data format used is a polled character by character ↓
┆19┆┆89┆┄┄format, which allows transfer of any 8 bit data.↲
↲
┆84┆The address character allows for multipoint operation, ↓
┆19┆┆89┆┄┄with a maximum of 32 connected terminals.↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆2. PROTOCOL↲
↲
┆84┆The CIRCUIT II is used as a local network between an ↓
┆19┆┆89┆┄┄RC3900 (master) and the work stations RC850 (terminals).↲
↲
┆84┆The terminals are controlled by a poll from the master. ↓
┆19┆┆89┆┄┄A poll can have two different forms:↲
↲
1) a poll without data from the master↲
2) a poll with data from the master↲
↲
┆84┆In both cases the terminal has to answer the poll, this ↓
┆19┆┆89┆┄┄can again be in two different forms:↲
↲
1) an answer without data from the terminal↲
2) an answer with data from the terminal↲
↲
┆84┆A bit on CIRCUIT II has a length of 4 usec. If it is a ↓
┆19┆┆89┆┄┄logic one all 4 usec. are at same level. If it is a ↓
┆19┆┆89┆┄┄logic zero the bit will be 2 usec. at one level and then ↓
┆19┆┆89┆┄┄2 usec. at the other level. The start sequence from the ↓
┆19┆┆89┆┄┄master consist of two 6 usec. bits, without level ↓
┆19┆┆89┆┄┄shift. From the terminal the start sequence consists of ↓
┆19┆┆89┆┄┄two one and one zero bit. The signals on CIRCUIT II have ↓
┆19┆┆89┆┄┄no defined polarity. Bits are detected by a shift in ↓
┆19┆┆89┆┄┄levels. See fig. 1.↲
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Figure 1: CIRCUIT II bits, and start sequences.↲
↲
┆84┆A character from the master consists of 12 bits:↲
↲
┆84┆The start sequence (two bits), 8 databit, a paritybit, ↓
┆19┆┆89┆┄┄and a stopbit.↲
↲
┆84┆A character from the terminal consists of either 4 or 14 ↓
┆19┆┆89┆┄┄bits:↲
↲
┆84┆If the terminal does not have data to send, the 4 bits ↓
┆19┆┆89┆┄┄are sent. They are 4 ones. This is done while the master ↓
┆19┆┆89┆┄┄otherwise will wait time out thereby delaying the ↓
┆19┆┆89┆┄┄overall transmission speed.↲
↲
┆8c┆┆83┆┆c0┆↓
┆84┆The 14 bits are sent when there is data. They are the ↓
┆19┆┆89┆┄┄start sequence (three bits), 8 databit, a parity bit and ↓
┆19┆┆89┆┄┄two stop bit.↲
↲
↲
┆b0┆┆a1┆2.1 Address Character↲
↲
┆84┆A poll is always started by an address character which, ↓
┆19┆┆89┆┄┄when demodulated will have the following form: ↲
↲
bit ┆a1┆1 2 3 4 5 6 7 8 9↲
↲
value A A A A A X C X P↲
↲
┆84┆The first 5 bits are the address bits and are labelled ↓
┆19┆┆89┆┄┄A. This gives a maximum of 32 terminals. The X's are ↓
┆19┆┆89┆┄┄don't cares. C is the bit that tells if data is ↓
┆19┆┆89┆┄┄following. A logic 1 indicates that data is following, a ↓
┆19┆┆89┆┄┄logic 0 that no data is following. P is the parity bit.↲
↲
↲
┆b0┆┆a1┆2.2 Data Character↲
↲
┆84┆The data characters have the following form:↲
↲
bit ┆a1┆1 2 3 4 5 6 7 8 9↲
↲
value D D D D D D D D P↲
↲
┆84┆As it can be seen there are 8 data bits and one parity ↓
┆19┆┆89┆┄┄bit.↲
↲
┆84┆If there is no data for the master, the character sent ↓
┆19┆┆89┆┄┄will be 4 ones. No start bit or parity bit.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆3. SELECTION OF CIRCUIT II↲
↲
┆84┆The terminal is used as a TTY. Therefore the user has to ↓
┆19┆┆89┆┄┄choose between LINE 1 and CIRCUIT II. This is done by ↓
┆19┆┆89┆┄┄means of the two V24 signals labelled DTRA and RTSA.↲
↲
┆84┆Line 1 is selected by activating DTRA for a minimum of ↓
┆19┆┆89┆┄┄25 nsec before RTSA. CIRCUIT II is selected activating ↓
┆19┆┆89┆┄┄RTSA for a minimum of 20 nsec before DTRA.↲
↲
┆84┆Each time DTRA is activated the selection circuit is ↓
┆19┆┆89┆┄┄triggered. Changes in the RTSA have no effect. Every ↓
┆19┆┆89┆┄┄time CIRCUIT II is selected, an address to the selection ↓
┆19┆┆89┆┄┄circuit must be sent. This is done by sending a ↓
┆19┆┆89┆┄┄character from the MIC board to the CTA501 which will be ↓
┆19┆┆89┆┄┄an 8 bit data byte with the address in the 5 lower bits, ↓
┆19┆┆89┆┄┄and with odd parity. The address is the secondary ↓
┆19┆┆89┆┄┄address in the terminal and changeable in CONFI.↲
↲
┆84┆Normal communication between the CTA501 and the MIC ↓
┆19┆┆89┆┄┄board is with 9600 baud, 1 startbit, 8 databits, even ↓
┆19┆┆89┆┄┄parity and 1 stopbit.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆4. HARDWARE AND EXAMPLES↲
↲
┆84┆Cable type : 2x2x0.6mm (e.g. NEK PT/CN-1)↲
Cable length : maximum 1500 meters↲
Wall receptacle : TF669 (WRF501)↲
Terminal cable : TF673 (KBL604)↲
↲
┆84┆As shown in fig. 1, the connections to the receptacles ↓
┆19┆┆89┆┄┄must not be made as stubs. The cable has to be wired ↓
┆19┆┆89┆┄┄through the receptacle.↲
↲
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Figure 1: Installation of DUAL CIRCUIT↲
↲
┆84┆↲
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════════════════════════════════════════════════════════════════════════
↓
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┆1a┆┆1a┆nual RCSL↲
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←
0x0000…0020 (0,) 00 00 00 00 00 00 00 00 42 03 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4e 00 00 00 ┆ B N ┆
0x0020…0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ ┆
0x0040…0047 00 00 00 00 00 00 00 ┆ ┆
0x0047…0080 Params {
0x0047…0080 04 00 2d 4e 0a 00 06 00 00 00 00 02 01 41 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N A1@ ┆
0x0047…0080 00 00 00 00 00 00 00 00 05 0f 19 23 2d 37 41 4b 55 5f 69 73 7d 87 91 ff 04 ┆ #-7AKU_iså ┆
0x0047…0080 }
0x0080…00a0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆ ┆
0x00a0…00c0 69 0d 0a 0d 0a b0 a2 e2 a1 54 41 42 4c 45 20 4f 46 20 43 4f 4e 54 45 4e 54 53 20 05 50 41 47 45 ┆i TABLE OF CONTENTS PAGE┆
0x00c0…00e0 0d 0a 0d 0a b0 31 2e 20 20 49 4e 54 52 4f 44 55 43 54 49 4f 4e 20 f0 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ 1. INTRODUCTION .........┆
0x00e0…0100 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆................................┆
0x0100…0120 2e 2e 2e 20 20 20 31 0d 0a 0d 0a b0 32 2e 20 20 50 52 4f 54 4f 43 4f 4c f0 20 2e 2e 2e 2e 2e 2e ┆... 1 2. PROTOCOL ......┆
0x0120…0140 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆................................┆
0x0140…0160 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 32 0d 0a 20 20 20 20 32 2e 31 20 20 41 64 64 72 65 73 73 ┆.......... 2 2.1 Address┆
0x0160…0180 20 43 68 61 72 61 63 74 65 72 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ Character .....................┆
0x0180…01a0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 33 0d 0a 20 20 20 20 32 2e 32 20 20 44 61 74 61 ┆............. 3 2.2 Data┆
0x01a0…01c0 20 43 68 61 72 61 63 74 65 72 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ Character .....................┆
0x01c0…01e0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 33 0d 0a 0d 0a b0 33 2e 20 20 53 45 4c ┆................ 3 3. SEL┆
0x01e0…0200 45 43 54 49 4f 4e 20 4f 46 20 43 49 52 43 55 49 54 20 49 49 f0 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ECTION OF CIRCUIT II ..........┆
0x0200…0220 (1,) 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 34 0d 0a 0d 0a b0 ┆....................... 4 ┆
0x0220…0240 34 2e 20 20 48 41 52 44 57 41 52 45 20 41 4e 44 20 45 58 41 4d 50 4c 45 53 f0 20 2e 2e 2e 2e 2e ┆4. HARDWARE AND EXAMPLES .....┆
0x0240…0260 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 ┆.............................. ┆
0x0260…0266 20 35 0d 0a 0d 0a ┆ 5 ┆
0x0266…0269 FormFeed {
0x0266…0269 0c 80 f0 ┆ ┆
0x0266…0269 }
0x0269…0280 0a 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆ ┆
0x0280…0290 20 20 20 20 20 20 20 20 20 20 69 69 0d 0a 0d 0a ┆ ii ┆
0x0290…0293 FormFeed {
0x0290…0293 0c 80 90 ┆ ┆
0x0290…0293 }
0x0293…02a0 0a 14 b3 20 20 20 20 20 20 20 20 20 20 ┆ ┆
0x02a0…02c0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 0b 0d 0a 0d 0a b0 a1 31 2e 20 ┆ 1. ┆
0x02c0…02e0 20 20 20 20 20 20 49 4e 54 52 4f 44 55 43 54 49 4f 4e 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 ┆ INTRODUCTION ┆
0x02e0…0300 54 68 65 20 70 72 6f 74 6f 63 6f 6c 20 69 73 20 64 65 73 69 67 6e 65 64 20 61 73 20 61 20 6c 6f ┆The protocol is designed as a lo┆
0x0300…0320 63 61 6c 20 6e 65 74 77 6f 72 6b 20 66 6f 72 20 56 44 55 20 0a 19 89 80 80 74 65 72 6d 69 6e 61 ┆cal network for VDU termina┆
0x0320…0340 6c 73 20 69 6e 20 74 68 65 20 52 43 38 35 30 20 66 61 6d 69 6c 79 20 61 6e 64 20 61 72 65 20 63 ┆ls in the RC850 family and are c┆
0x0340…0360 6f 6e 6e 65 63 74 65 64 20 74 6f 20 61 6e 20 0a 19 89 80 80 52 43 33 39 30 30 2e 0d 0a 0d 0a 20 ┆onnected to an RC3900. ┆
0x0360…0380 20 20 20 20 20 20 20 20 84 54 68 65 20 6c 69 6e 65 20 75 73 65 64 20 69 73 20 61 20 68 69 67 68 ┆ The line used is a high┆
0x0380…03a0 20 73 70 65 65 64 20 74 77 69 73 74 65 64 20 70 61 69 72 20 63 6f 6e 6e 65 63 74 69 6f 6e 20 0a ┆ speed twisted pair connection ┆
0x03a0…03c0 19 89 80 80 77 69 74 68 20 74 68 65 20 66 6f 6c 6c 6f 77 69 6e 67 20 63 68 61 72 61 63 74 65 72 ┆ with the following character┆
0x03c0…03e0 69 73 74 69 63 73 3a 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 2d 20 48 61 6c 66 20 64 75 70 6c 65 ┆istics: - Half duple┆
0x03e0…0400 78 20 6f 70 65 72 61 74 69 6f 6e 0d 0a 20 20 20 20 20 20 20 20 20 2d 20 48 69 67 68 20 73 70 65 ┆x operation - High spe┆
0x0400…0420 (2,) 65 64 20 73 65 72 69 61 6c 20 64 61 74 61 20 74 72 61 6e 73 66 65 72 0d 0a 20 20 20 20 20 20 20 ┆ed serial data transfer ┆
0x0420…0440 20 20 2d 20 41 20 6c 69 6e 65 20 6c 65 6e 67 74 68 20 6f 66 20 6d 61 78 69 6d 75 6d 20 31 35 30 ┆ - A line length of maximum 150┆
0x0440…0460 30 20 6d 65 74 65 72 73 2e 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 54 68 65 20 64 61 74 61 20 ┆0 meters. The data ┆
0x0460…0480 66 6f 72 6d 61 74 20 75 73 65 64 20 69 73 20 61 20 70 6f 6c 6c 65 64 20 63 68 61 72 61 63 74 65 ┆format used is a polled characte┆
0x0480…04a0 72 20 62 79 20 63 68 61 72 61 63 74 65 72 20 0a 19 89 80 80 66 6f 72 6d 61 74 2c 20 77 68 69 63 ┆r by character format, whic┆
0x04a0…04c0 68 20 61 6c 6c 6f 77 73 20 74 72 61 6e 73 66 65 72 20 6f 66 20 61 6e 79 20 38 20 62 69 74 20 64 ┆h allows transfer of any 8 bit d┆
0x04c0…04e0 61 74 61 2e 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 54 68 65 20 61 64 64 72 65 73 73 20 63 68 ┆ata. The address ch┆
0x04e0…0500 61 72 61 63 74 65 72 20 61 6c 6c 6f 77 73 20 66 6f 72 20 6d 75 6c 74 69 70 6f 69 6e 74 20 6f 70 ┆aracter allows for multipoint op┆
0x0500…0520 65 72 61 74 69 6f 6e 2c 20 0a 19 89 80 80 77 69 74 68 20 61 20 6d 61 78 69 6d 75 6d 20 6f 66 20 ┆eration, with a maximum of ┆
0x0520…053d 33 32 20 63 6f 6e 6e 65 63 74 65 64 20 74 65 72 6d 69 6e 61 6c 73 2e 0d 0a 0d 0a 0d 0a ┆32 connected terminals. ┆
0x053d…0540 FormFeed {
0x053d…0540 0c 81 a8 ┆ ┆
0x053d…0540 }
0x0540…0560 0a b0 a1 32 2e 20 20 20 20 20 20 20 50 52 4f 54 4f 43 4f 4c 0d 0a 0d 0a 20 20 20 20 20 20 20 20 ┆ 2. PROTOCOL ┆
0x0560…0580 20 84 54 68 65 20 43 49 52 43 55 49 54 20 49 49 20 69 73 20 75 73 65 64 20 61 73 20 61 20 6c 6f ┆ The CIRCUIT II is used as a lo┆
0x0580…05a0 63 61 6c 20 6e 65 74 77 6f 72 6b 20 62 65 74 77 65 65 6e 20 61 6e 20 0a 19 89 80 80 52 43 33 39 ┆cal network between an RC39┆
0x05a0…05c0 30 30 20 28 6d 61 73 74 65 72 29 20 61 6e 64 20 74 68 65 20 77 6f 72 6b 20 73 74 61 74 69 6f 6e ┆00 (master) and the work station┆
0x05c0…05e0 73 20 52 43 38 35 30 20 28 74 65 72 6d 69 6e 61 6c 73 29 2e 0d 0a 0d 0a 20 20 20 20 20 20 20 20 ┆s RC850 (terminals). ┆
0x05e0…0600 20 84 54 68 65 20 74 65 72 6d 69 6e 61 6c 73 20 61 72 65 20 63 6f 6e 74 72 6f 6c 6c 65 64 20 62 ┆ The terminals are controlled b┆
0x0600…0620 (3,) 79 20 61 20 70 6f 6c 6c 20 66 72 6f 6d 20 74 68 65 20 6d 61 73 74 65 72 2e 20 0a 19 89 80 80 41 ┆y a poll from the master. A┆
0x0620…0640 20 70 6f 6c 6c 20 63 61 6e 20 68 61 76 65 20 74 77 6f 20 64 69 66 66 65 72 65 6e 74 20 66 6f 72 ┆ poll can have two different for┆
0x0640…0660 6d 73 3a 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 31 29 20 61 20 70 6f 6c 6c 20 77 69 74 68 6f 75 ┆ms: 1) a poll withou┆
0x0660…0680 74 20 64 61 74 61 20 66 72 6f 6d 20 74 68 65 20 6d 61 73 74 65 72 0d 0a 20 20 20 20 20 20 20 20 ┆t data from the master ┆
0x0680…06a0 20 32 29 20 61 20 70 6f 6c 6c 20 77 69 74 68 20 64 61 74 61 20 66 72 6f 6d 20 74 68 65 20 6d 61 ┆ 2) a poll with data from the ma┆
0x06a0…06c0 73 74 65 72 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 49 6e 20 62 6f 74 68 20 63 61 73 65 73 20 ┆ster In both cases ┆
0x06c0…06e0 74 68 65 20 74 65 72 6d 69 6e 61 6c 20 68 61 73 20 74 6f 20 61 6e 73 77 65 72 20 74 68 65 20 70 ┆the terminal has to answer the p┆
0x06e0…0700 6f 6c 6c 2c 20 74 68 69 73 20 0a 19 89 80 80 63 61 6e 20 61 67 61 69 6e 20 62 65 20 69 6e 20 74 ┆oll, this can again be in t┆
0x0700…0720 77 6f 20 64 69 66 66 65 72 65 6e 74 20 66 6f 72 6d 73 3a 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 ┆wo different forms: ┆
0x0720…0740 31 29 20 61 6e 20 61 6e 73 77 65 72 20 77 69 74 68 6f 75 74 20 64 61 74 61 20 66 72 6f 6d 20 74 ┆1) an answer without data from t┆
0x0740…0760 68 65 20 74 65 72 6d 69 6e 61 6c 0d 0a 20 20 20 20 20 20 20 20 20 32 29 20 61 6e 20 61 6e 73 77 ┆he terminal 2) an answ┆
0x0760…0780 65 72 20 77 69 74 68 20 64 61 74 61 20 66 72 6f 6d 20 74 68 65 20 74 65 72 6d 69 6e 61 6c 0d 0a ┆er with data from the terminal ┆
0x0780…07a0 0d 0a 20 20 20 20 20 20 20 20 20 84 41 20 62 69 74 20 6f 6e 20 43 49 52 43 55 49 54 20 49 49 20 ┆ A bit on CIRCUIT II ┆
0x07a0…07c0 68 61 73 20 61 20 6c 65 6e 67 74 68 20 6f 66 20 34 20 75 73 65 63 2e 20 49 66 20 69 74 20 69 73 ┆has a length of 4 usec. If it is┆
0x07c0…07e0 20 61 20 0a 19 89 80 80 6c 6f 67 69 63 20 6f 6e 65 20 61 6c 6c 20 34 20 75 73 65 63 2e 20 61 72 ┆ a logic one all 4 usec. ar┆
0x07e0…0800 65 20 61 74 20 73 61 6d 65 20 6c 65 76 65 6c 2e 20 49 66 20 69 74 20 69 73 20 61 20 0a 19 89 80 ┆e at same level. If it is a ┆
0x0800…0820 (4,) 80 6c 6f 67 69 63 20 7a 65 72 6f 20 74 68 65 20 62 69 74 20 77 69 6c 6c 20 62 65 20 32 20 75 73 ┆ logic zero the bit will be 2 us┆
0x0820…0840 65 63 2e 20 61 74 20 6f 6e 65 20 6c 65 76 65 6c 20 61 6e 64 20 74 68 65 6e 20 0a 19 89 80 80 32 ┆ec. at one level and then 2┆
0x0840…0860 20 75 73 65 63 2e 20 61 74 20 74 68 65 20 6f 74 68 65 72 20 6c 65 76 65 6c 2e 20 54 68 65 20 73 ┆ usec. at the other level. The s┆
0x0860…0880 74 61 72 74 20 73 65 71 75 65 6e 63 65 20 66 72 6f 6d 20 74 68 65 20 0a 19 89 80 80 6d 61 73 74 ┆tart sequence from the mast┆
0x0880…08a0 65 72 20 63 6f 6e 73 69 73 74 20 6f 66 20 74 77 6f 20 36 20 75 73 65 63 2e 20 62 69 74 73 2c 20 ┆er consist of two 6 usec. bits, ┆
0x08a0…08c0 20 77 69 74 68 6f 75 74 20 6c 65 76 65 6c 20 0a 19 89 80 80 73 68 69 66 74 2e 20 46 72 6f 6d 20 ┆ without level shift. From ┆
0x08c0…08e0 74 68 65 20 74 65 72 6d 69 6e 61 6c 20 74 68 65 20 73 74 61 72 74 20 73 65 71 75 65 6e 63 65 20 ┆the terminal the start sequence ┆
0x08e0…0900 63 6f 6e 73 69 73 74 73 20 6f 66 20 0a 19 89 80 80 74 77 6f 20 6f 6e 65 20 61 6e 64 20 6f 6e 65 ┆consists of two one and one┆
0x0900…0920 20 7a 65 72 6f 20 62 69 74 2e 20 54 68 65 20 73 69 67 6e 61 6c 73 20 6f 6e 20 43 49 52 43 55 49 ┆ zero bit. The signals on CIRCUI┆
0x0920…0940 54 20 49 49 20 68 61 76 65 20 0a 19 89 80 80 6e 6f 20 64 65 66 69 6e 65 64 20 70 6f 6c 61 72 69 ┆T II have no defined polari┆
0x0940…0960 74 79 2e 20 42 69 74 73 20 61 72 65 20 64 65 74 65 63 74 65 64 20 62 79 20 61 20 73 68 69 66 74 ┆ty. Bits are detected by a shift┆
0x0960…0980 20 69 6e 20 0a 19 89 80 80 6c 65 76 65 6c 73 2e 20 53 65 65 20 66 69 67 2e 20 31 2e 0d 0a 0d 0a ┆ in levels. See fig. 1. ┆
0x0980…09a0 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 20 20 20 20 ┆ ┆
0x09a0…09c0 20 20 20 20 20 46 69 67 75 72 65 20 31 3a 20 43 49 52 43 55 49 54 20 49 49 20 62 69 74 73 2c 20 ┆ Figure 1: CIRCUIT II bits, ┆
0x09c0…09e0 61 6e 64 20 73 74 61 72 74 20 73 65 71 75 65 6e 63 65 73 2e 0d 0a 0d 0a 20 20 20 20 20 20 20 20 ┆and start sequences. ┆
0x09e0…0a00 20 84 41 20 63 68 61 72 61 63 74 65 72 20 66 72 6f 6d 20 74 68 65 20 6d 61 73 74 65 72 20 63 6f ┆ A character from the master co┆
0x0a00…0a20 (5,) 6e 73 69 73 74 73 20 6f 66 20 31 32 20 62 69 74 73 3a 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 ┆nsists of 12 bits: ┆
0x0a20…0a40 54 68 65 20 73 74 61 72 74 20 73 65 71 75 65 6e 63 65 20 28 74 77 6f 20 62 69 74 73 29 2c 20 38 ┆The start sequence (two bits), 8┆
0x0a40…0a60 20 64 61 74 61 62 69 74 2c 20 61 20 70 61 72 69 74 79 62 69 74 2c 20 0a 19 89 80 80 61 6e 64 20 ┆ databit, a paritybit, and ┆
0x0a60…0a80 61 20 73 74 6f 70 62 69 74 2e 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 41 20 63 68 61 72 61 63 ┆a stopbit. A charac┆
0x0a80…0aa0 74 65 72 20 66 72 6f 6d 20 74 68 65 20 74 65 72 6d 69 6e 61 6c 20 63 6f 6e 73 69 73 74 73 20 6f ┆ter from the terminal consists o┆
0x0aa0…0ac0 66 20 65 69 74 68 65 72 20 34 20 6f 72 20 31 34 20 0a 19 89 80 80 62 69 74 73 3a 0d 0a 0d 0a 20 ┆f either 4 or 14 bits: ┆
0x0ac0…0ae0 20 20 20 20 20 20 20 20 84 49 66 20 74 68 65 20 74 65 72 6d 69 6e 61 6c 20 64 6f 65 73 20 6e 6f ┆ If the terminal does no┆
0x0ae0…0b00 74 20 68 61 76 65 20 64 61 74 61 20 74 6f 20 73 65 6e 64 2c 20 74 68 65 20 34 20 62 69 74 73 20 ┆t have data to send, the 4 bits ┆
0x0b00…0b20 0a 19 89 80 80 61 72 65 20 73 65 6e 74 2e 20 54 68 65 79 20 61 72 65 20 34 20 6f 6e 65 73 2e 20 ┆ are sent. They are 4 ones. ┆
0x0b20…0b40 54 68 69 73 20 69 73 20 64 6f 6e 65 20 77 68 69 6c 65 20 74 68 65 20 6d 61 73 74 65 72 20 0a 19 ┆This is done while the master ┆
0x0b40…0b60 89 80 80 6f 74 68 65 72 77 69 73 65 20 77 69 6c 6c 20 77 61 69 74 20 74 69 6d 65 20 6f 75 74 20 ┆ otherwise will wait time out ┆
0x0b60…0b80 74 68 65 72 65 62 79 20 64 65 6c 61 79 69 6e 67 20 74 68 65 20 0a 19 89 80 80 6f 76 65 72 61 6c ┆thereby delaying the overal┆
0x0b80…0ba0 6c 20 74 72 61 6e 73 6d 69 73 73 69 6f 6e 20 73 70 65 65 64 2e 0d 0a 0d 0a 8c 83 c0 0a 20 20 20 ┆l transmission speed. ┆
0x0ba0…0bc0 20 20 20 20 20 20 84 54 68 65 20 31 34 20 62 69 74 73 20 61 72 65 20 73 65 6e 74 20 77 68 65 6e ┆ The 14 bits are sent when┆
0x0bc0…0be0 20 74 68 65 72 65 20 69 73 20 64 61 74 61 2e 20 54 68 65 79 20 61 72 65 20 74 68 65 20 0a 19 89 ┆ there is data. They are the ┆
0x0be0…0c00 80 80 73 74 61 72 74 20 73 65 71 75 65 6e 63 65 20 28 74 68 72 65 65 20 62 69 74 73 29 2c 20 38 ┆ start sequence (three bits), 8┆
0x0c00…0c20 (6,) 20 64 61 74 61 62 69 74 2c 20 61 20 70 61 72 69 74 79 20 62 69 74 20 61 6e 64 20 0a 19 89 80 80 ┆ databit, a parity bit and ┆
0x0c20…0c40 74 77 6f 20 73 74 6f 70 20 62 69 74 2e 0d 0a 0d 0a 0d 0a b0 a1 32 2e 31 20 20 20 20 20 20 41 64 ┆two stop bit. 2.1 Ad┆
0x0c40…0c60 64 72 65 73 73 20 43 68 61 72 61 63 74 65 72 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 41 20 70 ┆dress Character A p┆
0x0c60…0c80 6f 6c 6c 20 69 73 20 61 6c 77 61 79 73 20 73 74 61 72 74 65 64 20 62 79 20 61 6e 20 61 64 64 72 ┆oll is always started by an addr┆
0x0c80…0ca0 65 73 73 20 63 68 61 72 61 63 74 65 72 20 77 68 69 63 68 2c 20 0a 19 89 80 80 77 68 65 6e 20 64 ┆ess character which, when d┆
0x0ca0…0cc0 65 6d 6f 64 75 6c 61 74 65 64 20 77 69 6c 6c 20 68 61 76 65 20 74 68 65 20 66 6f 6c 6c 6f 77 69 ┆emodulated will have the followi┆
0x0cc0…0ce0 6e 67 20 66 6f 72 6d 3a 20 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 62 69 74 20 20 20 20 20 a1 31 ┆ng form: bit 1┆
0x0ce0…0d00 20 20 20 32 20 20 20 33 20 20 20 34 20 20 20 35 20 20 20 36 20 20 20 37 20 20 20 38 20 20 20 39 ┆ 2 3 4 5 6 7 8 9┆
0x0d00…0d20 0d 0a 20 20 20 20 20 20 20 0d 0a 20 20 20 20 20 20 20 20 20 76 61 6c 75 65 20 20 20 41 20 20 20 ┆ value A ┆
0x0d20…0d40 41 20 20 20 41 20 20 20 41 20 20 20 41 20 20 20 58 20 20 20 43 20 20 20 58 20 20 20 50 0d 0a 0d ┆A A A A X C X P ┆
0x0d40…0d60 0a 20 20 20 20 20 20 20 20 20 84 54 68 65 20 66 69 72 73 74 20 35 20 62 69 74 73 20 61 72 65 20 ┆ The first 5 bits are ┆
0x0d60…0d80 74 68 65 20 61 64 64 72 65 73 73 20 62 69 74 73 20 61 6e 64 20 61 72 65 20 6c 61 62 65 6c 6c 65 ┆the address bits and are labelle┆
0x0d80…0da0 64 20 0a 19 89 80 80 41 2e 20 54 68 69 73 20 67 69 76 65 73 20 61 20 6d 61 78 69 6d 75 6d 20 6f ┆d A. This gives a maximum o┆
0x0da0…0dc0 66 20 33 32 20 74 65 72 6d 69 6e 61 6c 73 2e 20 54 68 65 20 58 27 73 20 61 72 65 20 0a 19 89 80 ┆f 32 terminals. The X's are ┆
0x0dc0…0de0 80 64 6f 6e 27 74 20 63 61 72 65 73 2e 20 43 20 69 73 20 74 68 65 20 62 69 74 20 74 68 61 74 20 ┆ don't cares. C is the bit that ┆
0x0de0…0e00 74 65 6c 6c 73 20 69 66 20 64 61 74 61 20 69 73 20 0a 19 89 80 80 66 6f 6c 6c 6f 77 69 6e 67 2e ┆tells if data is following.┆
0x0e00…0e20 (7,) 20 41 20 6c 6f 67 69 63 20 31 20 69 6e 64 69 63 61 74 65 73 20 74 68 61 74 20 64 61 74 61 20 69 ┆ A logic 1 indicates that data i┆
0x0e20…0e40 73 20 66 6f 6c 6c 6f 77 69 6e 67 2c 20 61 20 0a 19 89 80 80 6c 6f 67 69 63 20 30 20 74 68 61 74 ┆s following, a logic 0 that┆
0x0e40…0e60 20 6e 6f 20 64 61 74 61 20 69 73 20 66 6f 6c 6c 6f 77 69 6e 67 2e 20 50 20 69 73 20 74 68 65 20 ┆ no data is following. P is the ┆
0x0e60…0e80 70 61 72 69 74 79 20 62 69 74 2e 0d 0a 0d 0a 0d 0a b0 a1 32 2e 32 20 20 20 20 20 20 44 61 74 61 ┆parity bit. 2.2 Data┆
0x0e80…0ea0 20 43 68 61 72 61 63 74 65 72 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 54 68 65 20 64 61 74 61 ┆ Character The data┆
0x0ea0…0ec0 20 63 68 61 72 61 63 74 65 72 73 20 68 61 76 65 20 74 68 65 20 66 6f 6c 6c 6f 77 69 6e 67 20 66 ┆ characters have the following f┆
0x0ec0…0ee0 6f 72 6d 3a 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 62 69 74 20 20 20 20 a1 31 20 20 20 32 20 20 ┆orm: bit 1 2 ┆
0x0ee0…0f00 20 33 20 20 20 34 20 20 20 35 20 20 20 36 20 20 20 37 20 20 20 38 20 20 20 39 0d 0a 0d 0a 20 20 ┆ 3 4 5 6 7 8 9 ┆
0x0f00…0f20 20 20 20 20 20 20 20 76 61 6c 75 65 20 20 44 20 20 20 44 20 20 20 44 20 20 20 44 20 20 20 44 20 ┆ value D D D D D ┆
0x0f20…0f40 20 20 44 20 20 20 44 20 20 20 44 20 20 20 50 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 41 73 20 ┆ D D D P As ┆
0x0f40…0f60 69 74 20 63 61 6e 20 62 65 20 73 65 65 6e 20 74 68 65 72 65 20 61 72 65 20 38 20 64 61 74 61 20 ┆it can be seen there are 8 data ┆
0x0f60…0f80 62 69 74 73 20 61 6e 64 20 6f 6e 65 20 70 61 72 69 74 79 20 0a 19 89 80 80 62 69 74 2e 0d 0a 0d ┆bits and one parity bit. ┆
0x0f80…0fa0 0a 20 20 20 20 20 20 20 20 20 84 49 66 20 74 68 65 72 65 20 69 73 20 6e 6f 20 64 61 74 61 20 66 ┆ If there is no data f┆
0x0fa0…0fc0 6f 72 20 74 68 65 20 6d 61 73 74 65 72 2c 20 74 68 65 20 63 68 61 72 61 63 74 65 72 20 73 65 6e ┆or the master, the character sen┆
0x0fc0…0fe0 74 20 0a 19 89 80 80 77 69 6c 6c 20 62 65 20 34 20 6f 6e 65 73 2e 20 4e 6f 20 73 74 61 72 74 20 ┆t will be 4 ones. No start ┆
0x0fe0…0ff6 62 69 74 20 6f 72 20 70 61 72 69 74 79 20 62 69 74 2e 0d 0a 0d 0a ┆bit or parity bit. ┆
0x0ff6…0ff9 FormFeed {
0x0ff6…0ff9 0c 82 98 ┆ ┆
0x0ff6…0ff9 }
0x0ff9…1000 0a b0 a1 33 2e 20 20 ┆ 3. ┆
0x1000…1020 (8,) 20 20 20 20 20 53 45 4c 45 43 54 49 4f 4e 20 4f 46 20 43 49 52 43 55 49 54 20 49 49 0d 0a 0d 0a ┆ SELECTION OF CIRCUIT II ┆
0x1020…1040 20 20 20 20 20 20 20 20 20 84 54 68 65 20 74 65 72 6d 69 6e 61 6c 20 69 73 20 75 73 65 64 20 61 ┆ The terminal is used a┆
0x1040…1060 73 20 61 20 54 54 59 2e 20 54 68 65 72 65 66 6f 72 65 20 74 68 65 20 75 73 65 72 20 68 61 73 20 ┆s a TTY. Therefore the user has ┆
0x1060…1080 74 6f 20 0a 19 89 80 80 63 68 6f 6f 73 65 20 62 65 74 77 65 65 6e 20 4c 49 4e 45 20 31 20 61 6e ┆to choose between LINE 1 an┆
0x1080…10a0 64 20 43 49 52 43 55 49 54 20 49 49 2e 20 54 68 69 73 20 69 73 20 64 6f 6e 65 20 62 79 20 0a 19 ┆d CIRCUIT II. This is done by ┆
0x10a0…10c0 89 80 80 6d 65 61 6e 73 20 6f 66 20 74 68 65 20 74 77 6f 20 56 32 34 20 73 69 67 6e 61 6c 73 20 ┆ means of the two V24 signals ┆
0x10c0…10e0 6c 61 62 65 6c 6c 65 64 20 44 54 52 41 20 61 6e 64 20 52 54 53 41 2e 0d 0a 0d 0a 20 20 20 20 20 ┆labelled DTRA and RTSA. ┆
0x10e0…1100 20 20 20 20 84 4c 69 6e 65 20 31 20 69 73 20 73 65 6c 65 63 74 65 64 20 62 79 20 61 63 74 69 76 ┆ Line 1 is selected by activ┆
0x1100…1120 61 74 69 6e 67 20 44 54 52 41 20 66 6f 72 20 61 20 6d 69 6e 69 6d 75 6d 20 6f 66 20 0a 19 89 80 ┆ating DTRA for a minimum of ┆
0x1120…1140 80 32 35 20 6e 73 65 63 20 62 65 66 6f 72 65 20 52 54 53 41 2e 20 43 49 52 43 55 49 54 20 49 49 ┆ 25 nsec before RTSA. CIRCUIT II┆
0x1140…1160 20 69 73 20 73 65 6c 65 63 74 65 64 20 61 63 74 69 76 61 74 69 6e 67 20 0a 19 89 80 80 52 54 53 ┆ is selected activating RTS┆
0x1160…1180 41 20 66 6f 72 20 61 20 6d 69 6e 69 6d 75 6d 20 6f 66 20 32 30 20 6e 73 65 63 20 62 65 66 6f 72 ┆A for a minimum of 20 nsec befor┆
0x1180…11a0 65 20 44 54 52 41 2e 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 45 61 63 68 20 74 69 6d 65 20 44 ┆e DTRA. Each time D┆
0x11a0…11c0 54 52 41 20 69 73 20 61 63 74 69 76 61 74 65 64 20 74 68 65 20 73 65 6c 65 63 74 69 6f 6e 20 63 ┆TRA is activated the selection c┆
0x11c0…11e0 69 72 63 75 69 74 20 69 73 20 0a 19 89 80 80 74 72 69 67 67 65 72 65 64 2e 20 43 68 61 6e 67 65 ┆ircuit is triggered. Change┆
0x11e0…1200 73 20 69 6e 20 74 68 65 20 52 54 53 41 20 68 61 76 65 20 6e 6f 20 65 66 66 65 63 74 2e 20 45 76 ┆s in the RTSA have no effect. Ev┆
0x1200…1220 (9,) 65 72 79 20 0a 19 89 80 80 74 69 6d 65 20 43 49 52 43 55 49 54 20 49 49 20 69 73 20 73 65 6c 65 ┆ery time CIRCUIT II is sele┆
0x1220…1240 63 74 65 64 2c 20 61 6e 20 61 64 64 72 65 73 73 20 74 6f 20 74 68 65 20 73 65 6c 65 63 74 69 6f ┆cted, an address to the selectio┆
0x1240…1260 6e 20 0a 19 89 80 80 63 69 72 63 75 69 74 20 6d 75 73 74 20 62 65 20 73 65 6e 74 2e 20 54 68 69 ┆n circuit must be sent. Thi┆
0x1260…1280 73 20 69 73 20 64 6f 6e 65 20 62 79 20 73 65 6e 64 69 6e 67 20 61 20 0a 19 89 80 80 63 68 61 72 ┆s is done by sending a char┆
0x1280…12a0 61 63 74 65 72 20 66 72 6f 6d 20 74 68 65 20 4d 49 43 20 62 6f 61 72 64 20 74 6f 20 74 68 65 20 ┆acter from the MIC board to the ┆
0x12a0…12c0 43 54 41 35 30 31 20 77 68 69 63 68 20 77 69 6c 6c 20 62 65 20 0a 19 89 80 80 61 6e 20 38 20 62 ┆CTA501 which will be an 8 b┆
0x12c0…12e0 69 74 20 64 61 74 61 20 62 79 74 65 20 77 69 74 68 20 74 68 65 20 61 64 64 72 65 73 73 20 69 6e ┆it data byte with the address in┆
0x12e0…1300 20 74 68 65 20 35 20 6c 6f 77 65 72 20 62 69 74 73 2c 20 0a 19 89 80 80 61 6e 64 20 77 69 74 68 ┆ the 5 lower bits, and with┆
0x1300…1320 20 6f 64 64 20 70 61 72 69 74 79 2e 20 54 68 65 20 61 64 64 72 65 73 73 20 69 73 20 74 68 65 20 ┆ odd parity. The address is the ┆
0x1320…1340 73 65 63 6f 6e 64 61 72 79 20 0a 19 89 80 80 61 64 64 72 65 73 73 20 69 6e 20 74 68 65 20 74 65 ┆secondary address in the te┆
0x1340…1360 72 6d 69 6e 61 6c 20 61 6e 64 20 63 68 61 6e 67 65 61 62 6c 65 20 69 6e 20 43 4f 4e 46 49 2e 0d ┆rminal and changeable in CONFI. ┆
0x1360…1380 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 4e 6f 72 6d 61 6c 20 63 6f 6d 6d 75 6e 69 63 61 74 69 6f ┆ Normal communicatio┆
0x1380…13a0 6e 20 62 65 74 77 65 65 6e 20 74 68 65 20 43 54 41 35 30 31 20 61 6e 64 20 74 68 65 20 4d 49 43 ┆n between the CTA501 and the MIC┆
0x13a0…13c0 20 0a 19 89 80 80 62 6f 61 72 64 20 69 73 20 77 69 74 68 20 39 36 30 30 20 62 61 75 64 2c 20 31 ┆ board is with 9600 baud, 1┆
0x13c0…13e0 20 73 74 61 72 74 62 69 74 2c 20 38 20 64 61 74 61 62 69 74 73 2c 20 65 76 65 6e 20 0a 19 89 80 ┆ startbit, 8 databits, even ┆
0x13e0…13fa 80 70 61 72 69 74 79 20 61 6e 64 20 31 20 73 74 6f 70 62 69 74 2e 0d 0a 0d 0a ┆ parity and 1 stopbit. ┆
0x13fa…13fd FormFeed {
0x13fa…13fd 0c 81 b8 ┆ ┆
0x13fa…13fd }
0x13fd…1400 0a b0 a1 ┆ ┆
0x1400…1420 (10,) 34 2e 20 20 20 20 20 20 20 48 41 52 44 57 41 52 45 20 41 4e 44 20 45 58 41 4d 50 4c 45 53 0d 0a ┆4. HARDWARE AND EXAMPLES ┆
0x1420…1440 0d 0a 20 20 20 20 20 20 20 20 20 84 43 61 62 6c 65 20 74 79 70 65 20 20 20 20 20 20 20 3a 20 20 ┆ Cable type : ┆
0x1440…1460 20 20 32 78 32 78 30 2e 36 6d 6d 20 28 65 2e 67 2e 20 4e 45 4b 20 50 54 2f 43 4e 2d 31 29 0d 0a ┆ 2x2x0.6mm (e.g. NEK PT/CN-1) ┆
0x1460…1480 20 20 20 20 20 20 20 20 20 43 61 62 6c 65 20 6c 65 6e 67 74 68 20 20 20 20 20 3a 20 20 20 20 6d ┆ Cable length : m┆
0x1480…14a0 61 78 69 6d 75 6d 20 31 35 30 30 20 6d 65 74 65 72 73 0d 0a 20 20 20 20 20 20 20 20 20 57 61 6c ┆aximum 1500 meters Wal┆
0x14a0…14c0 6c 20 72 65 63 65 70 74 61 63 6c 65 20 20 3a 20 20 20 20 54 46 36 36 39 20 28 57 52 46 35 30 31 ┆l receptacle : TF669 (WRF501┆
0x14c0…14e0 29 0d 0a 20 20 20 20 20 20 20 20 20 54 65 72 6d 69 6e 61 6c 20 63 61 62 6c 65 20 20 20 3a 20 20 ┆) Terminal cable : ┆
0x14e0…1500 20 20 54 46 36 37 33 20 28 4b 42 4c 36 30 34 29 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 84 41 73 ┆ TF673 (KBL604) As┆
0x1500…1520 20 73 68 6f 77 6e 20 69 6e 20 66 69 67 2e 20 31 2c 20 74 68 65 20 63 6f 6e 6e 65 63 74 69 6f 6e ┆ shown in fig. 1, the connection┆
0x1520…1540 73 20 74 6f 20 74 68 65 20 72 65 63 65 70 74 61 63 6c 65 73 20 0a 19 89 80 80 6d 75 73 74 20 6e ┆s to the receptacles must n┆
0x1540…1560 6f 74 20 62 65 20 6d 61 64 65 20 61 73 20 73 74 75 62 73 2e 20 54 68 65 20 63 61 62 6c 65 20 68 ┆ot be made as stubs. The cable h┆
0x1560…1580 61 73 20 74 6f 20 62 65 20 77 69 72 65 64 20 0a 19 89 80 80 74 68 72 6f 75 67 68 20 74 68 65 20 ┆as to be wired through the ┆
0x1580…15a0 72 65 63 65 70 74 61 63 6c 65 2e 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d 0a 0d ┆receptacle. ┆
0x15a0…15c0 0a 0d 0a 0d 0a 0d 0a 0d 0a 20 20 20 20 20 20 20 20 20 46 69 67 75 72 65 20 31 3a 20 49 6e 73 74 ┆ Figure 1: Inst┆
0x15c0…15e0 61 6c 6c 61 74 69 6f 6e 20 6f 66 20 44 55 41 4c 20 43 49 52 43 55 49 54 0d 0a 0d 0a 20 20 20 20 ┆allation of DUAL CIRCUIT ┆
0x15e0…15ea 20 20 20 20 20 84 0d 0a 0d 0a ┆ ┆
0x15ea…15ed FormFeed {
0x15ea…15ed 0c 81 e0 ┆ ┆
0x15ea…15ed }
0x15ed…1600 0a 0d 0a 1a 1a 6e 75 61 6c 20 52 43 53 4c 0d 0a 0d 0a 0d ┆ nual RCSL ┆