|
DataMuseum.dkPresents historical artifacts from the history of: CP/M |
This is an automatic "excavation" of a thematic subset of
See our Wiki for more about CP/M Excavated with: AutoArchaeologist - Free & Open Source Software. |
top - metrics - download
Length: 12800 (0x3200) Types: RcTekst Names: »99110277.WP«
└─⟦82b75ed7a⟧ Bits:30005866/disk4.imd Dokumenter i RcTekst format (RCSL 99-1-*) └─⟦this⟧ »99110277.WP«
╱04002d4c0a0006000000000301413100000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱ ┆06┆i↲ ↲ ┆a1┆┆b0┆TABLE OF CONTENTS┆05┆PAGE↲ ↲ 1. INTRODUCTION ............................................┆05┆1↲ ↲ 2. THE TESTROUTER ..........................................┆05┆3↲ 2.1 Switch Parameters ...................................┆05┆3↲ 2.2 Keyboard Management .................................┆05┆5↲ 2.3 Output ..............................................┆05┆6↲ ↲ 3. THE MEMORY TEST .........................................┆05┆7↲ 3.1 Checksum Test .......................................┆05┆7↲ 3.2 Ram Test ............................................┆05┆7↲ ↲ 4. MEMORY DATA MODIFICATION TEST ...........................┆05┆11↲ 4.1 Battery Test ........................................┆05┆11↲ ↲ 5. KEYBOARD TEST ...........................................┆05┆13↲ ↲ 6. CTC TEST ................................................┆05┆15↲ ↲ 7. X21 TEST ................................................┆05┆17↲ 7.1 SIO Channel Test ....................................┆05┆18↲ ↲ 8. PARALLEL PORT TEST ......................................┆05┆21↲ ↲ 9. CRT TEST .................................................┆05┆23↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆06┆ii↲ ════════════════════════════════════════════════════════════════════════ ↓ ════════════════════════════════════════════════════════════════════════ ↓ ┆14┆┆b3┆┆06┆┆0b┆↲ ┆14┆┆b3┆↲ ┆a1┆1. ╞ INTRODUCTION↲ ↲ ╞ ┆84┆This manual describes the diagnostic testprograms for the ↓ ┆19┆┆87┆┄┄RC45 DATEX terminal systems.↲ ↲ ╞ ┆84┆The testprograms are testing the basic functions of the ↓ ┆19┆┆87┆┄┄different parts of the hardware in the terminal.↲ ↲ ╞ ┆84┆The sequence of the different testprograms in the test ↓ ┆19┆┆87┆┄┄systems is organized with rising complexity. As far as ↓ ┆19┆┆87┆┄┄possible, no part of the hardware is used before it is ↓ ┆19┆┆87┆┄┄tested.↲ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆2.╞ THE TEST ROUTER↲ ↲ ┆84┆╞ ┆84┆The test router is the kernal in the testsystem, and have ↓ ┆19┆┆87┆┄┄the main purpose to compute the address of the next test ↓ ┆19┆┆87┆┄┄in the sequence. The address of the next test is derived ↓ ┆19┆┆87┆┄┄from a variable holding the present test number and ↓ ┆19┆┆87┆┄┄normally incremented by one. Every time a test has ↓ ┆19┆┆87┆┄┄finished and is not in looping mode, the test router is ↓ ┆19┆┆87┆┄┄entered.↲ ↲ ↲ ┆a1┆2.1╞ Switch Parameters↲ ↲ ┆84┆╞ ┆84┆The variable holding the test number also contains three ↓ ┆19┆┆87┆┄┄switch bits, by which the testrouter decides how to ↓ ┆19┆┆87┆┄┄administer the tests.↲ ╱04002d4c0a0006000000000201413100000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱ ╱04002d4c0a0006000000000301413100000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱ ↓ ↲ ┆a1┆ MSB LSB ↲ ! ! ! ! ! ! ! ! !↲ ╞ ! ! ! ! ! ! ! ! !↲ ╞ ┆a1┆┆e1┆ ┆a1┆! ! ! ! ! ! ! ! !↲ ! ! ! ! ! ! ! !↲ ! ! ! ! ┆a1┆! ! ! ! ┆e1┆ ┆82┆test no.↲ ! ! ! ┆a1┆! ┆e1┆ ┆82┆not used↲ ! ! ┆a1┆! ┆e1┆ ┆82┆ext. test↲ ! ┆a1┆! ┆e1┆ ┆82┆loop↲ ┆a1┆┆e1┆ ┆a1┆! ┆e1┆ ┆82┆halt↲ ╱04002d4c0a0006000000000301413100000000000000000000000000000000000000000000000000080f19232d37414b555f69737d8791ff04╱ ╱04002d4c0a0006000000000201413100000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱ ↓ ↲ ╞ halt:╞ 0: halt if error (default)↲ ╞ ╞ 1: proceed even if error↲ ↲ ╞ loop:╞ 0: sequential, big loop af all tests (default)↲ ╞ ╞ 1: looping in a selected test↲ ↲ ╞ ext. test: 0: power-up test↲ ╞ ╞ 1: extended test↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆84┆╞ The HALT and LOOP bits are initiated to zero.↲ ↲ ┆84┆╞ ┆84┆The test mode bit is set to one, if the test plug (KBL ↓ ┆19┆┆87┆┄┄721) is installed in the parallel printer connection (J3), ↓ ┆19┆┆87┆┄┄or if the 'TEST' key is pressed immediately after power-up ↓ ┆19┆┆87┆┄┄test, when the RC logo appears in the lower left corner.↲ ↲ ┆a1┆┆b0┆┆e1┆╞ ┆84┆┆a1┆WARNING! Be aware of connecting the plugs in the right ↓ ┆19┆┆87┆┆81┆┆86┆connections, or the terminal may be damaged.↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ┆06┆Figure 1: Testmode plug (KBL 721).↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆2.2╞ Keyboard Management↲ ↲ ╞ Valid keys are as follows:↲ ↲ ╞ ╞ H: set halt bit to 0↲ ╞ ╞ R: set halt bit to 1↲ ╞ ╞ G: set loop bit to 0↲ ╞ ╞ L: set loop bit to 1↲ ↲ ┆84┆╞ ┆84┆Numbers between 0-6 will insert a new test number into the ↓ ┆19┆┆87┆┄┄test number variable. ↲ ↲ ╞ All other keys will give no response.↲ ↲ ┆84┆╞ ┆84┆If one for example wants to loop in test 3 and not go into ↓ ┆19┆┆87┆┄┄a HALT state if error, then strike the keys R, L, 3 (not ↓ ┆19┆┆87┆┄┄necessarily this sequence).↲ ↲ ┆a1┆┆84┆┆a1┆┆e1┆╞ ┆84┆┆e1┆┆a1┆Note┆e1┆ that it is the last valid key, which is pressed, that ↓ ┆19┆┆87┆┄┄determines the test parameter or test number (e.g. if "L" ↓ ┆19┆┆87┆┄┄and "G" is pressed in this sequence, the loop bit is ↓ ┆19┆┆87┆┄┄reset.)↲ ↲ ┆84┆╞ ┆84┆Relationship between the test numbers and actual test is ↓ ┆19┆┆87┆┄┄as follows.↲ ↲ ┆e1┆╞ ┆a1┆┆e1┆╞ ┆a1┆test No╞ Test name↲ ↲ ╞ ╞ 0╞ RAM test↲ ╞ ╞ 1 ╞ MEMORY DATA MODIFICATION test↲ ╞ ╞ 2╞ KEYBOARD test↲ ╞ ╞ 3╞ CTC test↲ ╞ ╞ 4╞ X.21 test↲ ╞ ╞ 5╞ PARALLEL PORT test↲ ╞ ╞ 6╞ CRT test↲ ↲ ┆84┆↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆2.3╞ Output↲ ↲ ┆84┆╞ ┆84┆The test router will respond with some output. After the ↓ ┆19┆┆87┆┄┄RAM test has finished, a test menu (se fig. 2) is shown ↓ ┆19┆┆87┆┄┄for a few seconds. This test menu shows the tests with the ↓ ┆19┆┆87┆┄┄relational numbers and the possible test modes (looping, ↓ ┆19┆┆87┆┄┄halt on error etc). By pressing the 'M' key will force the ↓ ┆19┆┆87┆┄┄menu to retain on the screen. To continue press "RETURN". ↓ ┆19┆┆87┆┄┄It also responds with a status line, in which the state of ↓ ┆19┆┆87┆┄┄the test is shown. This could be either going, stopped, ↓ ┆19┆┆87┆┄┄looping or halted. Furthermore the state of the 'HALT-bit' ↓ ┆19┆┆87┆┄┄(R-SWITCH/H-SWITCH) and a passcounter is shown. ↲ ↲ ╞ RC45 DATEX testsystem version x.x↲ ↲ ╞ ╞ MENU╞ ╞ ╞ Select↲ ╞ ╞ RAM_test:╞ ╞ ╞ 0↲ ╞ ╞ Data modification_test╞ 1↲ ╞ ╞ Keyboard_test:╞ ╞ 2↲ ╞ ╞ CTC_test:╞ ╞ ╞ 3↲ ╞ ╞ X.21_test:╞ ╞ 4↲ ╞ ╞ Parallel=port_test:╞ ╞ 5↲ ╞ ╞ CRT_test:╞ ╞ ╞ 6↲ ↲ ╞ ╞ Looping in a selected test╞ L↲ ╞ ╞ Go through tests╞ ╞ G↲ ╞ ╞ Run even if error╞ ╞ R↲ ╞ ╞ Halt if error╞ ╞ H↲ ↲ ╞ Select any combination from menu and type 'RETURN':↲ ↲ ╞ ╞ Figure 2: Test menu.↲ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆3.╞ THE MEMORY TEST↲ ↲ ┆84┆╞ ┆84┆The memory test performs a test of the static RAM memory. ↓ ┆19┆┆87┆┄┄All memory cells but the upper 96 are tested by the memory ↓ ┆19┆┆87┆┄┄test. Incorporated in the memory test is a checksum of the ↓ ┆19┆┆87┆┄┄bootprom. This checksum is performed as the very first ↓ ┆19┆┆87┆┄┄test.↲ ↲ ↲ ┆a1┆3.1╞ Checksum test↲ ↲ ┆84┆╞ ┆84┆The checksum is calculated on the 16K image of the boot┄↓ ┆19┆┆87┆┄┄prom. The checksum must end up with the sum 0.↲ ↲ ┆a1┆┆e1┆╞ ┆a1┆Text from this part of the memory test:↲ ↲ ╞ ╞ <RC45 rom error>↲ ↲ ↲ ┆a1┆3.2╞ Ram test↲ ↲ ┆84┆╞ ┆84┆The memory addresses from 48 - 64 K (except for the upper ↓ ┆19┆┆87┆┄┄96 bytes) is tested.↲ ┆84┆↲ ╞ ┆84┆The test pattern for the RAM memory is three times 00 fol┄↓ ┆19┆┆87┆┄┄lowed by three times FF (Hex). When all memory cells have ↓ ┆19┆┆87┆┄┄been tested, they are again tested with the inverted pat┄↓ ┆19┆┆87┆┄┄tern. This means that all bits are tested for "zero" and ↓ ┆19┆┆87┆┄┄"one" insertion. ↲ ↲ ┆84┆┆a1┆┆e1┆╞ ┆a1┆If an error occurs, a message will be written:↲ ↲ ╞ ╞ <RC45 memory error ha la ex re>↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆84┆╞ ┆84┆where "ha" is high address, "la" is below address, "ex" is ↓ ┆19┆┆87┆┄┄expected value and "re" is received value. All numbers are ↓ ┆19┆┆87┆┄┄in hexadecimal notations. (To find any defective chip, ↓ ┆19┆┆87┆┄┄con┄sult fig. 3).↲ ↲ ╞ ┆84┆If the memory is found failurefree no message is written.↲ ↲ ┆84┆┆a1┆┆e1┆╞ ┆84┆┆a1┆If an error occurs in the memory test (rom error or ram ↓ ┆19┆┆87┆┄┆84┆error) the test will stop hard i.e. it is not possible to ↓ ┆19┆┆87┆┄┆84┆continue the testsequence.↲ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ┆06┆Figure 3: Memory lay-out↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆4.╞ MEMORY DATA MODIFICATION TEST↲ ↲ ╞ ┆84┆The static RAM data modification test is a test, which ↓ ┆19┆┆87┆┄┄verifies, that the data is not modified in time. As an ↓ ┆19┆┆87┆┄┄additional feature the test checks the battery circuit.↲ ↲ ┆84┆╞ ┆84┆The test writes a pattern in memory consisting of an XOR ↓ ┆19┆┆87┆┄┄of high and low address part. The pattern is written from ↓ ┆19┆┆87┆┄┄the memory address C000H (48K) until the hexadecimal ad┄↓ ┆19┆┆87┆┄┄dress D500H (where the display image starts).↲ ┆84┆↲ ╞ ┆84┆When the pattern has been written, the test waits for 5 ↓ ┆19┆┆87┆┄┄seconds in a waiting loop, before it performs a check of ↓ ┆19┆┆87┆┄┄the data.↲ ↲ ┆84┆┆84┆┆a1┆┆e1┆╞ ┆a1┆Possible messages are:↲ ↲ ╞ ╞ <OK>↲ ↲ ╞ ╞ <data modified in byte xx xx exp: xx rec: xx>↲ ↲ ↲ ┆a1┆4.1╞ Battery test↲ ↲ ┆84┆╞ ┆84┆When the dataconsistency is tested, the test checks 4 ↓ ┆19┆┆87┆┄┄bytes in the NVM-area. If theese 4 bytes does not match a ↓ ┆19┆┆87┆┄┄testpattern (00 FF 00 FF), the bytes will be initiated to ↓ ┆19┆┆87┆┄┄this testpattern, and the text "battery test initiated" ↓ ┆19┆┆87┆┄┄will be written. To check the battery circuit turn off and ↓ ┆19┆┆87┆┄┄on the power and restart the testsytem. When performing ↓ ┆19┆┆87┆┄┄the data modification test the second time, the text ↓ ┆19┆┆87┆┄┄"battery test initiated" must not appear. ┆a1┆Note that the ↓ ┆19┆┆87┆┄┆84┆test must be started with the testcable KBL 721 in the ↓ ┆19┆┆87┆┄┆84┆printerconnector, if this part of the test shall act ↓ ┆19┆┆87┆┄┆84┆correct.↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆5.╞ KEYBOARD TEST┆e1┆↲ ↲ ┆84┆╞ ┆84┆The keyboard contains a checksum test of the keyboard-↓ ┆19┆┆87┆┄┄PROM, a RAM test of keyboard-CPU and a scan test of the ↓ ┆19┆┆87┆┄┄keyboard- matrix. Theese three tests can be activated by ↓ ┆19┆┆87┆┄┄writing some specifically codes (keyboard-PROM test: 186, ↓ ┆19┆┆87┆┄┄keyboard-RAM test: 184 and keyboard scan test: 188) to the ↓ ┆19┆┆87┆┄┄keyboard. The keyboard will respond with OK (the same co┄↓ ┆19┆┆87┆┄┄de) or not OK (the code + 1).↲ ↲ ┆a1┆┆e1┆╞ ┆a1┆Possible messages are:↲ ↲ ╞ ╞ <OK>↲ ↲ ╞ ╞ <romerror>↲ ↲ ╞ ╞ <ramerror>↲ ↲ ╞ ╞ <scanerror>↲ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆6.╞ CTC TEST↲ ↲ ┆84┆╞ ┆84┆This program tests the counter/timer circuit, which is ↓ ┆19┆┆87┆┄┄used for baud rate generator and as interrupt circuit for ↓ ┆19┆┆87┆┄┄the CRT and the keyboard.↲ ↲ ┆84┆┆84┆╞ ┆84┆It is tested, that the circuit will generate interrupts, ↓ ┆19┆┆87┆┄┄and that the vector (interrupt address) is correct.↲ ↲ ┆84┆╞ ┆84┆The four channels 0, 1, 2, and 3 are tested. The channels ↓ ┆19┆┆87┆┄┄are tested in the timer mode, and the timing starts auto┄↓ ┆19┆┆87┆┄┄matically. The channel under test should be giving inter┄↓ ┆19┆┆87┆┄┄rupt after approx. 423 mikro s. ↲ ↲ ┆84┆╞ ┆84┆The test is based on a timeout loop, so it is checked if ↓ ┆19┆┆87┆┄┄the interrupt was received within a specified time (3oo ↓ ┆19┆┆87┆┄┄ms.). It is also checked that only the specified channel ↓ ┆19┆┆87┆┄┄interrupts.↲ ↲ ┆84┆┆a1┆┆e1┆╞ ┆a1┆Possible messages are:↲ ↲ ╞ ╞ <OK>↲ ↲ ╞ ╞ <illegal interrupt, port: xx>↲ ↲ ╞ ┆84┆meaning that another channel than the specified has ↓ ┆19┆┆87┆┄┄interrupted.↲ ↲ ╞ ╞ <no interrupt, ch:>↲ ↲ ╞ ┆84┆meaning that the test has timed out before interrupt was ↓ ┆19┆┆87┆┄┄received.↲ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆7.╞ X21 TEST↲ ↲ ┆84┆┆a1┆┆e1┆╞ ┆a1┆┆84┆This test requires, that the two clockjumpers on the ↓ ┆19┆┆87┆┄┆84┆motherboard are set to internal clock mode.↲ ↲ ╞ ┆84┆If the X21-test plug (KBL 754) is inserted in the X.21 ↓ ┆19┆┆87┆┄┄connection, the X21 test is performed.↲ ↲ ┆84┆╞ ┆84┆The X21 test is testing the data transports on SIO channel ↓ ┆19┆┆87┆┄┄A.↲ ↲ ┆84┆↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ↲ ┆06┆Figure 4: KBL 754↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆84┆┆a1┆7.1╞ SIO Channel Test↲ ↲ ┆84┆↲ ┆84┆╞ The SIO channel is initiated to 19200 bps.↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆84┆╞ ┆84┆A timer interrupt generated approx. 1800 times/s transmits ↓ ┆19┆┆87┆┄┄the data from the transmit buffer. ↲ ↲ ┆84┆╞ ┆84┆The channel transmit a databuffer of 1 k bytes consisting ↓ ┆19┆┆87┆┄┄of a counting pattern (00 FF FE FD etc.). The test loop ↓ ┆19┆┆87┆┄┄will check the received buffer, as soon as the pattern ↓ ┆19┆┆87┆┄┄have been transfered. It also monitors the channel for ↓ ┆19┆┆87┆┄┄timeout.↲ ↲ ┆a1┆┆e1┆╞ ┆a1┆Error messages from the X.21 channel test:↲ ↲ ╞ ┆84┆╞ <illegal interrupt, port: <xx>>↲ ↲ ┆84┆╞ ┆84┆An interrupt has occured from a device that was not ↓ ┆19┆┆87┆┄┄intended to interrupt, or the SIO has given a status ↓ ┆19┆┆87┆┄┄interrupt.↲ ↲ ╞ ╞ <parity error>↲ ↲ ╞ ┆84┆A special receive interrupt with parity bit has occured.↲ ↲ ╞ ╞ <data error, byte no: <xx xx> exp: <xx> rec: <xx>>↲ ↲ ╞ ┆84┆The received buffer does not contain the expected pattern.↲ ↲ ╞ ╞ <receiver overrun>↲ ↲ ↓ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆8.╞ PARALLEL PORT TEST┆e1┆↲ ↲ ┆84┆╞ ┆84┆This test is a quick test of the three output signals ↓ ┆19┆┆87┆┄┄(strobe, init and select) from the cpu to the port 19H ↓ ┆19┆┆87┆┄┄routed back to port 19H. All eight combinations are ↓ ┆19┆┆87┆┄┄tested.↲ ↲ ┆a1┆┆e1┆╞ ┆a1┆Possible message are:↲ ↲ ╞ ╞ <OK>↲ ↲ ╞ ╞ <data error exp xx rec xx>↲ ↲ ↲ ↓ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆a1┆9.╞ CRT TEST↲ ↲ ╞ This is a visual test.↲ ↲ ┆84┆╞ ┆84┆It is possibly to stop the test by pressing the "H" key. ↓ ┆19┆┆87┆┄┄To continue press the "RETURN" KEY.↲ ↲ ╞ The following should appear on the screen.↲ ↲ ╞ The character-PROM is written.↲ ↲ ┆84┆╞ ┆84┆Field attributes test. The field attributes are tested on ↓ ┆19┆┆87┆┄┄the character-PROM. The 25 lines appear as follows:↲ ↲ ╞ a: 5 lines with highlight↲ b: 4 lines with reverse video+highlight↲ c: 4 lines with reverse video↲ d: 4 lines with invisible↲ e: 4 lines with underline↲ f: 4 lines with blink↲ ↲ ┆84┆╞ ┆84┆The screen is filled with "H". To adjust the screen "H" ↓ ┆19┆┆87┆┄┄is often used.↲ ↲ ┆84┆╞ ┆84┆The contrast and brigthness are tested. First the contrast ↓ ┆19┆┆87┆┄┄and then the brigtness are tested. For both, first maxi┄↓ ┆19┆┆87┆┄┄mum, then minimum and finally normally should appear.↲ ↲ ┆84┆╞ ┆84┆If not a paperwhite monitor then the test ends up with the ↓ ┆19┆┆87┆┄┄132 character set written.↲ ┆a1┆↲ ════════════════════════════════════════════════════════════════════════ ↓ ↲ ↲ ════════════════════════════════════════════════════════════════════════ ↓ ┆1a┆┆1a┆hould be giving inter┄↓