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Types: RcTekst
Names: »99110149.WP«
└─⟦7fab0c8ae⟧ Bits:30005866/disk3.imd Dokumenter i RcTekst format (RCSL 99-1-*)
└─⟦this⟧ »99110149.WP«
╱04002d4e0a00060000000003013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
┆06┆i↲
↲
┆a1┆┆b0┆TABLE OF CONTENTS┆05┆PAGE↲
↲
1. INTRODUCTION ...................................... 1↲
1.1 The Object of the Tests ...................... 1↲
1.2 Selftest Equipment ........................... 2↲
1.3 List of Included Tests ....................... 3↲
↲
2. TESTADMINISTRATOR ................................. 6↲
2.1 Selftest Operational Modes ................... 8↲
2.2 Menu ......................................... 10 ↲
2.2.1 Printer Output ........................ 10↲
2.2.2 Parameters ............................ 11↲
2.3 Test Numbers ................................. 13↲
2.4 Output from a Test ........................... 13↲
2.5 Remote Hardware Debugging .................... 14↲
2.6 Interrupt Handling ........................... 15↲
↲
3. I/O PROCEDURES AND TABLE INDEXING ................. 17↲
3.1 Input ........................................ 17↲
3.2 Output ....................................... 17↲
3.3 Test Selection ............................... 18↲
3.4 Errornumber Decoding ......................... 19↲
↲
4. RAM MEMORY CONFIGURATION .......................... 20↲
↲
5. INITIALIZE ........................................ 22↲
5.1 Counter Timer Controler ...................... 22↲
5.2 USART 8251 ................................... 22↲
↲
6. SELFTEST SNOOPER .................................. 23↲
6.1 Press <M> .................................... 23↲
6.2 Press <N> .................................... 24↲
6.3 Press <I> .................................... 25↲
6.4 Press <0> .................................... 25↲
════════════════════════════════════════════════════════════════════════
↓
┆06┆ii↲
┆a1┆┆b0┆TABLE OF CONTENTS (continued) ┆05┆PAGE↲
↲
7. BLOCK DIAGRAM ..................................... 26 ↲
↲
8. MEMORY TEST ....................................... 27↲
8.1 PROM Checksum Test ........................... 27↲
8.2 Main Memory Test ............................. 28↲
↲
9. RAM REFRESH TEST .................................. 30↲
↲
10. KEYBOARD SELFTEST ................................. 31 ↲
↲
11. COUNTER TIMER CONTROLLER TEST ..................... 33↲
↲
12. CENTRONIC INTERFACE TEST .......................... 35 ↲
↲
13. 8251 USART TEST ................................... 37↲
13.1 USART Test in user mode ...................... 37↲
13.2 USART Test in technical mode ................. 37↲
↲
14. DISPLAY DEMO TEST ................................. 40↲
↲
↲
┆a1┆APPENDIX↲
↲
A. LIST OF ERRORNUMBERS ............................... 43↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆14┆┆b3┆┆a1┆┆b0┆┆e1┆┆06┆┆0b┆↲
┆a1┆┆b0┆1. INTRODUCTION↲
↲
RC755 is an extern console emulation module for the RC750 ↓
personal computer. It is based upon the Z80 microprocessor ↓
and the 2674 display controller.↲
↲
The RC755 is equipped with a power up selftest which is an ↓
integrated part of the emulator.↲
↲
The RC755 Selftest is both a power up test and a tool for ↓
hardware maintenance. To meet these two demands the test can ↓
be operated in two modes.↲
↲
These will in the following be referred to as user mode ↓
(power up) and technical mode.↲
↲
This manual will primarily concentrate on the technical ↓
mode.↲
↲
↲
┆b0┆┆a1┆1.1 The Object of the Tests↲
↲
It is the intention of the RC755, Selftest to cover three in ↓
the nature different needs.↲
↲
a) ┆84┆The RC755 is equipped with a power up selftest (user ↓
┆19┆┆83┆┄┄mode), consisting of a sequence of different test ↓
┆19┆┆83┆┄┄programs. These tests are organized with rising ↓
┆19┆┆83┆┄┄complexity, so that as far as possible no part of the ↓
┆19┆┆83┆┄┄hardware is used in the test, before it has been tested. ↓
┆19┆┆83┆┄┄This should ensure, when the selftest has passed, that ↓
┆19┆┆83┆┄┄the hardware of the RC755 is in a condition which enables ↓
┆19┆┆83┆┄┄the system to be started.↲
↲
┆84┆It requires no interaction from the user, when the ↓
┆19┆┆83┆┄┄hardware is in an error-free condition.↲
↲
┆8c┆┆83┆┆bc┆↓
b) ┆84┆It gives the production department the possibility of ↓
┆19┆┆83┆┄┄using the selftest in technical mode as a burn in ↓
┆19┆┆83┆┄┄facility. In the technical mode it will be possible to ↓
┆19┆┆83┆┄┄run some additional tests which is not run at power up. ↓
┆19┆┆83┆┄┄This is obtained by the fact that the selftest can be ↓
┆19┆┆83┆┄┄stimulated from a connected keyboard, or alternatively ↓
┆19┆┆83┆┄┄from a console connected to the serial line. The test ↓
┆19┆┆83┆┄┄programs in the RC755, Selftest may either be run in loop ↓
┆19┆┆83┆┄┄mode, or sequencial (including all tests).↲
↲
c) ┆84┆It gives the Technical Service department a diagnostic ↓
┆19┆┆83┆┄┄tool and a verification of the functionality of the ↓
┆19┆┆83┆┄┄hardware.↲
↲
↲
┆b0┆┆a1┆1.2 Selftest Equipment↲
↲
As the RC755, Selftest is an integrated part of the ↓
emulator,it does not require installation. When run as a ↓
power up test, it does not require any special equipment ↓
either.↲
↲
When run in technical mode, the following is required:↲
↲
KBL723: Test cable for the 8251 USART test.↲
↲
The RC755, Selftest and emulator PROM is installed in IC ↓
position 77.↲
════════════════════════════════════════════════════════════════════════
↓
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 1: Locate the Selftest and Emulator PROM.↲
↲
↲
┆b0┆┆a1┆1.3 List of Included Tests↲
↲
Besides the test programs, the RC755 Selftest includes a ↓
test administrator and a library of some simple input and ↓
output routines.↲
↲
The simple test administrator administers the mode in which ↓
a particular test is run. Different modes are determined by ↓
parameter settings. See chapter 2.↲
↲
════════════════════════════════════════════════════════════════════════
↓
The testprograms are as follows:↲
↲
PROM checksum test - ┆84┆a simple PROM checksum is ↓
┆19┆┆9c┆┄┄calculated. It is only executed ↓
┆19┆┆9c┆┄┄once after each power up ↓
┆19┆┆9c┆┄┄initialization.↲
↲
RAM memory test - ┆84┆a modulus 3 pattern test of the ↓
┆19┆┆9c┆┄┄Standard RAM.↲
↲
RAM refresh test - ┆84┆a test of the capability to ↓
┆19┆┆9c┆┄┄refresh the content of the RAM-↓
┆19┆┆9c┆┄┄memory.↲
↲
Keyboard test - ┆84┆receive and check the result ↓
┆19┆┆9c┆┄┄from the keyboard power up ↓
┆19┆┆9c┆┄┄selftest.↲
↲
Counter Timer test - ┆84┆a test of the Z80 Counter Timer ↓
┆19┆┆9c┆┄┄Controller. Testing its ↓
┆19┆┆9c┆┄┄capability of counting and ↓
┆19┆┆9c┆┄┄generating interrupt.↲
↲
Centronic Interface test - ┆84┆a test of the parallel Centronic ↓
┆19┆┆9c┆┄┄Interfaced control and data ↓
┆19┆┆9c┆┄┄signals using internal loop ↓
┆19┆┆9c┆┄┄back.↲
↲
Serial Communication test - ┆84┆a test of the 8251 status ↓
┆19┆┆9c┆┄┄signals and a data loop back ↓
┆19┆┆9c┆┄┄test.↲
↲
════════════════════════════════════════════════════════════════════════
↓
Display Demo test - ┆84┆this program will demonstrate ↓
┆19┆┆9c┆┄┄some of the facilities of the ↓
┆19┆┆9c┆┄┄2674 display controller. It ↓
┆19┆┆9c┆┄┄cannot detect any errors.↲
↲
Message from the test programs are explained along with the ↓
description of the individual programs. The message "END" is ↓
used by all test programs, and indicates that no error has ↓
been detected.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆2. TESTADMINISTRATOR↲
↲
The Partner, Satellite, Selftest is equipped with a simple ↓
test administrator, that administers the mode in which a ↓
particular test is run.↲
↲
By default the tests are run sequential and the selftest is ↓
terminated by entering the emulator. The main purpose of the ↓
test administrator is to compute the address of the next ↓
test in sequence and to generate errormessages to be written ↓
on the display (and obtional output via the 8251 ↓
communication port.↲
↲
Fig. 2 gives an overview of the Partner, Satellite, Selftest ↓
flow.↲
↲
════════════════════════════════════════════════════════════════════════
↓
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 2: Test flow.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆2.1 Selftest Operational Modes↲
↲
The Partner, Satellite, Selftest can operate in two ↓
different modes, "user mode" and "technical mode". The mode ↓
is decided by the baudrate switch on the rear of the ↓
Partner, Satellite box.↲
↲
╱04002d4e0a00060000000002013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
╱04002d4e0a00060000000003013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
↓
┆a1┆ 4 3 2 1 ┆e1┆↲
┆a1┆ ↲
┆a1┆ . . . . ┆e1┆ 600 bps/user mode↲
↲
┆a1┆ ↲
┆a1┆ . ↲
┆a1┆ . . . ┆e1┆ 1200 bps/user mode↲
↲
┆a1┆ ↲
┆a1┆ . ↲
┆a1┆ . . . ┆e1┆ 2400 bps/user mode↲
↲
┆a1┆ ↲
┆a1┆ . . ↲
┆a1┆ . . ┆e1┆ 4800 bps/user mode↲
↲
┆a1┆ ┆e1┆↲
┆a1┆ . ↲
┆a1┆ . . . ┆e1┆ 9600 bps/user mode↲
↲
┆a1┆ ↲
┆a1┆ . . ↲
┆a1┆ . . ┆e1┆ 19200 bps/user mode↲
↲
┆a1┆ ┆e1┆↲
┆a1┆ . . ↲
┆a1┆ . . ┆e1┆ 19200 bps/user mode↲
↲
┆a1┆ ↲
┆a1┆ . . . ↲
┆a1┆ . ┆e1┆ 19200 bps/user mode↲
↲
┆a1┆ ↲
┆a1┆ . . . . ↲
┆a1┆ . . . ┆e1┆ any baudrate/technical mode also incl. 8251 ↲
4 3 2 1 ┆84┆loopback and 2674 display test.↲
╱04002d4e0a00060000000003013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
╱04002d4e0a00060000000002013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
↓
↲
Figure 3: Switch Setting↲
↲
While the selftest is in progress the following will be seen ↓
on the first line of the display:↲
↲
*** PARTNER, Satellite, Test, V.1.0 ***↲
↲
┆8c┆┆83┆┆d4┆↓
The selftest consists of a set of test programs each testing ↓
its own limited part of the hardware. In user mode, for ↓
every of these test programs, an asterisk will be written on ↓
line 2 of the display. When the selftest has passed without ↓
any error, the emulator will take over the control.↲
↲
Should an error occur during the selftest, the following ↓
reaction could be observed:↲
↲
The bottom line of the display, the socalled status line, ↓
will hold the text "ERROR xxxxx" in inverted writing, where ↓
"xxxxx" is a number which identifies the error occurred.↲
↲
In conjunction to this, the loud speaker in the monitor will ↓
produce a number of sounds, which is equivalent to the above ↓
mentioned number. This means that the user has an audible ↓
feed back of the error number. the serie of sounds is ↓
devided into groups of 4.↲
↲
The sound feed back can be useful, if an error in connection ↓
with the display has occurred.↲
↲
a list of error numbers can be found in Appendix A.↲
↲
When the Partner, Satellite, Selftest is operated in ↓
technical mode, more complex output will be seen on the ↓
display informing about the state of the different test. It ↓
will run all the tests in an infinite loop and never enter ↓
the emulator.↲
↲
If an error occurs during the selftest it is possible to ↓
change from user mode to technical mode by pressing the ↓
space bottom on the keyboard. This will give you more ↓
detailed information about the error.↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆2.2 Menu↲
↲
---- MENU ----↲
<0>: proceed test↲
<1>: list of tests↲
<2>: enter snooper↲
<3>: change parameters↲
↲
SELECT FROM MENU:↲
↲
Entry <0> is used, when a return to the testing phase is ↓
wanted.↲
↲
Entry <1> will respond with a complete list of tests ↓
included in the Partner, Satellite Selftest. The list shows ↓
a significant number for each test. This number is to be ↓
used when changing the parameters. See section 2.3 for a ↓
list of included tests.↲
↲
Entry <2> will start a special hardware debugging program ↓
which enables the technician to manipulate with RAM data and ↓
input, output ports. See chapter 6 for a description of this ↓
program. ↲
╞ *** Note: ┆84┆That changing the content of RAM memory or ↓
┆19┆┆8e┆┄┄performing output to ports, may have some ↓
┆19┆┆8e┆┄┄drastic effects to the selftest.↲
↲
Entry <3> will enable the user to change the folow of the ↓
selftest (e.g. loop in a specific test). See subsection ↓
2.2.3 for a description of how to change parameters.↲
↲
When returning from one of the entries the main menu will be ↓
shown again.↲
↲
↲
┆b0┆┆a1┆2.2.1 Printer Output↲
↲
It is possible to make a hardcopy of the screen (except ↓
during the display test) by pressing the <PRINT> key on the ↓
keyboard. A RC603 Printer must be connected to the Parallel ↓
Printer Port (J1).↲
↲
↲
┆8c┆┆84┆┆84┆↓
┆b0┆┆a1┆2.2.2 Paramters↲
↲
The flow of the Partner,Satellite, Selftest is based upon ↓
the fact that each test program receives a set of parameters ↓
as input and delivers a buffer of error information as ↓
output.↲
↲
The parameters are contained in a 16 bit word variable, a ↓
socalled switch variable, which survives the memory test in ↓
a CPU register. This variable contains the information ↓
necessary for the test administrator to manage the flow of ↓
the test programs. See fig. 4 for a description of this ↓
switch variable.↲
↲
It is possible for the user to manipulate some of these ↓
parameters by using entry <3> from the menu. This will cause ↓
the questions as shown in fig. 5 to be asked. These ↓
questions must be answered one by one. The answers to the ↓
"<Y/N>" questions are "Y", "N" or carriage return ↓
(unchaged).↲
↲
The answer to the "test no.:" question is a legal test ↓
number and/or carriage return.↲
↲
┆8c┆┆82┆┆a0┆↓
┆0e┆↓
┆a1┆ name inital value comment┆05┆↲
halt_bit 1╞ 1: ┆84┆halts execution when an error ↓
┆19┆┆9d┆┄┄is detected.↲
╞ ╞ ╞ 0: ┆84┆bypasses errors.↲
loop_bit╞ 0╞ 1: ┆84┆repeats the selection of the ↓
┆19┆┆9d┆┄┄test specified.↲
╞ ╞ ╞ 0: sequential flow.↲
tech_bit╞ 0 ╞ 1: ┆84┆run test with display in tech- ↓
┆19┆┆9d┆┄┄nical mode.↲
╞ ╞ ╞ 0: ┆84┆run test with display in user ↓
┆19┆┆9d┆┄┄mode.↲
boot_bit╞ 1╞ 1: ┆84┆enter emulator when test number ↓
┆19┆┆9d┆┄┄is bigger than the number of ↓
┆19┆┆9d┆┄┄the last test in power up.↲
╞ ╞ ╞ 0: ┆84┆Stay in the selftest, and do ↓
┆19┆┆9d┆┄┄not enter emulator.↲
not_used╞ 0↲
not_used╞ 0↲
not_used 0↲
pwr_bit╞ 0╞ 1: ┆84┆Hardware has been initialized ↓
┆19┆┆9d┆┄┄once.↲
╞ ╞ ╞ 0: First run after power up.↲
not_used╞ 0↲
┆a1┆┆05┆↲
test_no╞ 00╞ Identification of test program.↲
┆a1┆┆05┆↲
↲
Figure 4: Test parameter variable.↲
┆0f┆↓
↲
↲
┆0e┆↓
SELECT FROM MENU : 3↲
> Parameters <↲
halt on error ? <Y/N>, Y/↲
loop in test ? <Y/N>, N/↲
boot after test ? <Y/N>, N/↲
test no.: 00005/4↲
↲
Figure 5: Parameter setting.↲
┆0f┆↓
↲
↲
┆8c┆┆83┆┆e0┆↓
┆b0┆┆a1┆2.3 Test Numbers↲
↲
The relationship between test numbers and actual test ↓
programs are as follows:↲
↲
SELECT FROM MENU :1↲
list of tests↲
00006=2674 Display Test↲
00005=8251 USART↲
00004=Centronic Interface↲
00003=Counter Timer Controller↲
00002=Keyboard↲
00001=RAM refresh test↲
00000=Memory Test↲
↲
The 2674 Display Test is not run in the default power up ↓
sequence. It must be requested explicit, selecting the ↓
technical mode, see fig. 3. The parameter bit "boot after ↓
test?" must be set to "N".↲
↲
A list of test numbers can be seen, using the entry <1> in ↓
the main menu.↲
↲
↲
┆b0┆┆a1┆2.4 Output from a Test↲
↲
Every test program will send some test information to an ↓
error buffer. At the end of every test program, the selftest ↓
will inform about its state, error or no error, to the user ↓
by writing on the display.↲
↲
An error message will be written in two different places ↓
with the following formats:↲
↲
In the status line an error message will have the format:↲
↲
╞ ERROR: xxxxx↲
↲
┆8c┆┆83┆┆c8┆↓
where "xxxxx" is a unique number, which identifies the error ↓
occurred.↲
↲
When the display is in technical mode, an error message will ↓
also have the following format:↲
↲
<END>↲
<test name:> , ┆82┆N↲
<error type> , <text><error data>↲
┆81┆0↲
↲
<error type> is a primary errortext informing about the ↓
specific error. <text> is of the kind "addr:", "exp:" and ↓
the like.↲
↲
↲
┆b0┆┆a1┆2.5 Remote Hardware Debugging↲
↲
The Partner, Satellite, Selftest is equipped with a facility ↓
for remote hardware debugging. This facility is implemented ↓
with the help of the 8251 Serial Input Output controller. To ↓
select remote hardware debugging set bit 4 on the baudrate ↓
switch (S1), see fig. 3.↲
┆8c┆┆82┆┆94┆↓
┆0e┆↓
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 6: Serial Test Input output.↲
┆0f┆↓
↲
If a terminal is connected to the serial port, it will also ↓
be possible to send input to the selftest likewise the input ↓
from the keyboard.↲
↲
↲
┆b0┆┆a1┆2.6 Interrupt Handling↲
↲
When the Partner, Satellite, Selftest has finished the ↓
memory test, four standard interrupt vectors is placed in ↓
the memory. These are:↲
↲
address╞ name↲
A000╞ illegal interrupt↲
A002╞ 2674 Display interrupt↲
A004╞ 8251 Receive interrupt↲
A006╞ 8251 Transmit interrupt↲
↲
┆8c┆┆83┆┆d4┆↓
If an interrupt occurs, at the level for illegal interrupt, ↓
this will produce the following errortext:↲
↲
╞ "illegal interrupt"↲
↲
The related error number is 5.↲
↲
If status bit 5 in the 2674 display controller is not set at ↓
vertical blank interrupt, this will produce the following ↓
errortext:↲
↲
╞ "CRT not ready"↲
↲
The related error number is 4.↲
↲
The interrupt handling is done by the Z80-Counter Timer ↓
Controller.↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 7: Locate the Z80 CTC.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆3. I/O PROCEDURES AND TABLE INDEXING↲
↲
Included in the Partner, Satellite, Selftest is a rather ↓
simple handling of input and output. Furthermore it uses ↓
array tables to decide, which test is to be started next and ↓
which errortext is to be written.↲
↲
↲
┆b0┆┆a1┆3.1 Input↲
↲
Input is handled in the most simple way possible. The ↓
selftest is working with a one character buffer which will ↓
receive characters from either the keyboard or alternatively ↓
from the remote hardware debugging device. See section 2.5. ↓
Characters will be received on interrupt. The character ↓
sequence <cntrl> <alt> <backspace> will force the test to ↓
hand over the control to the emulator.↲
↲
Note: That input may be delayed until a test is ended.↲
↲
↲
┆b0┆┆a1┆3.2 Output↲
↲
Character ascii values will be written in even bytes, ↓
attributes in odd bytes.↲
↲
Both the user mode picture and the technical mode picture ↓
has 24 lines of 80 characters each.↲
↲
Scrolling is performed as "hard scroll" by scrolling the ↓
content of the display buffer.↲
↲
Output as written in the technical mode can be send to the ↓
remote hardware debugging device. See section 2.5.↲
┆8c┆┆83┆┆98┆↓
┆0e┆↓
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 8: Locate the display controller.↲
┆0f┆↓
↲
↲
┆b0┆┆a1┆3.3 Test Selection↲
↲
The test number field of the test parameter switch (see fig. ↓
4) is used to select the next test to be run. This number is ↓
an index in an array, which for every test contains the ↓
offset to the introduction text and the test starting ↓
address.↲
↲
The Partner, Satellite, Selftest will always write the test ↓
introduction text before the test is started.↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆3.4 Errornumber Decoding↲
↲
At the end of every test program there is send an ↓
errornumber, and in some cases related informations, to the ↓
errorbuffer.↲
↲
This errornumber is used by the testadministrator as an ↓
index in an array, which contains the offset and ↓
chainnumbers for every errortext in the selftest.↲
↲
The chainnumber in connection with an errortext offset is ↓
used as index for writing address, received, expected and ↓
other values related to the error.↲
↲
The errornumbers are listed in Appendix A.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆4. RAM MEMORY CONFIGURATION↲
↲
The Partner, Satellite, Selftest contains a socalled Snooper ↓
facility (see chapter 6), by which it is possible to ↓
display and change the content of all CPU addressable memory ↓
cells. Therefore this manual is equipped with a layout of ↓
the RAM memory.↲
↲
╱04002d4e0a00060000000002013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
╱04002d4e0a00060000000003013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
↓
int_vector equ 0A000h ; interrupt vector table↲
╞ ╞ ╞ ;↲
╞ ╞ ╞ ;↲
╞ ╞ ╞ ;↲
V$Row_tab ╞ equ 0A020H ; display row table↲
╞ ╞ ╞ ; ----------------------↲
╞ ╞ ╞ ; ! first - low !↲
╞ ╞ ╞ ; ----------------------↲
╞ ╞ ; ! dummy !↲
╞ ╞ ╞ ; ----------------------↲
╞ ╞ ╞ ; ! first - high !↲
╞ ╞ ╞ ; ----------------------↲
╞ ╞ ╞ ; ! dummy !↲
╞ ╞ ╞ ; ----------------------↲
╞ ╞ ╞ ; ! !↲
;↲
; Data variables↲
;↲
switch╞ equ 0A084H ; administration variable↲
err_no╞ equ 0A086H ; error number of a test↲
adr_data╞ equ 0A087H ; address of an error↲
exp_data╞ equ 0A089H ; expected value↲
rec_data╞ equ 0A08AH ; received/generated value↲
↲
exp_buf╞ equ 0A08BH ; data buffer↲
rec_buf╞ equ 0A48BH ; data buffer↲
↲
key_test_result equ 0A88BH ; result from the keyboard ↲
╞ ╞ ╞ ; selftest↲
key_id╞ equ 0A88CH ; nationality code from the↲
╞ ╞ ╞ ; keyboard↲
↲
soft_count╞ equ 0A88DH ; <cntrl>,<alt>,<back_space>↲
╞ ╞ ╞ ; is soft reset↲
pass_count╞ equ 0A88EH ; counting the number of↲
╞ ╞ ╞ ; test passes since last↲
╞ ╞ ╞ ; change of parameters↲
key_char_avai╞ equ 0A890H ; character available ↲
; boolean↲
key_ascii equ 0A891H ; converted ascii code↲
key_pos╞ equ 0A892H ; key position code↲
↲
int_lev ╞ equ 0A893H ; interrupting flag↲
asc_buf ╞ equ 0A894H ; snooper ascii buffer↲
┆8c┆┆83┆┆c0┆↓
I$PRCNT╞ equ 0A89EH ; var. for printer control ↲
╞ ╞ ; port (bit 7 != bell) ↲
╞ ╞ ; initial value = 80h↲
monocr╞ equ 0A89FH ; true if a monochrome↲
╞ ╞ ; monitor connected↲
frame_count╞ equ 0A8AOH ; number of crt interrupts↲
;↲
; CRT variables/register status↲
;↲
V$DECNT╞ equ 0A8A2H ; delay counter for soft ↲
╞ ╞ ╞ ; scroll↲
I$LOGP╞ equ 0A8A3H ; new logposition to int ↲
╞ ╞ ╞ ; routine↲
V$IR00╞ equ 0A8A5H ; IR00 status↲
V$IR01╞ equ 0A8A6H ; IR01 status↲
V$IR02╞ equ 0A8A7H ; IR02 status↲
V$IR03╞ equ 0A8A8H ; IR03 status↲
V$IR04╞ equ 0A8A9H ; IR04 status↲
V$IR05╞ equ 0A8AAH ; IR05 status↲
V$IR06╞ equ 0A8ABH ; IR06 status↲
V$IR07╞ equ 0A8ACH ; IR07 status↲
V$IR08╞ equ 0A8ADH ; IR08 status↲
V$IR09╞ equ 0A8AEH ; IR09 status↲
V$IR10╞ equ 0A8AFH ; IR10 status↲
V$IR11 ╞ equ 0A8B0H ; IR11 status↲
V$IR12╞ equ 0A8B1H ; IR12 status↲
V$IR13╞ equ 0A8B2H ; IR13 status↲
V$IR14╞ equ 0A8B3H ; IR14 status↲
V$SPL1╞ equ 0A8B4H ; split register 1↲
V$SPL2╞ equ 0A8B5H ; split register 2↲
V$SCCNT╞ equ 0A8B6H ; scanline during softscroll↲
V$STLA╞ equ 0A8B7H ; statusline attribute↲
V$STLC╞ equ 0A8B8H ; statusline active column↲
╞ ╞ ╞ ; Display handling variables↲
V$MAXL╞ equ 0A8B9H ; maxline↲
E$LOGP╞ equ 0A8BBH ; logpos↲
E$CURP╞ equ 0A8BDH ; cursor position↲
E$CURX╞ equ 0A8BFH ; line no↲
E$CURY╞ equ 0A8C0H ; line pos no (CURX and CURY ↲
╞ ╞ ╞ ; must follow↲
E$CURA╞ equ 0A8C1H ; current attribute↲
;↲
;╞ Stack area↲
;↲
V$bot_stack╞ equ 0A8C2H ; STACK↲
↲
V$top_stack╞ equ 0B000H↲
;↲
;╞ Display character buffer (4K)↲
;↲
C$DSPF╞ equ 0B000H↲
C$DSPL╞ equ 0C000H ; Display buffer last +1↲
↲
;↲
;╞ End of Datastructures↲
;↲
↲
Figure 9: Selftest RAM memory layout.↲
↲
╱04002d4e0a00060000000003013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
╱04002d4e0a00060000000002013c3140000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
↓
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆5. INITIALIZE↲
↲
After power up, the Partner, Satellite, Selftest will ↓
perform some basic hardware initializations of the onboard ↓
controllers.↲
↲
The initializations are common for the Selftest and the ↓
emulator.↲
↲
↲
┆b0┆┆a1┆5.1 Counter Timer Controler↲
↲
Channel 0: ┆84┆is initialized as baudrate generator, with a ↓
┆19┆┆8b┆┄┄count value according to switch (S1) see fig. 3.↲
╞ ╞ 160 - 600 bps↲
╞ ╞ 80 - 1200 bps↲
╞ ╞ 40 - 2400 bps↲
╞ ╞ 20 - 4800 bps↲
╞ ╞ 10 - 9600 bps↲
╞ ╞ 5 - 19200 bps↲
↲
Channel 1: ┆84┆receiving display interrupts value: C7H↲
↲
Channel 2: 8251 receive interrupt value: D7H↲
↲
Channel 3: 8251 transmit interrupt value: D7H↲
↲
↲
┆b0┆┆a1┆5.2 USART 8251↲
↲
Initialized with the following values↲
↲
baudrate factor : X16↲
character length : 8 bit↲
parity : none↲
stop bits : 1↲
mode : asynchronous↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆6. SELFTEST SNOOPER↲
↲
The Partner, Satellite, Selftest is equipped with a socalled ↓
Snooper facility, which enables the user to manipulate with ↓
RAM data and input, output ports. It is enwoked by entering ↓
entry <2> in the main menu. See subsection 2.2.↲
↲
The Snooper can be entered at the termination of any of the ↓
test programs.↲
↲
When the Snooper is entered, it will respond with the ↓
following menu:↲
↲
>> Snooper↲
↲
<0>: output to port↲
<I>: input from port↲
<N>: substitute byte↲
<M>: display memory↲
<,>: continue selected↲
<X>: exit from snooper↲
↲
*** Note: ┆84┆That changing the content of RAM memory bytes or ↓
┆19┆┆8a┆┄┄performing output to devices, may have some ↓
┆19┆┆8a┆┄┄drastic effects to the Selftest.↲
↲
When entering the character "X", the Snooper will return to ↓
the testadministrator, where a new entry in the main menu ↓
can be selected.↲
↲
↲
┆b0┆┆a1┆6.1 Press <M>↲
↲
When the entry <M> has been selected, the following question ↓
concerning the address wil be asked:↲
↲
ADDR.:_ _ _ _ ↲
↲
┆8c┆┆83┆┆c8┆↓
When the address has been typed, 200 bytes will be shown on ↓
the display. The format of the output is 20 lines each with ↓
the content of 10 bytes. It is shown in both hexadecimal and ↓
in ascii.↲
↲
The following 200 bytes will be displayed, if the character ↓
"," is typed.↲
↲
A new first address may be selected by reentering the ↓
character "M".↲
↲
↲
┆b0┆┆a1┆6.2 Press <N>↲
↲
When the entry <N> has been selected, the following question ↓
concerning the address will be asked:↲
↲
ADDR.:_ _ _ _↲
↲
This question must be answered with the address of the first ↓
memory byte wanted to be changed.↲
↲
When the address has been typed, the first byte is ↓
displayed. Now there are two possibilities, either to fill ↓
in a new hexadecimal value or to type ",".↲
↲
A new value may consist of one or two digits. If one ↓
digit is input, the number will be entered by typing ↓
<return>.↲
↲
When a new value for a byte has been entered, the value of ↓
the next word is shown.↲
↲
If the character "," is entered, the memory byte displayed ↓
is left unchanged, and the next byte is displayed.↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆6.3 Press <I>↲
↲
When the entry <I> has been selected, the Snooper will ↓
respond with the question:↲
↲
PORT.:_ _↲
↲
When a port number has been entered, the byte contained in ↓
this port is shown.↲
↲
↲
┆b0┆┆a1┆6.4 Press <0>↲
↲
When the entry <0> has been selected, the Snooper will ↓
respond with the questions:↲
↲
PORT.:_ _ DATA:_ _↲
↲
When a port number has been entered, the byte to be send, ↓
must be entered.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆7. BLOCK DIAGRAM↲
↲
Fig. 10 shows a block diagram of the Partner Satellite.↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 10: Partner Satellite Block Diagram.↲
↲
Refer to the hardware manual to get more detailed ↓
information about the hardware.↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆8. MEMORY TEST↲
↲
The memory test of the Partner, Satellite, Selftest consists ↓
of two parts, a PROM checksum test, and a RAM memory test. ↓
The PROM checksum test is only run once at power up, whereas ↓
the RAM memory test may run several times, if requested.↲
↲
↲
┆b0┆┆a1┆8.1 PROM Checksum Test↲
↲
The content of the Selftest and Emulator PROM located in pos ↓
U77, see fig. 11, is summarized in a 16 bit register. The ↓
low nibble of this register must be zero after the ↓
summation. The third byte of the PROM contains the ↓
compensation value.↲
↲
If the summation is different from zero, the following error ↓
message will be written:↲
↲
╞ Memory Test: Prom checksum error, rec.:<RR>↲
↲
where <RR> is the low nibble of the 16 bit summation.↲
↲
This type of error means that the content of the program ↓
PROM is not maintained, and the PROM must be changed.↲
↲
The error number of this kind of error is 1.↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 11: Locate the Program PROM↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆8.2 Main Memory Test↲
↲
During the memory test the display is turned off. This is ↓
done because the display buffer is contained in the main ↓
memory from address B000H and upward. The RAM memory is ↓
placed in the address space from A000H and upward. The size ↓
is 8k bytes. The test starts with the lowest address first.↲
↲
The test pattern is the convinient modulus 3 pattern ↓
consisting of three times 55 followed by three times AA. The ↓
modulus of 3 will break the physical modulus 2 structure of ↓
the memory.↲
↲
When all memory bytes have been written and tested, they are ↓
tested again with the inversted pattern. This means that all ↓
bits are tested for "zero" and "one" insertion.↲
↲
If an error occurs, a message will be written as follows↲
↲
Memory test: RAM memory error, addr.: <aaaa>, exp.: <ee>, ↓
rec.: <rr>↲
↲
Where↲
╞ <aaa> is the offset address↲
╞ <ee> is the expected pattern↲
╞ <rr> is the received pattern↲
↲
The error number of this kind of error is 2.↲
↲
After termination of the memory test the Selftest will enter ↓
the testadministrator, which controls the flow of the rest ↓
of the test program.↲
════════════════════════════════════════════════════════════════════════
↓
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 12: Locate the RAM.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆9. RAM REFRESH TEST↲
↲
The RAM refresh test of the Partner, Satellite, Selftest ↓
applies to verification of the function of the memory ↓
control logic and the refresh count. The main purpose of ↓
this test is to discover modification of data during a ↓
delay, due to malfunction of the memory control logic.↲
↲
The test pattern written is a counting pattern in the memory ↓
area called "expected buffer", see the RAM memory ↓
configuration in chapter 4. The size of the test buffer is ↓
1K bytes.↲
↲
When the pattern has been written the test program enters a ↓
waiting loop for approximate 1.0 seconds, in which the CPU ↓
will not access the RAM memory. After the delay, the buffer ↓
will be checked to discover any modification.↲
↲
If any modification of data is discovered, a message as ↓
follows will be written:↲
↲
RAM refresh test: ┆84┆not refreshed, addr.: <aaaa>, exp.: <ee>, ↓
┆19┆┆92┆┄┄rec.: <rr>↲
↲
where ↲
╞ <aaaa> ┆84┆is the offset address relative to the start of ↓
┆19┆┆8b┆┄┄the test buffer.↲
╞ <ee> is the pattern written in this word.↲
╞ <rr> is the pattern read from this word.↲
↲
The error number for this kind of error is 3.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆10. KEYBOARD SELFTEST↲
↲
The keyboard test of the Partner, Satellite, Selftest is ↓
only a routine to collect the result from the keyboard power ↓
up selftest.↲
↲
The Keyboard test will receive the test result from the ↓
keyboard power up selftest, and check that the result from ↓
the test indicated, no errors found.↲
↲
Of course, it will have no meaning to loop in this test, ↓
because the power up test result is only send once at power ↓
up.↲
↲
If the keyboard is not connected, or if the memory test has ↓
been run more than once, the following text will be written:↲
↲
Keyboard: no result received.↲
↲
if an error has been detected by the keyboard selftest and ↓
send to the Partner, Satellite, Selftest, a message as ↓
follows will be written:↲
↲
Keyboard: Test result, rec.: <rr>↲
↲
Where↲
╞ <rr>: is the converted keyboard selftest errorcode.↲
↲
The first character send by the keyboard after power up is ↓
the keyboard selftest errorcode. The errornumbers send from ↓
the keyboard is numbered 255, 254, 253 or 252. These numbers ↓
will be converted by the Partner, Satellite, Selftest to the ↓
numbers 0, 1, 2, or 3.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆ RC750 no. Keyboard no. Klick Comment┆05┆↲
╞ 0╞ 255╞ 3╞ No error↲
╞ 1╞ 254 ╞ 4╞ PROM checksum error↲
╞ 2╞ 253╞ 1╞ Port 1 error↲
┆a1┆╞ 3╞ 252╞ 2╞ Port 2 error┆05┆↲
↲
Figure 13: Keyboard error codes.↲
↲
Note: ┆84┆3 "klicks" from the keyboard indicates, that it is ↓
┆19┆┆86┆┄┄powered up and has not detected any internal errors.↲
↲
The keyboard will repeat it's selftest, if the <T> key is ↓
pressed at power up. It is repeated until the key is ↓
released.↲
↲
For further information about the keyboard selftest, refer ↓
to the Technical Manual.↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 14: Locate the Keyboard Interface.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆11. COUNTER TIMER CONTROLLER TEST↲
↲
The Counter Timer Controller test of the Partner, Satellite ↓
applies to the verification of the function of this ↓
controller as a pulse generator and interrupt controller.↲
↲
This test program is split into 3 checks:↲
↲
Part 1: ┆84┆will check that display vertical-blank interrupt is ↓
┆19┆┆88┆┄┄really responded to with an interrupt. If this was ↓
┆19┆┆88┆┄┄not the case, the following error message will be ↓
┆19┆┆88┆┄┄written:↲
↲
Counter Timer Controller: missing CRT interrupt. ↲
The errornumber is 6.↲
↲
Part 2: ┆84┆will check that the channel used as a baudrate ↓
┆19┆┆88┆┄┄generator really counts, but not that it counts with ↓
┆19┆┆88┆┄┄the right rate. If the channel does not count, the ↓
┆19┆┆88┆┄┄following errormessage will be written:↲
↲
Counter Timer Controller: baudrate generator, not counting.↲
╞ The errornumber is 8.↲
↲
Part 3: ┆84┆Channel 3 of the CTC is initialized to generate ↓
┆19┆┆88┆┄┄interrupt. If the interrupt fails, the following ↓
┆19┆┆88┆┄┄error message will be written:↲
↲
Counter Timer Controller: No interrupt from CTC channel 3.↲
╞ The errornumber is 9.↲
════════════════════════════════════════════════════════════════════════
↓
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 15: Locate the Counter Timer Controller.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆12. CENTRONIC INTERFACE TEST↲
↲
The Centronic Interface Test of the Partner, Satellite, ↓
Selftest applies to the verification of the function of the ↓
internal loop back of the printer interface.↲
↲
The test program is using the internal loop back facility to ↓
test the Centronic compatible parallel printer interface. It ↓
has no need of external equipment, because the internal loop ↓
back is used to check the data patterns send. The pattern ↓
send to the data port is rolling zeroes and ones.↲
↲
The procedure of the test is first to check the function of ↓
the control signals and afterwards the data signals. The ↓
control signals are not tested in the default power up ↓
sequence.↲
↲
If an error should occur on the control signals (port 60H) a ↓
message as follows will be written:↲
↲
Centronic Interface: control signals, exp.: <ee>, rec.: <rr>↲
↲
Where↲
╞ <ee> is the pattern written into the control port.↲
╞ <rr> is the pattern read from the loop back of the port.↲
↲
The data port test will shift first ones and then zero'es ↓
through the bits of the port (40 H).↲
↲
If a bit should fail to function (internal loop back), a ↓
message as follows will be written:↲
↲
Centronic Interface: data signals, exp.: <ee>, rec.: <rr>↲
↲
Where↲
╞ <ee> is the pattern written into the control port.↲
╞ <rr> ┆84┆is the pattern read back from the loop back of the ↓
┆19┆┆89┆┄┄port↲
↲
┆8c┆┆83┆┆d4┆↓
The errornumber of control signal error is 10.↲
↲
The errornumber of data signal error is 11.↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆13. 8251 USART TEST↲
↲
The 8251 USART test of the Partner, Satellite, Selftest ↓
applies to the verification of the function of the serial ↓
connection to the Partner. The test differs in user mode and ↓
in technical mode. The data loop back test can only be run, ↓
if all bits in the baudrate switch (S1) is set (see fig. 3).↲
↲
↲
┆b0┆┆a1┆13.1 USART Test in user mode↲
↲
When the test is run in user mode at power up the only ↓
thing, that is checked, is that the DSR is set, or in other ↓
words that the Satellite is connected to the Partner.↲
↲
As long as the DSR is off, the following text will be seen ↓
in the statusline:↲
↲
╞ Host disconnected ---------19200 bps↲
↲
The rate 19200 bps could be any of the other selectable ↓
baudrates, (see fig. 3).↲
↲
↲
┆b0┆┆a1┆13.2 USART Test in technical mode↲
↲
If all bits in the baudrate switch is set (S1) this part of ↓
the test will run.↲
↲
The requirement for this test is the loop back plug called ↓
KBL723 see fig. 16. Should this cable not be installed at ↓
the start of the test, the following message will be ↓
written:↲
↲
Use testcable KBL723.↲
↲
════════════════════════════════════════════════════════════════════════
↓
╞ ┆a1┆╞ ↲
╞ DTR 1↲
╞ Txdata 2↲
╞ Rxdata 3↲
╞ RTS 4↲
╞ CTS 5↲
╞ DSR 6↲
╞ ┆a1┆╞ ↲
╞ ↲
╞ KBL723 (J2)↲
↲
First the status signals are checked.↲
↲
This is done with the following output pattern↲
↲
╞ ┆a1┆ RTS DTR ↲
╞ 0 0↲
0 1↲
1 0↲
1 1↲
↲
If an error occurs during the status signal test, the ↓
following error message will be written:↲
↲
8251 USART: Status signal error, exp.: <ee>, rec.: <rr>↲
↲
where↲
╞ <ee> ┆84┆is the expected value that should have been read ↓
┆19┆┆89┆┄┄from the port.↲
╞ <rr> ┆84┆is the actual value read from the port.↲
↲
The errornumber related to this type of error is 13.↲
↲
When the status signals has been checked, 1 k bytes is ↓
transferred from the transmitter to the receiver.↲
↲
Three kinds of error can appear in this phase of the test.↲
↲
════════════════════════════════════════════════════════════════════════
↓
If data is never send the following error message will be ↓
written:↲
↲
8251 USART: Transmission timeout↲
↲
The errornumber related to this type of error is 14.↲
↲
If the receiver never receives a data byte and generates ↓
interrupt the following error message will be written:↲
↲
╞ 8251 USART: Missing receive interrupt.↲
↲
The error number related to this error is 15.↲
↲
When a 1k byte data buffer has been transferred, the ↓
received data is checked against the data send. Should there ↓
be any difference, a message as follows will be written:↲
↲
╞ 8251 USART: ┆84┆Data error, addr.: <aaaa>, exp.: <ee>, ↓
┆19┆┆90┆┄┄rec.:<rr>.↲
↲
where↲
╞ <aaaa> ┆84┆is the address of the first errornous byte ↓
┆19┆┆8b┆┄┄relative to the start of the buffer.↲
╞ <ee> ┆84┆is the value of the data send.↲
╞ <rr> is the value of the data received.↲
↲
The errornumber of this type of error is 16.↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆14. DISPLAY DEMO TEST↲
↲
The Display Test of the Partner, Satellite, Selftest is ↓
intended for visual inspection of some of the facilities of ↓
the 2674 Display controller and the CRT logic.↲
↲
This test cannot detect any errors with the help of the CPU. ↓
It is not a part of the power up test, and must therefore be ↓
requested explicit. See subsection 2.2.2.↲
↲
The display test is split into five different phases. These ↓
are:↲
↲
1. ┆84┆Show the complete character set supplied for the Partner, ↓
┆19┆┆83┆┄┄Satellite, Selftest.↲
↲
2. ┆84┆Demonstrate the soft scrolling feature.↲
↲
3. ┆84┆Show a screen full of semigraphic squares to check the ↓
┆19┆┆83┆┄┄monitor-picture-geometri.↲
↲
4. ┆84┆Show the numbers (0-9) with different attribute values to ↓
┆19┆┆83┆┄┄test the palet logic. When shown on a monochrome monitor ↓
┆19┆┆83┆┄┄the colours will be seen as different intensities.↲
↲
5. ┆84┆Show the text "RC Partner Satellite" over the entire ↓
┆19┆┆83┆┄┄screen.↲
↲
Each of these mentioned display features are shown for ↓
approximate 4 seconds before the picture is changed to show ↓
the next feature.↲
↲
It is possible, by entering the character <1>, to hold the ↓
present picture. To continue press any other key. If <space> ↓
is pressed, the main menu will be shown at the end of the ↓
test.↲
════════════════════════════════════════════════════════════════════════
↓
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 16: Locate the Display Logic↲
↲
════════════════════════════════════════════════════════════════════════
↓
The major components in the display logic is located on fig. ↓
16. U37 is the 2674 display controller, U5 is the character ↓
PROM, and B15 is the character 9'th bit RAM.↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
↲
Figure 17: Locate the Display Palette.╞ ↓
↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆A. LIST OF ERRORNUMBERS↲
↲
┆a1┆ Error no. Description┆05┆↲
0╞ no error↲
╞ 1╞ PROM checksum error↲
╞ 2╞ RAM memory error↲
╞ 3╞ RAM refresh error↲
╞ 4╞ CRT not ready↲
╞ 5╞ illegal interrupt↲
╞ 6╞ CTC missing CRT interrupt↲
╞ 7╞ test no too big↲
╞ 8╞ CTC baudrate generator not counting↲
╞ 9╞ no interrupt from CTC channel 3↲
10╞ Centronic Interface control signal error↲
11╞ Centronic Interface data signal error↲
12╞ Host disconnected↲
13╞ 8251 status signal error↲
14╞ 8251 transmission timeout↲
15╞ 8251 missing receive interrupt↲
16╞ 8251 Data error↲
17╞ malfunction of the keyboard.↲
↲
════════════════════════════════════════════════════════════════════════
↓
↲
┆1a┆┆1a┆s using the internal loop back facil.↲
↲
════════════════════════════════════════════════════════════════════════
↓
If data is never send the fo