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Length: 2210 (0x8a2)
Types: TextFile
Names: »RELDESCR.T«
└─⟦e0c43619c⟧ Bits:30005797 CR80 Disc pack ( Vol:FNJ1 861029/EC CR80 S/W Package II+III+IV+V+VII )
└─⟦this⟧ »CSP004_V0801.D!CSS126.D!RELDESCR.T«
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R E L E A S E D E S C R I P T I O N
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Module id number: CSS/126
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Module name: Magtape-interface, MTC & DMTC
-----------------------------------
Actual release: 02.04 Release date: 860606
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Previous release: 02.03 Release date: 850403
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New facilities:
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>>V0201<< (does not concern DMTC)
INIT_MTC must be supplied with the controller's device addr in R1
in order to facilitate tape programs running the MX-AMOS operating
system which does not allow a device with current device addr (#1F).
An MX-AMOS address is a 16 bit integer with three compartments :
bit 15-12: crate no
bit 11- 6: zero
bit 5- 0: device addr
Changes:
--------
>>V0204<<
DAMOS version not carried on.
When receiving an interrupt, it is now checked whether the
operation has completed. If not, a new interrupt is awaited.
This together with the two changes in V0203 and V0202 should
form a consistent interrupt handling which can tolerate both
missing and superfluous interrupts.
MTC now sees whether it runs MX- or (X)AMOS from the value
of the context words BASE and UMAP. If the are the same,
it is assumed, that it is an MXAMOS system.
>>V0203<< (Does not concern DMTC)
When a time-out occur the TCR bit is tested :
if the MTC is busy then a fatal error occur else a warning is given.
(The PKK project is having trouble with read operations being timed out)
>>V0202<< (does not concern DMTC)
After receiving an interrupt the interrupt queue is cleared by
calling MON CLEARINTERRUPT. Thus the problem of redundant inter-
rupts in CR80 MX is solved except of cause the downgraded per-
formance.
(MX PR ???)
Errors corrected:
-----------------
Reported errors, not corrected:
-------------------------------
CPECRs implemented in current release:
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PR 86369
Comments:
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«a5»