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Types: TextFile
Names: »P4UNIT.PAS«
└─⟦02956c927⟧ Bits:30010510 DVBS1.SW2114.src.2.14-1 SW2114 REAL #1/4 TIME PASCAL SOURCE REL 2.14
└─⟦this⟧ »RTP\P4UNIT.PAS«
└─⟦4f587ad96⟧ Bits:30010518 DVBS1.SW2114.src.2.7-1 SW2114 1/4 Real Time Pascal 2.7 92.06.16
└─⟦this⟧ »RTP\P4UNIT.PAS«
└─⟦a2a9e188c⟧ Bits:30010526 DVBS1.SW2114.src.2.6-4 RTP Compiler Source SW2104+SW2114 Disk 1 92.02.03 HEJ HHA
└─⟦this⟧ »RTP\P4UNIT.PAS«
└─⟦b607d6035⟧ Bits:30010532 RTP compiler Source 1 2.14 26/9(?)-92 DVBS1.SW2114.src.2.14-8
└─⟦this⟧ »P4UNIT.PAS«
└─⟦fd2665794⟧ Bits:30010523 DVBS1.SW2114.src.2.6-1 RTP compiler source SW2104+SW2114 Disk#1 30/1-92 HHA
└─⟦this⟧ »RTP\P4UNIT.PAS«
unit p4unit;\r
interface\r
uses pscplm, mpaunit;\r
\r
VAR CurrentNiv : integer;\r
DSIsChange : boolean;\r
GlobalBlockSymbol : St_Address;\r
PointerType,DoubleType,IntegerType,WordType,BooleanType : St_Address;\r
StaOff : Word;\r
InContext : boolean;\r
CONST\r
Pass4VerNo = 500;\r
\r
\r
\r
type\r
Register = (AX, CX, DX, BX, SP, BP, SI, DI, AL, CL, DL, BL,\r
AH, CH, DH, BH, ES, CS, SS, DS, Rnil);\r
(* RNil is nil value *)\r
\r
(* The type address described an address that can be used as\r
a parametre to an instruction *)\r
Address =\r
RECORD\r
Spix : Spixrange;\r
Seg : Register; (* must be ES, DS, SS, CS *)\r
Base : Register; (* must be BX or BP *)\r
Displacement : word;\r
Index : Register; (* must be SI or DI *)\r
END;\r
\r
\r
\r
Instruction = (\r
(* Instruction for intel 186 *)\r
(* Instructions having no operands *)\r
iXLAT,\r
iCWD,\r
iCLI,\r
iSTI,\r
iCLD,\r
iINTO,\r
iREP,\r
iMOVSB,\r
iMOVSW,\r
iCMPSB,\r
iCMPSW,\r
iSTOSW,\r
iSTOSB,\r
iSCASB,\r
iNOOP2,\r
(* Instructions having no operands or *)\r
(* a constant operand *)\r
iINT,\r
iRETWS,\r
iRETIS,\r
\r
(* Instructions having a label as operand *)\r
iJE,\r
iJL,\r
iJLE,\r
iJB,\r
iJBE,\r
iJNE,\r
iJGE,\r
iJG,\r
iJAE,\r
iJA,\r
iLOOP,\r
iJCXZ,\r
\r
(* Instructions having a label as operand or\r
an address *)\r
iJMP,\r
iCALL,\r
\r
(* Instruction having a register or an address\r
as operand. The register is packed into the\r
opcode. A Segregister also allowed *)\r
iPUSH,\r
iPOP,\r
\r
(* Instructions having a register or an address\r
as operand. The register is packed into the\r
opcode *)\r
iINC,\r
iDEC,\r
\r
(* Instruction having a register or an address\r
as operand *)\r
iNEG,\r
iMUL,\r
iIMUL,\r
iDIV,\r
iIDIV,\r
iNOT,\r
iSHL,\r
iSHR,\r
iSAR,\r
iRCR,\r
\r
(* Instructions having two operands *)\r
iADD,\r
iADC,\r
iSUB,\r
iSBB,\r
iCMP,\r
iAND,\r
iTEST,\r
iOR,\r
iXOR,\r
iLEA,\r
iLDS,\r
iLES,\r
iMOV,\r
iXCHG,\r
(* pseudo i8086 Instructions *)\r
iMOD,\r
(* instruction for RC5000 *)\r
mJ,\r
mLDLP,\r
mPFIX,\r
mLDNL,\r
mLDC,\r
mLDNLP,\r
mNFIX,\r
mLDL,\r
mADC,\r
mCALL,\r
mCJ,\r
mAJW,\r
mEQC,\r
mSTL,\r
mSTNL,\r
mOPR,\r
mREV,\r
mLB,\r
mBSUB,\r
mDIFF,\r
mADD,\r
mGCALL,\r
mPROD,\r
mGT,\r
mWSUB,\r
mSUB,\r
mSETERR,\r
mCSUB0,\r
mLDPI,\r
mXDBLE,\r
mREM,\r
mRET,\r
mDIV,\r
mNOT,\r
mXOR,\r
mXWORD,\r
mSB,\r
mSHR,\r
mSHL,\r
mAND,\r
mMOVE,\r
mOR,\r
mCCNT1,\r
mMUL,\r
mCWORD,\r
(* Instruction for RC3502 *)\r
rRENPB, (* PUSHes *)\r
rRENHB,\r
rRECHW, (* CONSTANTS *)\r
rREC0,\r
rREC1,\r
rRECHWS,\r
rREAAD,\r
rRECHD,\r
rREAXD, (* ADDRESSES *)\r
rREARD,\r
rREALD,\r
rREAGD,\r
rREAID,\r
rREASD,\r
rUADHW,\r
rREVPW, (* VALUES *)\r
rREVPD,\r
rREVLB,\r
rREVLW,\r
rREVLA,\r
rREVLD,\r
rREVGB,\r
rREVGW,\r
rREVGA,\r
rREVGD,\r
rREVSB,\r
rREVSW,\r
rREVSA,\r
rREVSD,\r
rREVSF,\r
rREADB,\r
rREADW,\r
rSTNHB, (* POPS *)\r
rSTVLB,\r
rSTVLW,\r
rSTVLA,\r
rSTVLD,\r
rSTVGB,\r
rSTVGW,\r
rSTVGA,\r
rSTVGD,\r
rSTVSB,\r
rSTVSW,\r
rSTVSA,\r
rSTVSD,\r
rSTVSF,\r
rMOVEG, (* STORAGE MOVES AND COMPARES*)\r
rSTCEA,\r
rREVSM,\r
rSETRE,\r
rSETST,\r
rPCALS0, (* PROCEDURE CALLS *)\r
rPCALS1,\r
rPCALS,\r
rPEXIT,\r
rJMPHC, (* JUMPS *)\r
rJMPGA,\r
rJMPRW,\r
rJMCHT,\r
rJMZEQ,\r
rJMZNE,\r
rJMZLT,\r
rJMZGT,\r
rJMZLE,\r
rJMZGE,\r
rNEG, (* OPERATORS *)\r
rNOT,\r
rCOMPL,\r
rTNILL,\r
rADD,\r
rSUB,\r
rMUL,\r
rDIV,\r
rMOD,\r
rUADD,\r
rUSUB,\r
rUMUL,\r
rUDIV,\r
rUMOD,\r
rMADD,\r
rMSUB,\r
rMMUL,\r
rMDIV,\r
rEQ,\r
rNE,\r
rLT,\r
rGT,\r
rLE,\r
rGE,\r
rULT,\r
rAND,\r
rOR,\r
rXOR,\r
rSHC,\r
rTEQAD,\r
rSETCR, (* SET OPERATIONS *)\r
rSETAD,\r
rSETUN,\r
rSETIN,\r
rSETDI,\r
rSETEQ,\r
rSETSB,\r
rSETSP,\r
rSETTM,\r
rSETATM,\r
rCEXCH, (* REFERENCE EXCHANGE *)\r
rMHALT,\r
rCRPUT,\r
rCGREG,\r
rLLOCK, (* LOCKS *)\r
rLRESE,\r
rLRELE,\r
rRESTA, (* REGISTER ADJUST *)\r
rRESTC,\r
rSTSTC,\r
rINTRS, (* RANGE CHECK *)\r
rINTH0,\r
rINDEX, (* INDEXING *)\r
rINDH0,\r
rINDH01,\r
rINDH02,\r
rINDH1,\r
rINDH11,\r
rINDH12,\r
rINTPA,\r
rINPDV,\r
rMNOOP, (* MISCELLANEOUS *)\r
rMTRH,\r
rMTRS,\r
\r
iNil\r
); (* Instruction End *)\r
\r
\r
\r
\r
InstrucType = (b, w, vb, vw);\r
(* b: instruction on byte\r
w: instruction on word\r
vb : shift counter is in CX\r
vw : shift counter is in CX\r
*)\r
\r
\r
\r
\r
TYPE\r
\r
(* The following types describs an evalstack element *)\r
\r
\r
OperandKind = (O_Const, O_Stack, O_Addr, O_IndAddr, O_AbsAddr,\r
O_Reg, O_CAddr, O_Decode,O_Temp,O_StackOrTemp );\r
\r
OperandSort = (S_Const, S_Stack, S_Reg, S_Memery, S_Decode );\r
\r
ParType = ( P_Share, P_Normal);\r
\r
ESTelementRef = ^ESTelement;\r
\r
\r
ESTelement =\r
RECORD\r
Spix : Spixrange; (* operands name *)\r
\r
OprType : st_address; (* operands type *)\r
IndVar : Boolean;\r
(* If the operand is specified as an address IndVar\r
specifie if the operand is the address or the\r
contains of the address *)\r
Par : ParType;\r
(*\r
P_Share : Operand is an share parametre or a\r
shared variabel\r
P_Normal : Operand is not shared nor inspect *)\r
\r
BitLength : integer;\r
(* only used when the element is packed *)\r
\r
Set_Temp : Boolean; (* If true the (Set) operand is in temp. memery\r
IF RC3502 and Set_temp operand is left side\r
of assignment *)\r
\r
xForWard, BackWard : ESTelementRef;\r
(* used for implementation of the eval stack *)\r
\r
CASE Kind : OperandKind OF\r
\r
O_Const : (* the operand is a simpel constant *)\r
(Value : integer); (* the operands value *)\r
\r
O_Reg : (R : Register);\r
(* The operand is in register R *)\r
\r
O_Stack, (* The operand is pushed on the runtimestack *)\r
O_StackorTemp,\r
O_Temp : (* The operand is pushed on the runtimestack\r
and/or stored in temp area *)\r
( T_Offset : word ;\r
T_indextoSTL : word;\r
T_Address : boolean;\r
T_Allign : Boolean; (* only used for mega if stacktop\r
is an address *)\r
T_ObjectOffset : integer;);\r
\r
O_Addr : (A_Niv : integer; A_Offset : word);\r
(* The operands address is given by A_Niv,\r
A_Offset *)\r
\r
O_IndAddr : (I_Niv : integer; I_Offset, I_ObjectOffset : word;\r
AccessCheck : Boolean ; I_Allign : boolean);\r
(* The contains of the cell given by I_Niv,\r
I_Offset is an address. The operands address\r
is given by I_ObjectOffset added to the\r
address\r
When the address of this variabel is loaded\r
accesscheck is made if accesscheck is true *)\r
\r
O_AbsAddr : (* an absolut address. *)\r
(A_Seg : Register;\r
A_BPUsed : Boolean; (* use BP as base register *)\r
A_Displacement : word;\r
A_Index : Register);\r
\r
\r
O_CAddr : (C_Label : St_Address;\r
C_ObjectOffset : Word);\r
(* C_Label is a label in the\r
codesegment. The operands address is given\r
by C_ObjectOffset added to the labels\r
offset *)\r
\r
O_Decode : (FalseLab : St_Address;\r
TrueLab : St_Address;\r
Condition : Instruction;\r
(* the Condition can only bee one of\r
the following : JA, JAE, JB, JBE,\r
JE, JNE, JL, JLE, JG, JGE, INil *) );\r
\r
END; (* end ESTelement *)\r
\r
\r
\r
\r
\r
(* The register can be grouped in the following way *)\r
RegisterType = (SpecificReg, AllRegister, AddrRegister, IndexRegister,\r
ABCDRegister );\r
\r
\r
(* For every register that can be used the following\r
information is stored *)\r
RegStatus = (Free, NotFree, SourceAndNotFree, SourceAndDist,\r
NotChange);\r
\r
\r
RegisterInf =\r
RECORD\r
Status : RegStatus;\r
(* Free : The register is free\r
NotFree : The register is not free\r
SourceAndNotFree :\r
The register is used as source operand. That\r
is it must not be change before next\r
instruction but it must be allocated for dist.\r
operand.\r
SourceAndDist : Register used for sourc and for dist\r
NotChange : Is Only used when making free register.\r
When returning to normal mode the register\r
may have the same contents and status is\r
set to Source *)\r
\r
\r
ESTPointer : ESTelementRef;\r
(* If the register is used in an ESTelement, this\r
is a pointer to the element *)\r
\r
END;\r
\r
VAR\r
RegInf : Array [ AX..RNil ] OF RegisterInf;\r
(* Only information for the following register are needed\r
AX, BX, CX, DX, SI, DI, ES *)\r
\r
TYPE\r
State = (Unlinked, Linked, Internal);\r
\r
\r
\r
(**************** END TYPES REGADM *********************)\r
\r
\r
\r
\r
\r
implementation\r
end.«eof»