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Length: 10506 (0x290a)
Notes: pts_type(SC)
Names: »ARITMS.SC«
└─⟦13e5fd45a⟧ Bits:30009699 Philips computer tape "600507"
└─⟦this⟧ »TOSSWORK/ARITMS.SC«
└─⟦bc20f3abf⟧ Bits:30009670 Philips computer tape "600126"
└─⟦this⟧ »TOSSWORK/ARITMS.SC«
IDENT ARITMS REL 11.0 81-04-02 870105041100
=1,MPYMOD DESTROYED A3 WHEN MULT WITH 0
=1,REL 11.0 81-01-26
*
****************************************************
*
* PHILIPS TERMINAL SYSTEM PTS
*
* DOUBLE ADD MODULE
* DOUBLE SUBTRACT MODULE
* MULTIPLY MODULE
* DIVIDE MODULE
*
*
*
****************************************************
* THIS MODULE EXECUTES THE DOUBLE ADDITION INSTRUCTION
*
* CALLING SEQUENCE:
* CF A14,ADDMOD
*
* INPUT: A1,A2 = ARG1
* A6,A7 = ARG2
*
* OUTPUT: A1,A2 = ARG1+ARG2
* A6,A7 ARE CHANGED
*
EJECT
****************************************************
*
* THIS ROUTINE EXECUTES THE DOUBLE SUBTRACTION INSTRUCTION
*
* CALLING SEQUENCE:
* CF A14,DSUMOD
*
* INPUT: A1,A2 = ARG1
* A6,A7 = ARG2
*
* OUTPUT: A1,A2 = ARG1-ARG2
* A6,A7 ARE CHANGED
EJECT
****************************************************
*
* THIS ROUTINE EXECUTES THE MULTIPLY INSTRUCTION
* CALLING SEQUENCE:
* CF A14,MPYMOD
*
* INPUT: A6 = ARG1
* A7 = ARG2
*
* OUTPUT: A1,A2 = RESULT
*
EJECT
****************************************************
*
* THIS ROUTINE EXECUTES THE DIVIDE INSTRUCTION
*
* CALLING SEQUENCE
* CF A14,DIVMOD
*
* INPUT: A1,A2 = DIVIDENT
* A6 = DIVISOR
*
* OUTPUT: A1 = REMAINER
* A2 = QUOTIENT
*
* A6 IS CHANGED
EJECT ADDMOD
*
*
ENTRY ADDMOD,DSUMOD,MPYMOD,DIVMOD
EXTRN HALT
*
*
*****************************************
*
* CONDITIONAL ASSEMBLY
*
*****************************************
*
* A PROGRAM VERSION USING THE EXTENDED INSTRUCTION
* SET IS OBTAINED BY SETTING CPU852 EQU 0.
*
CPU852 EQU 1
*
* MULTIPLY AND DIVIDE ARE OMITTED
* BY SETTING MPYDIV=1
*
X:A EQU 0
MPYDIV EQU X:A
*
*
SETCR EQU /1200 ADK A2,0 ;SET CR WITHOUT OVERFLOW
SETCRO EQU /9A09 NGR A2,A2 ;SET CR INCLUDING OVERFLOW
*
EJECT
*
*
IFT CPU852=0
ADDMOD EQU *
ADKL A14,4 STACK POINTER
DAR A6
ABR* A14 RETURN WITH CONDITIONS SET
EJECT
*
*
DSUMOD EQU *
ADKL A14,4 STACK POINTER
DSR A6
ABR* A14 RETURN WITH CONDITIONS SET
XIF
IFT CPU852=1
ADDMOD EQU *
ANKL A7,/7FFF
ANKL A2,/7FFF
ADR A2,A7
LDK A7,0
RF(O) AOVER1
ANOVER ADR A1,A6 * NO OVERFLOW
RF(P) END1
RF(N) END2
RF(O) END3
ANOVR1 ADK A2,0
RF(Z) END0
RF END1
AOVER1 ANKL A2,/7FFF
ADK A1,1
RF(O) AOVER3
RB ANOVER
AOVER3 ADR A1,A6
RF(N) END3
ADK A1,0
RF(P) END1
RB ANOVR1
*
EJECT ADDMOD
*
*
END3 EQU * OVERFLOW
LDK A7,/80
END2 EQU * NEGATIVE
ADK A7,/80
END1 EQU * POSITIVE
ADK A7,/80
END0 EQU * ZERO
SLL A7,1
LDKL A6,/FCFF
ANS A6,2,A14 RESET CR IN CALLING PSW
ORS A7,2,A14 SET CR IN CALLING PSW
RTN A14
EJECT
*
*
DSUMOD EQU *
C1R A6,A6
C1R A7,A7
ANKL A7,/7FFF
ANKL A2,/7FFF
ADK A7,1
RF(P) DNOVR1
ADK A6,1
RF(O) DOVER4
RF DNOVER
DNOVR1 ADR A2,A7
RF(O) DOVER1
DNOVER ADR A1,A6
DNOVR2 EQU *
LDK A7,0
RB(P) END1
RB(N) END2
RB(O) END3
ADK A2,0
RB(Z) END0
RB END1
DOVER1 ANKL A2,/7FFF
ADK A1,1
RF(O) DOVER4
RB DNOVER
DOVER4 ADR A1,A6
RB(N) END3
ADK A1,0
RB DNOVR2
*
XIF
IFT MPYDIV=0
IFT CPU852=1
EJECT
MPYMOD EQU *
ST A3,2,A14 SAVE A3
ADKL A14,4 UPDATE STACK POINTER
LDK A1,0 CLEAR RESULT
LDK A2,0
LDR A3,A6
RF(Z) END000 RESULT=0 =1
RF(NN) ARG1PS ARG1 POSITIVE
NGR A6,A6
ARG1PS EQU *
XRR A3,A7 GET SIGN
ANKL A3,/8000 SIGN BIT
ORK A3,16 BIT COUNTER
ADK A7,0
RF(Z) END000 RESULT=0 =1
RF(NN) ARG2PS ARG2 POSITIVE
NGR A7,A7
ARG2PS SRC A7,1
RF(NN) MNOVR1 BIT NOT SET
ADR A1,A6
MNOVR1 EQU *
SUK A3,1
CCK A3,0
RF(Z) MNOVR2 READY
SRL A2,1 DOUBLE SHIFT RIGHT
SRC A1,1
RB(NN) ARG2PS
ORKL A2,/8000
ANKL A1,/7FFF
RB ARG2PS
*
EJECT MPYMOD
*
*
END000 EQU * =1
LDK A3,0 SET SIGN =1
MNOVR2 EQU *
LDR A6,A3 SAVE SIGN INDICATOR
LD A3,-2,A14 RESTORE REGISTER A3
NGR A1,A1
RF(O) END OVERFLOW
NGR A1,A1 RESET A1
SRL A2,1 A2 IN POSITION
ADK A6,0
RF(NN) END POSITIVE
NGR A2,A2 CHANGE RESULT TO NEGATIVE
RF(O) MNOVR4
RF(N) MNOVR4
SUK A1,1
MNOVR4 EQU *
ANKL A2,/7FFF
C1R A1,A1
END EQU *
ABR* A14
EJECT
DIVMOD EQU *
ST A3,2,A14 SAVE A3
LDK A3,16 BIT COUNTER
SLL A2,1
ADK A1,0 *SIGN OF DIVIDEND
RF(NN) DIVENP
ORKL A3,/A000 INDICATE NEGATIVE DIVIDENT
C1R A1,A1
C1R A2,A2
ADK A2,1
RF(NZ) DIVENP
ADK A1,1
RF(NP) ENDOVE OVERFLOW, A1=/8000
*
DIVENP ADK A6,0 *SIGN OF DIVISOR
RF(Z) ENDOVE OVERFLOW
RF(NN) DIVORP
XRKL A3,/C000 NEG DIVISOR,SIGN OF RESULT
NGR A6,A6
RF(O) DV8000 A6=/8000
*
EJECT DIVMOD
*
*
DIVORP EQU *
CWR A1,A6
RF(G) ENDOVE OVERFLOW
RF(NE) DVR000 LESS
ADK A3,0
RF(NN) ENDOVE RESULT POSITIVE:OVERFLOW
DVR000 EQU *
ADK A1,0
RF(N) DVR100 NEGATIVE
CWR A1,A6
RF(L) DVR200 TOO SMALL
DVR100 EQU *
SUR A1,A6 DIVIDE
ORK A2,1 RESULT
DVR200 EQU *
SUK A3,1 BIT COUNTER
CCK A3,0
RF(Z) END:00 ALL BITS DONE
SLL A1,1 DOUBLE SHIFT LEFT
ADK A2,0
RF(NN) DVR300
ORK A1,1
DVR300 EQU *
SLL A2,1
RB DVR000 NEXT
*
EJECT DIVMOD
*
*
*THIS SEQUENCE RESTORES THE SIGN OF THE RESULTS
*
DV8000 EQU *
XRR A1,A2
XRR A2,A1
XRR A1,A2
SRL A1,1
END:00 EQU * SET SIGN
ADK A3,0
RF(NN) RESPOS RESULT POSITIVE
LDKL A6,SETCR ADK A2,0
SLC A3,1
RF(N) END:10 DIVISOR NEGATIVE
END:05 EQU *
NGR A1,A1 DIVIDENT NEGATIVE
END:10 EQU *
NGR A2,A2
LD A3,2,A14 RESTORE A3
ADKL A14,4 UPDATE STACK POINTER
EXR A6 SET CR
ABR* A14
ENDOVE EQU *
LDKL A2,/8000 INDICATE OVERFLOW
RESPOS EQU * CR SET INCLUDING OVERFLOW
LDKL A6,SETCRO NGR A2,A2
SLC A3,2
RB(NN) END:10 DIVIDENT POSITIVE
RB END:05
XIF
IFT MPYDIV=0
IFT CPU852=0
EJECT
MPYMOD EQU *
ADKL A14,4 UPDATE STACK POINTER
LDR A2,A7
MUR A6
ABR* A14
EJECT
DIVMOD EQU *
ADKL A14,4 UPDATE STACK POINTER
DVR A6
ABR* A14
XIF
IFT MPYDIV=1
EJECT
MPYMOD EQU *
DIVMOD EQU *
LDK A1,/11
CF A15,HALT
XIF
*
END