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DataMuseum.dkPresents historical artifacts from the history of: Philips Data Systems |
This is an automatic "excavation" of a thematic subset of
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Length: 83698 (0x146f2)
Notes: pts_type(SC)
Names: »DRDC82.SC«
└─⟦173d42e04⟧ Bits:30009663 Philips computer tape "600105"
└─⟦this⟧ »TOSSWORK/DRDC82.SC«
IDENT DRDC82 REL 10.0 80-03-14 870105041000 =4, DC:MIN HEADER REL 10.1 80-01-08 =3,POWER UP 80-01-08 =2,WRONG LABEL 79-11-01 =1,STACK OVERFLOW,BAD INDEX,LOGG AREA PRR 10.1 MMU ADAPTATIONS REL 8.3 79-08-09 * * SOFTWARE FOR PTS 6810 CONCENTRATOR * DRDC82 HDLC MASTER DATA COM DRIVER * ******** * THIS DRIVER PERFORMS DATA COMMUNICATION * WITH TC'S CONNECTED TO THE CONCENTRATOR * VIA LEASED 4-WIRE ON PROGRAM CHANNEL * * PROTOCOL : HDLC MASTER FOR MULTIPOINT DATA LINK * ******* * STANDARD USE OF REGISTERS ******* * A1:WORK REGISTER * A2:I/O AND WORK REGISTER * A3:WORK REGISTER * A4:WORK REGISTER * A5:STACK POINTER * A6:OUTPUT DWT ADDRESS * A7:INPUT DWT ADDRESS * A8:ECB ADDRESS * ********** EJECT ********** * ENTRY POINTS * ENTRY DC82ON RECOVERY POWER ON * * INPUT VECTORS * ENTRY IH8201,IH8203 ENTRY IH8205,IH8207,IH8209,IH8211,IH8213 ENTRY IH8215,IH8217,IH8219,IH8221,IH8223 * * OUTPUT VECTORS * ENTRY IH8202,IH8204 ENTRY IH8206,IH8208,IH8210,IH8212,IH8214 ENTRY IH8216,IH8218,IH8220,IH8222,IH8224 * * ENTRY DW8202,DW8204 OUTPUT DWT'S ENTRY DW8206,DW8208,DW8210,DW8212,DW8214 ENTRY DW8216,DW8218,DW8220,DW8222,DW8224 * * ENTRY DW8201,DW8203 INPUT DWT'S ENTRY DW8205,DW8207,DW8209,DW8211,DW8213 ENTRY DW8215,DW8217,DW8219,DW8221,DW8223 EJECT * *********** * EXTERNAL REFERENCES * EXTRN TDISP DISPATCHER ENTRY EXTRN TENDIO REQUEST COMPLETION EXTRN DISEND EXTRN DISIOE REQUEST ERROR EXTRN SETIME SET TIMER CALL EXTRN SETIMP EXTRN DWTST DWT STATUS EXTRN DWTECB DWT ECB ADDRESS EXTRN DWTOR DWT ORDER EXTRN ECBBA ECB BUFFER ADDRESS EXTRN ECBRL ECB REQUESTED LENGTHH EXTRN ECBEL ECB EFFECTIVE LENGTH EXTRN ECBRC ECB RETURN CODE EXTRN ECBCW ECB CONTROL WORD EXTRN ILLINT EXTRN INTSAV EXTRN PFPOST WAIT FOR POWER UP IF SET =3 EJECT * * CONDITIONNAL ASSEMBLY * X:A EQU 12 LINE NUMBER * X:B EQU 10 POLL LIST LENGTH PLT EQU X:B * X:C EQU 1 LOGGING INTERRUPT LOGG EQU X:C * X:D EQU -6 RETRY LIMIT * * X:E EQU /22 INPUT LINE 01 * X:F EQU /4 INPUT LINE 02 * X:G EQU /5 INPUT LINE 03 * X:H EQU /6 INPUT LINE 4 * X:I EQU /7 INPUT LINE 5 * X:J EQU /20 INPUT LINE 6 * X:K EQU /21 INPUT LINE 7 * X:L EQU /23 INPUT LINE 8 * X:M EQU /24 INPUT LINE 9 * X:N EQU /25 INPUT LINE 10 * X:O EQU /26 INPUT LINE 11 * X:P EQU /27 INPUT LINE 12 * X:Q EQU 1000 MMU-BUFFER SIZE EJECT * * SYSTEM PARAMETERS * HILINO EQU X:A HIGHEST LINE NUMBER IN SYSTEM PLTLEN EQU PLT+PLT POLLIST LENGTH LINE01 EQU PLTLEN LINE02 EQU PLTLEN LINE03 EQU PLTLEN LINE04 EQU PLTLEN LINE05 EQU PLTLEN LINE06 EQU PLTLEN LINE07 EQU PLTLEN LINE08 EQU PLTLEN LINE09 EQU PLTLEN LINE10 EQU PLTLEN LINE11 EQU PLTLEN LINE12 EQU PLTLEN * TBUFL EQU X:Q MMUPAG EQU 0 * IF MMUPAG = 1 MMU-PAGING IS INCLUDED * CPU852 EQU 1 =0, EXTENDED INSTRUKTIONS * DEVIND EQU 2 BUFLEN EQU TBUFL+TBUFL BUFFER SIZE IN BYTES EJECT * * * DCUSLI EQU 4 BUFFER LIMIT TIMRE4 EQU 20 RECEIVE TIME-OUT (2 SECONDS) TIMMRY EQU 5 MODEM READY T-O TIMACT EQU 100 ACTIVITY TIMER RTYLIM EQU X:D RETRY LIMIT RTYLID EQU -3 * * CONSTANTS * BIT0 EQU /8000 BIT1 EQU /4000 BIT2 EQU /2000 BIT3 EQU /1000 BIT4 EQU /800 BIT5 EQU /400 BIT6 EQU /200 BIT7 EQU /100 BIT8 EQU /80 BIT9 EQU /40 BIT10 EQU /20 BIT11 EQU /10 BIT12 EQU /8 BIT13 EQU /4 BIT14 EQU /2 BIT15 EQU /1 NBIT11 EQU /FFEF NBIT12 EQU /FFF7 NBIT13 EQU /FFFB EJECT ****************************************************** * * APPLICATION INTERFACE : ORDERS AND RETURNCODES * ****************************************************** * * ORDERS: * * /00 - TEST * /02 - READ * /06 - WRITE * /22 - OPEN LINE * /24 - CLOSE LINE * /26 - HALT POLLING * /27 - START POLLING * /37 - OPEN TC * /38 - CLOSE TC EJECT * * RETURN CODES: * * STATUS WORD = 0 REQUEST COMPLETED AS EXPECTED * * STATUS WORD =/ 0 SEE BITS BELOW * * COMPLT EQU 0 STATUS WORD = 0 * MODNOP EQU BIT15 MODEM NOT OPERABLE NORESP EQU BIT14 NO RESPONSE TCINPL EQU BIT14 ALREADY IN POLLIST POLPER EQU BIT14 POLLING ALREADY PERMITTED INCLEN EQU BIT12 INC. LENGTH TCINAC EQU BIT11 TC INACTIVE TCBUSY EQU BIT10 TC BUSY LINSTE EQU BIT4+BIT0 LINE OPEN/CLOSE POLHLT EQU BIT4+BIT0 POLLING HALTED TCACT EQU BIT2 TC ACTIVE INVTCA EQU BIT0 INVALID TCA LSTOVF EQU BIT0 POLLIST OVERFLOW TCNLST EQU BIT0 TC NOT IN POLLIST EJECT * * DEVICE WORK AREA EQUALS * IFT MMUPAG=0 DWTDRD EQU /10 START OF DRIVER DEFINED PART OF DWT XIF * IFF MMUPAG=0 DWTDRD EQU /14 START OF DRIVER DEFINED PART OF DWT XIF * DWTTP EQU DWTDRD+/00 DWTATP EQU DWTDRD+/02 STB EQU DWTDRD+/0E DWTSAV EQU DWTDRD+/10 USBUF EQU DWTDRD+/1C DCBUCU EQU DWTDRD+/20 PACT EQU DWTDRD+/1C PINACT EQU DWTDRD+/1E SENDF EQU DWTDRD+/20 LNR EQU DWTDRD+/22 CPS EQU DWTDRD+/24 VSS EQU DWTDRD+/26 VRS EQU DWTDRD+/28 DWTRTY EQU DWTDRD+/2A PLIST EQU DWTDRD+/2C EJECT * * INSTRUCTIONS EQUALS * CIOST EQU /42C0 CIO START CIOH EQU /4280 CIO HALT SST EQU /4AC0 SST OTR EQU /4200 * MSKMOD EQU /1 CARRIER + MODEM SSTTHR EQU 2 THROUGPUT SSTMSK EQU /F09F SIGNIFICANT BITS * * CIO START IN COMMAND * CICMO EQU 2 CONNECT MODEM CIDISC EQU /1 DISCONNECT MODEM CIREPC EQU 5 RECEIVE ON PROGRAM CHANNEL CIIDLE EQU 4 SEND IDLE 1 * * CIO START OUT COMMAND * CIT4WP EQU 2 TRANSMIT 4-WIRE ON PC EJECT * * CHLC DEVICE ADDRESS EQUATES * DAMI01 EQU X:E INPUT DAMI02 EQU X:F DAMI03 EQU X:G DAMI04 EQU X:H DAMI05 EQU X:I DAMI06 EQU X:J DAMI07 EQU X:K DAMI08 EQU X:L DAMI09 EQU X:M DAMI10 EQU X:N DAMI11 EQU X:O DAMI12 EQU X:P * DAMU01 EQU DAMI01+/10 OUTPUT DAMU02 EQU DAMI02+/10 DAMU03 EQU DAMI03+/10 DAMU04 EQU DAMI04+/10 DAMU05 EQU DAMI05+/10 DAMU06 EQU DAMI06+/10 DAMU07 EQU DAMI07+/10 DAMU08 EQU DAMI08+/10 DAMU09 EQU DAMI09+/10 DAMU10 EQU DAMI10+/10 DAMU11 EQU DAMI11+/10 DAMU12 EQU DAMI12+/10 EJECT * * CONDITIONAL ASSEMBLY PARAMETERS * IFF LINE01=0 MLIN01 EQU 1 AT LEAST 1 LINE IFF HILINO=1 MLIN02 EQU 1 AT LEAST 2 LINES IFF HILINO=2 MLIN03 EQU 1 AT LEAST 3 LINES IFF HILINO=3 MLIN04 EQU 1 AT LEAST 4 LINES IFF HILINO=4 MLIN05 EQU 1 AT LEAST 5LINES IFF HILINO=5 MLIN06 EQU 1 AT LEAST 6 LINES IFF HILINO=6 MLIN07 EQU 1 AT LEAST 7 LINES IFF HILINO=7 MLIN08 EQU 1 AT LEAST 8 LINES IFF HILINO=8 MLIN09 EQU 1 AT LEAST 9 LINES IFF HILINO=9 MLIN10 EQU 1 AT LEAST 10 LINES IFF HILINO=10 MLIN11 EQU 1 AT LEAST 11 LINES IFF HILINO=11 MLIN12 EQU 1 12 LINES XIF IFF HILINO=12 MLIN12 EQU 0 LESS THAN 12 IFF HILINO=11 MLIN11 EQU 0 LESS THAN 11 IFF HILINO=10 MLIN10 EQU 0 LESS THAN 10 IFF HILINO=9 MLIN09 EQU 0 LESS THAN 09 IFF HILINO=8 MLIN08 EQU 0 LESS THAN 8 IFF HILINO=7 MLIN07 EQU 9 LESS THAN 7 IFF HILINO=6 MLIN06 EQU 0 LESS THAN 6 IFF HILINO=5 MLIN05 EQU 0 LESS THAN 5 IFF HILINO=4 MLIN04 EQU 0 LESS THAN 4 IFF HILINO=3 MLIN03 EQU 0 LESS THAN 3 IFF HILINO=2 MLIN02 EQU 0 LESS THAN 2 XIF IFT LINE01=0 MLIN01 EQU 0 XIF EJECT * * HDLC MASTER CONFIGURATION TABLE * DWMTAB DATA DWMTE-* TABLE LENGTH DATA DW8201 DWT INPUT ON LINE 1 DATA DW8202 DWT FOR OUTPUT AND CONTROL ON LINE 1 IFF HILINO=1 DATA DW8204,DW8203 IFF HILINO=2 DATA DW8206,DW8205 IFF HILINO=3 DATA DW8208,DW8207 IFF HILINO=4 DATA DW8210,DW8209 IFF HILINO=5 DATA DW8212,DW8211 IFF HILINO=6 DATA DW8214,DW8213 IFF HILINO=7 DATA DW8216,DW8215 IFF HILINO=8 DATA DW8218,DW8217 IFF HILINO=9 DATA DW8220,DW8219 IFF HILINO=10 DATA DW8222,DW8221 IFF HILINO=11 DATA DW8224,DW8223 XIF DWMTE EQU * EJECT * * LINE CONTROL INPUT CONTROL FIELD MASK * REMI EQU 1 I-FRAME REMRR EQU /F MRR EQU /1 RR FRAME MRNR EQU /5 RNR FRAME MROL EQU /1F ROL FRAME MSKFF EQU /FF U/S MASK RECMDR EQU /97 CMDR FRAME REUA EQU /73 UA FRAME * * LINE CONTROL OUTPUT CONTROL FIELD MASK * TRRP EQU /11 RR+POLL TSNRM EQU /93 SNRM FRAME TDISC EQU /53 DISC FRAME TRNRP EQU /15 RNR+POLL TRRNP EQU /1 RR WITHOUT POLL EJECT * * DWT STATUS WORD CONTENTS * ****************** * * DWTST : * BIT 11 =1 WRONG N(S) * BIT 12 =1 WRONG N(R) * BIT 13 =1 RNR RECEIVED * BIT 14 =0 POLLING PERMITTED * BIT 14 =1 HALT POLLING INITIATED * BIT 15 =0 LINE CLOSED * BIT 15 =1 LINE OPENED * ****************** * CHLC RECEIVER STATUS ****************** * * STATUS :/00 MODEM READY,CARRIER DETECTED * :/01 MODEM NOT READY * :/02 THROUGPUT ERROR * :/20 CARRIER NOT DETECTED * :/3000 IDLE ONE,ABORT DETECTED * ******************* * EJECT * * DEVICE WORK TABLE * IFF LINE01=0 * * DWT FOR LINE 01,OUTPUT AND CONTROL * DW8202 EQU * TABLE ENTRY DATA DAMU01 DEVICE ADDRESS DATA /8000 STATUS,DEVICE READY DATA 0 ECB ADDRESS DATA 0 ORDER DATA DRMUAD POINTER TO ADDRESS BLOCK DATA 0 TTAB ADDRESS DATA 0 W/A INDICATOR DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 ADDRESS OF USER ECB DATA MECB02 ADDRESS OF DRIVER ECB XIF IFT MLIN01=1 DATA 0 TIMER POINTER DATA 0 ACTIVITY TIMER DATA 0,0,0,0,0,0 STACK BASE RES 3 SAVE REGISTER 3-5 DATA DW8202 OUTPUT DWT DATA DW8201 INPUT DWT DATA 0 A8 DATA 0 PACT DATA 0 PINACT DATA 0 SENDF DATA 0 LNR DATA 0 CPS DATA 0 VSS DATA 0 VRS DATA 0 RETRY * * POLLIST * DATA LINE01+LINE01 LENGTH RES LINE01 DATA /FFFF,/FFFF END OF POLLIST IFT MMUPAG=1 MECB02 DATA 0,DCBF02,0,0,0,0 DRIVER ECB DCBF02 RES TBUFL+1 OUTPUT MMU-BUFFER XIF IFT MLIN01=1 EJECT * * DEVICE WORK TABLE * DWT FOR LINE 01 INPUT * DW8201 EQU * TABLE ENTRY DATA DAMI01 DEVICE ADDRESS DATA /8000 STATUS DATA 0 ECB ADDRESS DATA 0 ORDER DATA DRMIAD POINTER TO ADDRESS BLOCK DATA 0 TTAB ADDRESS DATA 0 W/A INDICATOR DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 ADDRESS OF USER ECB DATA MECB01 DRIVER ECB XIF IFF LINE01=0 DATA 0 TIMER DATA 0 ACTIVITY TIMER DATA 0,0,0,0,0,0 STACK BASE RES 3 SAVE REGISTER 3-5 DATA DW8202 OUTPUT DWT ADDRESS DATA DW8201 INPUT DWT DATA 0 A8 DATA 0,0 USER BUFFER DEFAULT DATA 0 ATTEMTED LENGHT IFT MMUPAG=1 MECB01 DATA 0,DCBF01,0,0,0,0 DRIVER ECB DCBF01 RES TBUFL+1 INPUT MMU BUFFER XIF IFT MLIN02=1 EJECT * * DEVICE WORK TABLE * DWT FOR LINE 02,OUTPUT AND CONTROL * DW8204 EQU * TABLE ENTRY DATA DAMU02 DEVICE ADDRESS DATA /8000 STATUS DATA 0 ECB DATA 0 ORDER DATA DRMUAD POINTER TO ADDRESS BLOCK DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 ADDRESS OF USER ECB DATA MECB04 DRIVER ECB XIF IFT MLIN02=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 STACK BASE RES 3 SAVE REG 3-5 DATA DW8204 OUTPUT DWT DATA DW8203 INPUT DWT DATA 0 A8 DATA 0 PACT DATA 0 PINACT DATA 0 SENDF DATA 0 LNR DATA 0 CPS DATA 0 VSS DATA 0 VRS DATA 0 RETRY * * POLLIST * DATA LINE02+LINE02 LENGHT RES LINE02 DATA /FFFF,/FFFF END OF POLLIST IFT MMUPAG=1 MECB04 DATA 0,DCBF04,0,0,0,0 DRIVER ECB DCBF04 RES TBUFL+1 OUTPUT MMU BUFFER XIF IFT MLIN02=1 EJECT * * DEVICE WORK TABLE * * DWT FOR LINE 02 INPUT * DW8203 EQU * TABLE ENTRY DATA DAMI02 DATA /8000 STATUS DATA 0 ECB DATA 0 ORDER DATA DRMIAD POINTER ADDRESS BLOCK DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 ADDRESS OF USER ECB DATA MECB03 DRIVER ECB XIF IFT MLIN02=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 STACK BASE RES 3 SAVE REGISTERS 3-5 DATA DW8204 OUTPUT DWT DATA DW8203 INPUT DWT DATA 0 A8 DATA 0,0 USER BUFFER DEFAULT DATA 0 ATTEMPTED LENGTH IFT MMUPAG=1 MECB03 DATA 0,DCBF03,0,0,0,0 DRIVER ECB DCBF03 RES TBUFL+1 INPUT MMUBUFFER XIF IFT MLIN03=1 EJECT * * DWT FOR LINE 03 OUTPUT AND CONTROL * DW8206 EQU * DATA DAMU03 DATA /8000 DATA 0 DATA 0 DATA DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB06 XIF IFT MLIN03=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8206 DATA DW8205 DATA 0,0,0,0,0 DATA 0,0,0,0 DATA LINE03+LINE03 RES LINE03 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB06 DATA 0,DCBF06,0,0,0,0 DRIVER ECB DCBF06 RES TBUFL+1 OUTPUT MMU BUFFER XIF IFT MLIN03=1 EJECT * * DWT FOR LINE 03 INPUT * DW8205 EQU * DATA DAMI03 DATA /8000 DATA 0,0 DATA DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB05 DRIVER ECB XIF IFT MLIN03=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8206 DATA DW8205 DATA 0,0,0,0 EJECT IFT MMUPAG=1 MECB05 DATA 0,DCBF05,0,0,0,0 DRIVER ECB DCBF05 RES TBUFL+1 XIF IFT MLIN04=1 EJECT * * DWT FOR LINE 04,OUTPUT AND CONTROL * DW8208 EQU * DATA DAMU04,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 ADDRESS OF USER ECB DATA MECB08 DRIVER ECB XIF IFT MLIN04=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8208,DW8207 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE04+LINE04 RES LINE04 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB08 DATA 0,DCBF08,0,0,0,0 DRIVER ECB DCBF08 RES TBUFL+1 OUTPUT MMU BUFFER XIF IFT MLIN04=1 EJECT * * DWT FOR LINE 04,INPUT * DW8207 EQU * DATA DAMI04,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER BUFFER DATA MECB07 DRIVER ECB XIF IFT MLIN04=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8208,DW8207 DATA 0,0,0,0 MECB07 DATA 0,DCBF07,0,0,0,0 DRIVER ECB DCBF07 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN05=1 EJECT * * DWT FOR LINE 05,OUTPUT AND CONTROL * DW8210 EQU * DATA DAMU05,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB10 DRIVER ECB XIF IFT MLIN05=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8210,DW8209 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE05+LINE05 RES LINE05 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB10 DATA 0,DCBF10,0,0,0,0 DRIVER ECB DCBF10 RES TBUFL+1 MMUBUFFER OUTPUT XIF IFT MLIN05=1 EJECT * * DWT FOR LINE 05,INPUT * DW8209 EQU * DATA DAMI05,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB09 DRIVER ECB XIF IFT MLIN05=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8210,DW8209 DATA 0,0,0,0 IFT MMUPAG=1 MECB09 DATA 0,DCBF09,0,0,0,0 DRIVER ECB DCBF09 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN06=1 EJECT * * DWT FOR LINE 06,OUTPUT AND CONTROL * DW8212 EQU * DATA DAMU06,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB12 DRIVER ECB XIF IFT MLIN06=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8212,DW8211 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE06+LINE06 RES LINE06 DATA /FFFF,/FFFF MECB12 DATA 00,DCBF12,0,0,0,0 DRIVER ECB DCBF12 RES TBUFL+1 XIF IFT MLIN06=1 EJECT * * DWT FOR LINE06,INPUT * DW8211 EQU * DATA DAMI06,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB11 DRIVER ECB XIF IFT MLIN06=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8212,DW8211 DATA 0,0,0,0 IFT MMUPAG=1 MECB11 DATA 0,DCBF11,0,0,0,0 DRIVER ECB DCBF11 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN07=1 EJECT * * DWT FOR LINE 07,OUTPUT AND CONTROL * DW8214 EQU * DATA DAMU07,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USERECB DATA MECB14 DRIVER ECB XIF IFT MLIN07=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8214,DW8213 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE07+LINE07 RES LINE07 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB14 DATA 0,DCBF14,0,0,0,0 DRIVER ECB DCBF14 RES TBUFL+1 XIF IFT MLIN07=1 EJECT * * DWT FOR LINE 07,INPUT * DW8213 EQU * DATA DAMI07,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB13 DRIVER ECB XIF IFT MLIN07=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8214,DW8213 DATA 0,0,0,0 IFT MMUPAG=1 MECB13 DATA 0,DCBF13,0,0,0,0 DRIVER ECB DCBF13 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN08=1 EJECT * * DWT FOR LINE 08,OUTPUT AND CONTROL * DW8216 EQU * DATA DAMU08,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB16 DRIVER ECB XIF IFT MLIN08=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8216,DW8215 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE08+LINE08 RES LINE08 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB16 DATA 0,DCBF16,0,0,0,0 DRIVER ECB DCBF16 RES TBUFL+1 MMU OUTPUT BUFFER XIF IFT MLIN08=1 EJECT * * DWT FOR LINE 08,INPUT * DW8215 EQU * DATA DAMI08,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB15 DRIVER ECB XIF IFT MLIN08=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8216,DW8215 DATA 0,0,0,0 IFT MMUPAG=1 MECB15 DATA 0,DCBF15,0,0,0,0 DRIVER ECB DCBF15 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN09=1 EJECT * * DWT FOR LINE 09,OUTPUT AND CONTROL * DW8218 EQU * DATA DAMU09,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB18 DRIVER ECB XIF IFT MLIN09=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8218,DW8217 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE09+LINE09 RES LINE09 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB18 DATA 0,DCBF18,0,0,0,0 DRIVER ECB DCBF18 RES TBUFL+1 MMUBUFFER OUTPUT XIF IFT MLIN09=1 EJECT * * DWT FOR LINE09,INPUT * DW8217 EQU * DATA DAMI09,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB17 DRIVER ECB XIF IFT MLIN09=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8218,DW8217 DATA 0,0,0,0 IFT MMUPAG=1 MECB17 DATA 0,DCBF17,0,0,0,0 DRIVER ECB DCBF17 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN10=1 EJECT * * DWT FOR LINE 10,OUTPUT AND CONTROL * DW8220 EQU * DATA DAMU10,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB20 DRIVER ECB XIF IFT MLIN10=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8220,DW8219 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE10+LINE10 RES LINE10 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB20 DATA 0,DCBF20,0,0,0,0 DRIVER ECB DCBF20 RES TBUFL+1 MMUBUFFER OUTPUT XIF IFT MLIN10=1 EJECT * * DWT FOR LINE 10,INPUT * DW8219 EQU * DATA DAMI10,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB19 DRIVER ECB XIF IFT MLIN10=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8220,DW8219 DATA 0,0,0,0 IFT MMUPAG=1 MECB19 DATA 0,DCBF19,0,0,0,0 DRIVER ECB DCBF19 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN11=1 EJECT * * DWT FOR LINE 11,OUTPUT AND CONTROL * DW8222 EQU * DATA DAMU11,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB22 DRIVER ECB XIF IFT MLIN11=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8222,DW8221 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE11+LINE11 RES LINE11 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB22 DATA 0,DCBF22,0,0,0,0 DRIVER ECB DCBF22 RES TBUFL+1 MMUBUFFER OUTPUT XIF IFT MLIN11=1 EJECT * * DWT FOR LINE 11,INPUT * DW8221 EQU * DATA DAMI11,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB21 DRIVER ECB XIF IFT MLIN11=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8222,DW8221 DATA 0,0,0,0 IFT MMUPAG=1 MECB21 DATA 0,DCBF21,0,0,0,0 DRIVER ECB DCBF21 RES TBUFL+1 MMU BUFFER INPUT XIF IFT MLIN12=1 EJECT * * DWT FOR LINE 12,OUTPUT AND CONTROL * DW8224 EQU * DATA DAMU12,/8000,0,0,DRMUAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB24 DRIVER ECB XIF IFT MLIN12=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8224,DW8223 DATA 0,0,0,0 DATA 0,0,0,0,0 DATA LINE12+LINE12 RES LINE12 DATA /FFFF,/FFFF IFT MMUPAG=1 MECB24 DATA 0,DCBF24,0,0,0,0 DRIVER ECB DCBF24 RES TBUFL+1 MMU BUFFER OUTPUT XIF IFT MLIN12=1 EJECT * * DWT FOR LINE 12,INPUT * DW8223 EQU * DATA DAMI12,/8000,0,0,DRMIAD DATA 0 TTAB DATA 0 W/A DATA 0 TASK QUEUE IFT MMUPAG=1 DATA 0 USER ECB DATA MECB23 DRIVER ECB XIF IFT MLIN12=1 DATA 0 TIMER POINTER DATA 0 ACT TIMER DATA 0,0,0,0,0,0 RES 3 DATA DW8224,DW8223 DATA 0,0,0,0 IFT MMUPAG=1 MECB23 DATA 0,DCBF23,0,0,0,0 DRIVER ECB DCBF23 RES TBUFL+1 MMU BUFFER INPUT XIF XIF IFF HILINO=12 EJECT * * DUMMY ENTRIES * DW8223 EQU * DW8224 EQU * IH8223 EQU * IH8224 EQU * IFF HILINO=11 DW8221 EQU * DW8222 EQU * IH8221 EQU * IH8222 EQU * IFF HILINO=10 DW8219 EQU * DW8220 EQU * IH8219 EQU * IH8220 EQU * IFF HILINO=9 DW8217 EQU * DW8218 EQU * IH8217 EQU * IH8218 EQU * IFF HILINO=8 DW8215 EQU * DW8216 EQU * IH8215 EQU * IH8216 EQU * IFF HILINO=7 DW8213 EQU * DW8214 EQU * IH8213 EQU * IH8214 EQU * IFF HILINO=6 DW8211 EQU * DW8212 EQU * IH8211 EQU * IH8212 EQU * IFF HILINO=5 DW8209 EQU * DW8210 EQU * IH8209 EQU * IH8210 EQU * IFF HILINO=4 DW8207 EQU * DW8208 EQU * IH8207 EQU * IH8208 EQU * IFF HILINO=3 DW8205 EQU * DW8206 EQU * IH8205 EQU * IH8206 EQU * IFF HILINO=2 DW8203 EQU * DW8204 EQU * IH8203 EQU * IH8204 EQU * ST P,INTSAV ABL ILLINT XIF EJECT * * ACTIVATION PART: * INPUT REQUESTS * * * ACTIVATION BLOCK * DATA BUFLEN DATA DEVIND DRMIAD DATA MIACT DWT REFERENCE * DATA ABORT ADDRESS OF ABORT ROUTINE DATA 0,0 DC:MIN HEADER =4 MIACT EQU * SUK A7,2 RF(Z) RD ORDER 01:READ MIA100 ABL DISIOE ILLEGAL ORDER * * ORDER 02 READ * RD EQU * IFT MMUPAG=1 LD A2,ECBRL,A8 REQUESTED LENGTH CWK A2,BUFLEN SIZE OK? ABL(G) IL:LEN ILLEGAL LENGTH XIF LD A1,DWTST,A6 GET STATUS LDR A2,A1 ANK A1,1 RF(NZ) RD300 LINE OPENED RD100 EQU * LDKL A1,LINSTE RC:WRONG STATUS LINE RD200 CF A15,TENDIO COMPLETE REQUEST RD300 EQU * ABL TDISP GO TO DISPATCHER EJECT * * ACTIVATION PART: * OUTPUT AND CONTROL REQUESTS * * * ACTIVATION BLOCK * DATA BUFLEN DATA DEVIND DRMUAD DATA MUACT DWT REFERENCE DATA ABORT ABORT ROUTINE DATA 0,0 DC:MIN HEADER =4 * MUACT EQU * LDR A7,A7 RF(Z) TEST ORDER 00,TEST LINE SUK A7,6 ABL(Z) WRT ORDER 06,WRITE SUK A7,/22-6 RF(Z) OLIN ORDER 22,OPEN LINE SUK A7,2 ABL(Z) CLIN ORDER 24,CLOSE LINE SUK A7,2 ABL(Z) CLIN ORDER 26 HALT POLLING SUK A7,1 ABL(Z) CLIN ORDER 27,START POLLING SUK A7,/37-/27 ABL(Z) OTC ORDER 37,OPEN TC SUK A7,1 ABL(Z) WRT150 ORDER 38 CLOSE TC RB MIA100 ILLEGAL ORDER EJECT * * ORDER 00:TEST LINE * TEST EQU * LD A1,DWTST,A6 GET STATUS ANK A1,1 RB(NZ) RD100 LINE NOT CLOSED ABL TST000 EJECT * * OPEN LINE * OLIN EQU * LD A1,DWTST,A6 GET STATUS ANK A1,1 RB(NZ) RD100 LINE ALREADY OPENED LD A1,PLIST,A6 GET LENGTH OF POLLIST LDR A2,A1 ADR A1,A6 OLI100 EQU * CM PLIST,A1 DELETE POLLIST SUK A1,2 SUK A2,2 RB(NZ) OLI100 NOT END OF POLLIST CM PACT,A6 CM PINACT,A6 LD A7,DWTSAV+8,A6 OLI105 EQU * CF A5,HALTIN LDK A2,CIDISC CF A5,STHCIN DISCONNECT MODEM LDK A2,CICMO CF A5,STHCIN CONNECT MODEM RF(NN) OLI160 MODEM NOT OPERABLE LDK A1,1 ORS A1,DWTST,A6 INDICATE LINE OPENED ORS A1,DWTST,A7 LD A1,DWTATP,A6 RF(NZ) OLI120 RECOVERY POWER ON LDK A1,0 CF A15,TENDIO COMPLETE REQUEST OLI120 EQU * LDR A1,A6 LDR A4,A6 ADK A4,DWTATP LDR* A2,A4 ABL(NZ) BMM RECOVERY POWER ON CF A15,SETIMP SET ACTIVITY TIMER DATA OLI159,TIMACT ABL BMM ENTER BASIS RECEIVE MODE * * ACTIVITY TIME-OUT * OLI159 EQU * =1 LDR A6,A1 OLI160 EQU * MODEM FAULT ENTRY =2 LD A7,DWTSAV+8,A6 LD A2,DWTATP,A6 ABL(Z) OLI161 CM* DWTATP,A6 CLEAR TIMER CM DWTATP,A6 CLEAR TIMER POINTER EJECT * * SET ALL TC'S INACTIVE * OLI161 EQU * LD A4,PLIST,A6 LDKL A3,/8000 LDR A2,A6 ADR A2,A4 OLI162 EQU * ORS A3,PLIST,A2 SUK A2,4 SUK A4,4 RB(P) OLI162 LDK A5,STB ADR A5,A6 RELOAD STACK BAS CF A5,HALTIN LDK A1,0 DECLARE LINE CLOSED =1 SC A1,DWTST+1,A6 SC A1,DWTST+1,A7 LDK A2,CIDISC CF A5,STHCIN DISCONNECT MODEM LDK A1,MODNOP RC:MODEM NOT OPERATIONAL LD A8,DWTECB,A6 RF(Z) OLI165 CM ECBRC,A8 CF A15,TENDIO OLI165 EQU * LDR A6,A7 LD A8,DWTECB,A6 RF(Z) OLI170 CM ECBRC,A8 OLI170 EQU * ABL DISEND EJECT * * CLOSE LINE,HALT AND START POLLING * CLIN EQU * LD A1,DWTST,A6 GET STATUS ANK A1,1 ABL(Z) RD100 LINE ALREADY CLOSED ABL TDISP EJECT * * ORDER 37:OPEN TC * OTC EQU * LD A7,DWTSAV+8,A6 LD A1,DWTST,A7 LDR A2,A1 ANK A1,1 ABL(Z) RD100 SEQ ERROR LD A2,ECBCW,A8 GET TCA SUK A2,/41 RF(N) OTC100 INVALID TC ADDRESS SUK A2,/5A-/41 ABL(NP) TDISP OTC100 EQU * LDKL A1,INVTCA RC:INVALID ADDRESS RB OLI170 EJECT * * ORDER 06 WRITE * WRT EQU * IFT MMUPAG=1 LD A2,ECBRL,A8 REQUESTED LENGTH? CWK A2,BUFLEN GREATER THAN MMU BUFFER LENGTH RF(G) IL:LEN ILLEGAL LENGTH XIF LC* A2,ECBBA,A8 TCA WRT105 EQU * LD A1,DWTST,A6 STATUS ANK A1,1 ABL(Z) RD100 SEQ ERROR ANK A2,/7F CF A15,FINDTC SEARCH TCA IN POLLIST RF(P) WRT130 TC NOT IN POLLIST RF(N) WRT110 TCA INACTIVE SC A4,DWTOR,A6 SAVE INDEX IN POLLIST WRT107 EQU * ABL TDISP WRT110 EQU * SC A4,DWTOR,A6 SAVE INDEX IN POLLIST LD A1,DWTOR,A6 ANK A1,/FF SUK A1,/38 CLOSE TC? RB(Z) WRT107 YES LDK A1,TCINAC RC:TC INACTIVE ABL DISEND WRT130 EQU * LDKL A1,TCNLST ABL DISEND * * ORDER 38:CLOSE TC * WRT150 EQU * LD A2,ECBCW,A8 TCA RB WRT105 EJECT ************************************************************************** * * ILLEGAL LENGTH * ************************************************************************* IL:LEN EQU * LDKL A1,INCLEN INC. LENGTH ABL DISEND DISPATCHER EJECT ************************************************************************* * * ABORT ROUTINE * ************************************************************************ ABORT EQU * LD A1,DWTTP TIMER POINTER RF(Z) AB:10 NO TIMER RUNNING CM* DWTTP,A6 CLEAR TIMER CM DWTTP,A6 CLEAR TIMER POINTER AB:10 EQU * AB:RTN EQU * IFT CPU852=1 ADKL A15,4 ABR* A15 XIF IFF CPU852=1 RTN A15 XIF EJECT * * RECOVERY AT POWER ON * DC82ON EQU * LD A3,DWMTAB DWT'S TABLE LENGTH DRM000 EQU * SUK A3,2 RF(Z) DRM300 END OF TABLE LD A6,DWMTAB,A3 DWT ADDRESS LD A1,DWTST,A6 LDR A2,A1 LDR* A4,A6 DEVICE ADDRESS ANK A2,1 STATUS RF(Z) DRM200 LINE CLOSED ANK A4,/10 RF(NZ) DRM250 OUTPUT DWT DRM100 EQU * INPUT DWT ANKL A1,/8000 RB(NZ) DRM000 NO REQUEST LD A8,DWTECB,A6 LD A2,ECBEL,A8 RB(Z) DRM000 NO MESSAGE CF A15,TENDIO COMPLETE REQUEST RB DRM000 DRM200 EQU * ANK A4,/10 RB(Z) DRM000 INPUT DWT ANKL A1,/8000 RB(NZ) DRM000 NO REQUEST LD A1,DWTOR,A6 GET ORDER ANK A1,/FF SUK A1,/22 OPEN LINE? RB(NZ) DRM000 NO DRM250 EQU * LD A7,DWTSAV+8,A6 LDK A4,DWTTP ADR A4,A7 LDR* A1,A4 RF(Z) DRM275 CM* DWTTP,A7 DRM275 EQU * LDR A1,A6 CF A15,SETIMP DATA DRM400,TIMMRY RB DRM000 DRM300 RTN A15 * * REOPEN LINE * DRM400 EQU * LDR A6,A1 LD A7,DWTSAV+8,A6 CM DWTTP,A7 LDK A5,STB RELOAD STACK =1 ADR A5,A6 ABL OLI105 OPEN LINE EJECT * * * PROCEDURE CONTROL PART * * BMM:BASIS RECEIVE MODE * BMM EQU * LDK A5,STB ADR A5,A6 LD A1,DWTST,A6 GET OUTPUT STATUS RF(NN) OUTPUT OUTPUT OR CONTROL REQUEST LD A1,DWTST,A7 GET INPUT STATUS ABL(NN) POLL READ REQUEST BMM10 EQU * * * DISPATCHING LOOP=TIMER * LDR A1,A6 CF A15,SETIME DATA BMM15,1 ABL TDISP BMM15 EQU * LDR A6,A1 LD A7,DWTSAV+8,A6 LD A1,DWTATP,A6 RB(Z) BMM LDKL A2,-TIMACT NO TIME-OUT STR A2,A1 RESTART ACT. TIMER RB BMM EJECT * * OUTPUT: PRFORM OUPUT OR CONTROL REQUEST * OUTPUT EQU * LD A8,DWTECB,A6 GET ECB ADDRESS ST A8,DWTSAV+10,A6 ST A8,DWTSAV+10,A7 LOAD A8,INTERRUPT REGISTER LD A1,DWTOR,A6 GET ORDER ANK A1,/FF SUK A1,6 ABL(Z) WRITE ORDER 06:WRITE SUK A1,/24-6 ABL(Z) OUT400 ORDER 24:CLOSE LINE SUK A1,2 RF(Z) OUT200 ORDER 26:HALT POLLING SUK A1,1 RF(Z) OUT350 ORDER 27:START POLLING SUK A1,/10 RF(Z) OUT100 ORDER 37:OPEN TC EJECT * * ORDER 38:CLOSE TC * LC A3,DWTOR,A6 GET INDEX IN POLLIST ANK A3,/FF ADR A3,A6 LDR* A2,A3 LD A2,PLIST,A3 RELOAD P-LIST POINTER =1 CM PLIST,A3 LDR A1,A3 SUK A1,2 CM PLIST,A1 LDK A1,0 CF A15,TENDIO COMPLETE REQUEST * * DISCONNECT TC AFTER COMPLETE REQUEST * LDR A1,A2 ANK A1,/7F ECR A1,A1 ORK A1,TDISC CF A5,TRUF CF A5,RDUSTI CF A5,HALTIN ABL BMM10 EJECT * * ORDER 37:OPEN TC * OUT100 EQU * LD A2,ECBCW,A8 GET TCA CF A15,FINDTC ALREADY PRESENT RF(P) OUT105 NO RF OUT300 TC ALREADY IN LIST OUT105 EQU * LDK A2,0 CF A15,FINDTC SEARCH EMPTY PLACE RF(Z) OUT110 LDKL A1,LSTOVF POLLIST OVERFLOW RF OUT310 COMPLETE REQUEST OUT110 EQU * SC A4,DWTOR,A6 SAVE INDEX IN POLLIST LD A1,ECBCW,A8 GET TCA ORKL A1,/8000 SET TCA INACTIVE STR A1,A3 INSERTR TCA IN POLLIST LDR A2,A3 CLEAR COUNTERS AREA SUK A2,2 CMR A2 LDKL A2,RTYLIM ST A2,DWTRTY,A6 * * SEND SNRM AND WAIT WITH TIME-OUT SUPERVISION * SSNRM EQU * LD A1,ECBCW,A8 ANK A1,/7F GET TC ADDRESS ECR A1,A1 ORK A1,TSNRM MERGE WITH C-FIELD OUT111 EQU * CF A5,TRUF OUT112 EQU * CF A5,RDUSTI WAIT FOR REPLY LDR A2,A2 TIME-OUT? RF(N) OUT130 YES * * REPLY RECEIVED,TEST IF UA AS EXPECTED * LDR A1,A2 ANK A1,/FF CWK A1,REUA RF(E) OUT113 RF OUT131 RETRY CUNTERS OUT113 EQU * LD A3,ECBCW,A8 ANK A3,/7F LC A2,DWTOR,A6 GET INDEX IN POLLIST ANK A2,/FF ADR A2,A6 ADK A2,PLIST STR A3,A2 SET TC ACTIVE LD A1,PACT,A6 RF(NZ) OUT300 NOT FIRST IN LIST ST A2,PACT,A6 RF OUT300 OUT130 EQU * OUT131 IM DWTRTY,A6 INCREASE RETRY COUNTER RB(L) SSNRM LIMIT NOT REACHED RETRY LD A1,PINACT,A6 RF(NZ) OUT150 NOT FIRST IN LIST LC A2,DWTOR,A6 GET INDEX ANK A2,/FF ADR A2,A6 ADK A2,PLIST ST A2,PINACT,A6 INDICATE INACTIVE OUT150 EQU * LDK A1,TCINAC RC:TC INACTIVE RF OUT310 COMPLETE REQUEST EJECT * * ORDER /26:HALT POLLING * OUT200 EQU * LDK A1,2 ORS A1,DWTST,A7 NO POLLING LDKL A1,POLHLT RC: POLLING HALTED LDR A6,A7 CF A15,TENDIO COMPLETE READ REQUEST LD A6,DWTSAV+6,A7 RELOAD A6 OUT300 EQU * LDK A1,0 OUT310 CF A15,TENDIO COMPLETE OUTPUT RQUEST ABL BMM10 * * ORDER /27 :START POLLING * OUT350 EQU * LD A1,DWTST,A7 ANK A1,2 RB(Z) OUT300 POLLING ALREADY PERMITTED XRS A1,DWTST,A7 RB OUT300 EJECT * * ORDER /24 CLOSE LINE * OUT400 EQU * CF A5,HALTIN LDK A2,CIDISC CF A5,STHCIN LD A1,DWTATP,A6 ABL(Z) OUT410 CM* DWTATP,A6 CLEAR TIMER ACTIVITY CM DWTATP,A6 OUT410 EQU * LDK A1,0 SC A1,DWTST+1,A6 SC A1,DWTST+1,A7 CF A15,TENDIO COMPLETE OUTPUT REQUEST LDKL A1,LINSTE LDR A6,A7 ABL DISEND COMPLETE INPUT EJECT * * * PROCEDURE TRANSFER PART * POLL: * PERFORMED ON READ REQUEST ON * * POLL EQU * LD A8,DWTECB,A7 ST A8,DWTSAV+10,A6 ST A8,DWTSAV+10,A7 CM ECBRC,A8 CM ECBEL,A8 ANK A1,2 RF(Z) POL100 LDKL A1,POLHLT RC:POLL HALTED RF POL225 POL100 EQU * LD A1,PACT,A6 RF(Z) POL130 NO ACTIVE TCA PRESENT POL110 EQU * ADK A1,4 LDR* A3,A1 GET NEXT TCA RB(Z) POL110 EMPTY PLACE RF(NN) POL150 ACTIVE TC FOUND ADK A3,1 RB(NZ) POL110 INACTIVE TCA LDK A1,PLIST END OF POLLIST ADR A1,A6 POL120 EQU * ST A1,PACT,A6 UPDATE PACT POL130 EQU * LD A1,PINACT,A6 ABL(Z) BMM10 NO ACTIVE TC PRESENTS POL132 EQU * ADK A1,4 NEXT POSITION IN POLLIST CW A1,PINACT,A6 RF(E) POL134 LIST SCANNED LDR* A3,A1 RB(NN) POL132 NOT INACTIVE TC ADK A3,1 RF(NZ) POL138 INACTIVE TC FOUND LDK A1,PLIST END OF LIST REACHED ADR A1,A6 RB POL132 POL134 EQU * LDR* A3,A1 RF(N) POL140 INACTIVE TC FOUND CM PINACT,A6 NO INACTIVE IN POLLIST ABL BMM10 POL138 EQU * SUK A3,1 POL140 EQU * ST A1,PINACT,A6 UPDATE PINACT SUR A1,A6 SUK A1,PLIST SC A1,DWTOR,A6 LDK A1,/FF SC A1,DWTOR,A7 INDICATE INACTIVE TC LDKL A2,-1 NO RECOVERY RF POL200 POL150 EQU * ST A1,PACT,A6 UPDATE PACT SUR A1,A6 SUK A1,PLIST SC A1,DWTOR,A6 SAVE INDEX IN POLLIST LDK A1,0 SC A1,DWTOR,A7 ACTIVE TC LDKL A2,RTYLIM POL200 EQU * ST A2,DWTRTY,A6 RESET RETRY COUNTER SC* A3,ECBBA,A8 STORE TC ADDRESS POL210 EQU * LDR A1,A3 GET TCA ANK A1,/FF ECR A1,A1 TCA IN LEFT BYTE ORK A1,TRRP * * SEND POLL * CF A5,TRSF * * READ ANSWER * CF A5,RDITI LDR A2,A2 TIME OUT RF(NN) POL230 NO * * TIME OUT * POL211 EQU * IM DWTRTY,A6 RF(NN) TINACT LC A3,SENDF,A6 LIMIT NOT REACHED TRY AGAIN RB POL210 EJECT * * UPDATE POLL LIST * TINACT EQU * LD A1,DWTOR,A7 ABL(N) BMM10 TC ALREADY INACTIVE LD* A3,PACT,A6 GET TC ADDRESS ANK A3,/7F ORKL A3,/8000 SET TC INACTIVE ST* A3,PACT,A6 SC* A3,ECBBA,A8 STORE TC ADDRESS =1 LD A2,PINACT,A6 RF(NZ) POL224 LD A1,PACT,A6 ST A1,PINACT,A6 POL224 EQU * LDK A1,TCINAC RC:TC INACTIVE POL225 EQU * LDR A6,A7 CF A15,TENDIO END READ REQUEST POL226 EQU * LD A6,DWTSAV+6,A7 RESTORE A6 ABL BMM10 EJECT * * * POLL OK,ANSWER RECEIVED COULD BE * ** I-FRAME :INFORMATION+FINAL BIT * ** RR :NO TRAFFIC * ** RNR :BUSY * ** ROL :REQUEST ON LINE * **CMDR :OUT OF SEQUENCE * * POL230 EQU * LDR A1,A2 GET CONTROL WORD ANK A1,REMI RF(Z) POL280 I-FRAME-DETECTED * LDR A1,A2 ANK A1,REMRR SUK A1,MRR RF(Z) POL270 RR DETECTED * LDR A1,A2 ANK A1,REMRR SUK A1,MRNR RF(Z) POL260 RNR DETECTED * LDR A1,A2 ANK A1,MSKFF SUK A1,MROL RF(Z) SOFTDI ROL DETECTED * LDR A1,A2 ANK A1,MSKFF SUK A1,RECMDR RB(NZ) POL211 DISCONNECT IF INVALID ANSWER LC A3,DWTOR,A6 ANK A3,/FF ADR A3,A6 ADK A3,PLIST INIT INDEX IN POLL LIST RF SOFTDI EJECT * * RNR RECEIVED * POL260 EQU * LDKL A1,BIT13 RNR ORS A1,DWTST,A7 POL261 EQU * CF A5,UPDCON UPDATE PROTOCOL'S CONTERS LD A1,DWTST,A7 WRONG N(R)? ANKL A1,BIT12 RF(Z) POL264 NO SOFTDI EQU * LC A3,DWTOR,A6 =1 ANK A3,/FF ADR A3,A6 ADK A3,PLIST RESTORE P-LIST POINTER LDR A4,A3 SUK A4,2 LDK A1,0 STR A1,A4 RESET COUNTERS LDR* A1,A3 GET TC ANK A1,/7F ECR A1,A1 ORK A1,TSNRM CF A5,TRUF TRANSMIT SNRM SOFTD1 CF A5,RDUSTI LDR A2,A2 TIME-OUT RB(N) TINACT NO POL262 EQU * RF TACT OK,ACTIVE TENDANCE POL264 EQU * LD A1,DWTST,A7 ANKL A1,BIT13 RF(NZ) POL265 RNR RF TACT RR POL265 EQU * LC A3,DWTOR,A6 SET INDEX ANK A3,/FF ADR A3,A6 ADK A3,PLIST LDR A1,A3 INDEX SUK A1,2 LDKL A2,BIT0 ORR* A1,A2 RF TACT EJECT * * RR DETECTED * POL270 EQU * LDKL A1,NBIT13 ANS A1,DWTST,A7 RB POL261 EJECT * * HERE TO COMPLETE I/O AND UPDATE PLIST * ACTIVE TENDENCE * TACT EQU * LD A1,DWTOR,A7 ABL(NN) BMM10 TC NOT INACTIVE TACT1 EQU * LDK A3,/FF =1 ANS* A3,PINACT,A6 TC ACTIVE LD A3,PACT,A6 RF(NZ) TACT2 LD A1,PINACT,A6 ST A1,PACT,A6 TACT2 EQU * LDKL A1,TCACT RC:TC ACTIVE RB POL225 * EJECT * * I-FRAME DETECTED * POL280 EQU * CF A5,UPDCON LD A1,DWTST,A7 GET STATUS ANKL A1,BIT12 WRONG N(R) ? RF(Z) POL281 NO * * HERE EXEPTION STATE,DISCONNECT AND RESET COUNTERS * ABL INPDIS * POL281 EQU * LD A1,DWTST,A7 ANKL A1,BIT11 WRONG N(S) ? RF(Z) POL282 NO RB TACT INDICATE ACTIVE ONLY * * N(S) AND N(R) OK,COMPLETE REQUEST * POL282 EQU * LD A1,DWTOR,A7 RB(N) TACT1 TC INACTIVE LDK A1,0 RB POL225 EJECT * * HERE TO TRANSFER A MESSAGE TO TC * WRITE EQU * * * BEFORE TRANSMIT TEST IF TC BUSY * LC A2,DWTOR,A6 GET INDEX IN POLLIST ANK A2,/FF ADR A2,A6 SUK A2,2 ADK A2,PLIST-2 =1 LDR* A2,A2 GET STATUS TC ANKL A2,BIT0 BUSY ? RF(Z) WRITE1 NO * * INDICATE TC BUSY COMPLETE TENDIO * LDKL A1,TCBUSY CF A15,TENDIO CF A5,HALTIN ABL BMM10 * WRITE1 EQU * LDKL A1,RTYLIM ST A1,DWTRTY,A6 RESET RETRY COUNTER WRT100 EQU * LD A1,DWTST,A7 RF(N) WRT200 NO READ REQUEST ANK A1,2 HALT POLLING ? RF(NZ) WRT200 YES * * READ REQUEST PRESENT,SEND POLL-BIT * LDK A1,0 CF A5,TRI * * READ WITH BUFFER FOR I-FRAME * WRT020 EQU * CF A5,RDITI LDR A2,A2 TIME-OUT RF(NN) WRT050 NO WRT021 IM DWTRTY,A6 YES,INCREMENT RETRY RF(Z) WRT400 DISCONNECT * * SEND RR FRAME * LDK A1,TRRP LC* A3,ECBBA,A8 ECR A3,A3 ORR A1,A3 CF A5,TRSF RB WRT020 WAIT FOR REPLY * * NO TIME-OUT * WRT050 EQU * WRT055 EQU * LDR A1,A2 ANK A1,REMI I-FRAME ? RF(Z) WRT060 EJECT * * TEST RR,RNR,CMDR* * WRT056 EQU * LDR A1,A2 ANK A1,REMRR SUK A1,MRR RF(Z) WRT080 RR * LDR A1,A2 ANK A1,REMRR SUK A1,MRNR RF(Z) WRT070 RNR * LDR A1,A2 SUK A1,RECMDR RF(Z) WRT090 CMDR * * HERE INVALID FRAME HAS BEEN RECEIVED * RB WRT021 TRY TO RECOVER EJECT * * I-FRAME DETECTED * WRT060 EQU * CF A5,UPDCON LD A1,DWTST,A7 GET STATUS ANKL A1,BIT12 RF(Z) WRT061 NO WRONG N(R) RF INPDIS RESTART * WRT061 EQU * LD A1,DWTST,A7 ANKL A1,BIT11 WRONG N(S) ? RF(Z) WRT062 NO ABL POL226 INDICATE WITH NEXT POLL * WRT062 EQU * RB POL282 COMPLETE REQUEST EJECT * * RNR DETECTED * WRT070 EQU * LDKL A1,BIT13 ORS A1,DWTST,A7 RNR WRT071 EQU * CF A5,UPDCON LD A1,DWTST,A7 ANKL A1,BIT12 WRONG N(R) ? RF(Z) WRT072 RF INPDIS YES * WRT072 EQU * LC A2,DWTOR,A6 GET INDEX IN POLLIST ANK A2,/FF ADR A2,A6 SUK A2,2 ADK A2,PLIST LD A1,DWTST,A7 GET STATUS ANKL A1,BIT13 RF(NZ) WRT073 RF WRT074 GO ON,RR * WRT073 EQU * LDKL A1,BIT0 ORRS A1,A2 ABL POL226 WRT074 EQU * LDKL A1,/7FFF ANRS A1,A2 ABL POL226 * WRT080 EQU * LDKL A1,NBIT13 ANS A1,DWTST,A7 RR RB WRT071 * WRT090 EQU * RF INPDIS EJECT * * NO READ REQUEST PRESENT * SEND I-FRAME + RNR + POLL-BIT * WRT200 EQU * LDK A1,1 CF A5,TRI WRT201 EQU * CF A5,RDUSTI LDR A2,A2 RF(N) WRT300 TIME-OUT DETECTED RB WRT056 TEST RECEIVED FRAME WRT300 EQU * IM DWTRTY,A6 INCREMENT RETRY RF(Z) WRT400 LDK A1,TRNRP LC* A3,ECBBA,A8 ECR A3,A3 ORR A1,A3 CF A5,TRSF RB WRT201 * * HERE ON RETRY EXPIRATION.COMPLETE RTEQUEST * SET TC INACTIVE * WRT400 EQU * CM ECBRC,A8 LDK A1,TCINAC RC:TC INACTIVE WRT401 EQU * CF A15,TENDIO LC* A3,ECBBA,A8 ANK A3,/7F LC A2,DWTOR,A6 INDEX IN POLLIST ANK A2,/FF ADR A2,A6 ADK A2,PLIST ORKL A3,/8000 SET TC INACTIVE STR A3,A2 LD A1,PINACT,A6 RF(NZ) WRT402 =1 LD A2,PACT,A6 ST A2,PINACT,A6 WRT402 EQU * =1 CF A5,HALTIN ABL BMM10 * * RECOVER WRONG N(R) * INPDIS EQU * IM DWTRTY,A6 RETRY COUNTER RB(Z) WRT400 INACTIVE TC LC A3,DWTOR,A6 GET INDEX IN POLLIST ANK A3,/FF ADR A3,A6 ADK A3,PLIST SUK A3,2 LDK A1,0 STR A1,A3 RESET COUNTERS LC* A3,ECBBA,A8 ANK A3,/7F ECR A3,A3 ORK A3,TSNRM LDR A1,A3 CF A5,TRUF TRANSMIT SNRM CF A5,RDUSTIS LDR A2,A2 =1 RB(N) INPDIS T.O =1 ANK A2,/FF CWK A2,REUA RB(NE) INPDIS ABL BMM10 EJECT * * INTERNAL SUBROUTINES * * * RESTITUTE COUNTERS * LOADCO EQU * LC A3,DWTOR,A6 GET INDEX IN POLLIST ANK A3,/FF ADR A3,A6 ADK A3,PLIST SUK A3,2 A2 POINTS ON COUNTERS LDR* A1,A3 ANKL A1,7 ISOLATE VR ST A1,VRS,A6 LDR* A1,A3 SRL A1,3 ANKL A1,7 ISOLATE VS ST A1,VSS,A6 LDR* A1,A3 SRL A1,6 ISOLATE LNR ANKL A1,7 ST A1,LNR,A6 LDR* A1,A3 SRL A1,9 ANKL A1,7 ISOLATE CHECK P]OINT ST A1,CPS,A6 RTN A5 EJECT * * GET CURRENT VARIABLE COUNTERS AND UPDATE * UPDCON EQU * CF A5,LOADCO LDR A1,A2 ANK A1,1 RF(NZ) UPD100 NOT I-FRAME NO N(S) LDR A1,A2 SRL A1,1 ANK A1,7 CW A1,VRS,A6 CHECK N(S) RF(NE) UPD080 NOT OK LDKL A1,NBIT11 ANS A1,DWTST,A7 RESTORE WRONG N(S) IM VRS,A6 INCREMENT VARIABLE LDK A1,7 ANS A1,VRS,A6 MODULO 7 RF UPD100 * UPD080 EQU * LDKL A1,BIT11 SET WRONG N(S) ORS A1,DWTST,A7 UPD100 EQU * LDR A1,A2 SRL A1,5 PICK OUT N(R) ANK A1,7 LD A3,CPS,A6 GET CHECK-POINT CW A3,LNR,A6 RF(E) UPD210 NO TRANSMISSION DONE CW A1,CPS,A6 TRANSMISSION ACKNOLEDGED ? RF(NE) UPD130 ST A1,LNR,A6 YES SAVE LAST ACKED N(R) * * HERE TRANSMISSION OK,COMPLETE WRITE REQUEST * LDKL A1,NBIT12 ANS A1,DWTST,A7 RESTORE N(R) LDK A1,0 CF A15,TENDIO CF A5,STORCO RESTORE POLLIST'S COUNTERS RTN A5 * * LAST TRANSMISSION NOT ACKNOLEDGED * UPD130 EQU * LDKL A4,-1 ADS A4,VSS,A6 RESTORE VS ADS A4,CPS,A6 RESTORE CP CW A1,LNR,A6 VALID N(R) ? RF(NE) UPD205 NO CF A5,STORCO ADK A5,4 UPDATE STACK =1 IM DWTRTY,A6 RETRY ABL(Z) WRT400 INACTIVE TC ABL WRT100 RESEND FRAME * * INDICATE WRONG N(R) * UPD205 EQU * LDKL A1,BIT12 ORS A1,DWTST,A7 CF A5,STORCO RTN A5 * * HERE NO TRANSMISSION HAS BEEN DONE * CHECK VALID N(R) * UPD210 EQU * CW A1,VSS,A6 RB(NE) UPD205 LDKL A1,NBIT12 ANS A1,DWTST,A7 RESTORE N(R) STATUS CF A5,STORCO RTN A5 * EJECT * * BEFORE RETURN,RESTORE COUNTERS IN POLLIST * STORCO EQU * LC A2,DWTOR,A6 ANK A2,/FF ADR A2,A6 ADK A2,PLIST SUK A2,2 POINTER TO TC'S STATUS LDR* A3,A2 ANKL A3,/8000 ISOLATE BUSY FLAG CMR A2 LD A1,VRS,A6 ORRS A1,A2 LD A1,VSS,A6 SLL A1,3 ORRS A1,A2 LD A1,LNR,A6 SLL A1,6 ORRS A1,A2 LD A1,CPS,A6 SLL A1,9 ORRS A1,A2 ORRS A3,A2 RESTORE BUSY FLAG RTN A5 EJECT * * * COMMON SUBROUTINES USED TO TRANSFER FRAMES * TRSF :SHORT FRAME (16 BITS) * TRUF :UNNUMBERED FRAME (16 BITS) * TRI :I-FRAME WITH POLL-BIT OR NOT * * A1 CONTAINS ADDRESS+C-FIELD * TRSF EQU * * * HERE TO INSERT CURRENT N(R) VARIABLE BEFORE TRANSMIT * LC A2,DWTOR,A6 ANK A2,/FF ADR A2,A6 ADK A2,PLIST SUK A2,2 LDR* A3,A2 ANKL A3,7 SLL A3,5 ORR A1,A3 STORE VR IN SENT FRAME * TRUF EQU * ST A1,SENDF,A6 INIT OUTPUT FIELD LDKL A3,SENDF ADR A3,A6 LDK A4,2 RF SENDX0 EJECT * * SEND I-FRAMES * TRI EQU * LDR A1,A1 RF(Z) TRIPOL POLL-BIT ON RF TRISGL POLL-BIT OFF TRIPOL EQU * LDK A2,/10 CF A5,PRCFI INIT C-FIELD LD A3,ECBBA,A8 GET BUFFER ADDRESS LDKL A1,/FF00 ANRS A1,A3 SAVE ADDRESS FIELD ORRS A2,A3 MERGE WITH C-FIELD LD A4,ECBRL,A8 RF SENDY0 * TRISGL EQU * LDK A2,0 CF A5,PRCFI INIT C-FIELD LD A3,ECBBA,A8 LDKL A1,/FF00 ANRS A1,A3 ORRS A2,A3 LD A4,ECBRL,A8 RF SENDZ0 EJECT * * SUBROUTINE USED TO UPDATE C-FIELD WHEN SENDIND I-FRAME * PRCFI EQU * CF A5,LOADCO LOAD COUNTERS LD A1,VSS,A6 SLL A1,1 ORR A2,A1 INIT N(R) LD A1,VRS,A6 SLL A1,5 ORR A2,A1 INIT N(S) RTN A5 EJECT * * SEND MODULES * SENDX0 EQU * * * START TRANSMITTER AND SEND SHORT FRAME * CF A5,STHCUT CIO START ABL(NN) OLI160 MODEM NOT OPERABLE RF SENDXX LDK A2,1 CF A5,STHID1 SENDXX EQU * RTN A5 OK RETURN * * HERE TO SEND I-FRAME + POLL-BIT * SENDY0 EQU * CF A5,STHCUT CIO START ABL(NN) OLI160 MODEM NOT OPERABLE LD A1,VSS,A6 ADK A1,1 ANK A1,7 MODULO 7 ST A1,VSS,A6 N(S) ST A1,CPS,A6 CHECK POINT CF A5,STORCO RESTORE COUNTERS RTN A5 * * HERE TO SEND I-FRAME + RNR + POLL-BIT * SENDZ0 EQU * CF A5,STHCUT CIO START ABL(NN) OLI160 MODEM NOT OPERABLE LD A1,VSS,A6 ADK A1,1 ANK A1,7 ST A1,VSS,A6 ST A1,CPS,A6 CF A5,STORCO * * SEND POLL-BIT IN RNR * LDKL A1,TRNRP LD A2,VRS,A6 GET N(R) SLL A2,5 ORR A1,A2 LDK A4,2 INIT LENGTH LC* A3,ECBBA,A8 ECR A3,A3 ORR A1,A3 ST A1,SENDF,A6 LDKL A3,SENDF ADR A3,A6 CF A5,STHCUT CIO START ABL(NN) OLI160 RTN A5 EJECT * * * COMMON SUBROUTINES TO READ A COMPLETE FRAME * RDUSTI : READ WITHOUT BUFFER USER * RDITI : READ AND USE USER BUFFER * RDUSTI EQU * LDKL A4,DCUSLI GET MAX BUFFER LENGTH ST A4,DCBUCU,A7 STORE IN DWT * * INIT RECEIVE BUFFER * LDKL A4,USBUF ADR A4,A7 BUFFER ADDRESS LDK A3,0 INIT LENGTH RF RDUT10 * RDITI EQU * LD A8,DWTECB,A7 GET ECB POINTER LDK A1,0 ST A1,ECBEL,A8 LD A4,ECBBA,A8 LD A3,ECBRL,A8 ST A3,DCBUCU,A7 LDK A3,0 * RDUT10 EQU * LDR A1,A7 * * START TIMER * ST A4,DWTSAV+2,A7 SAVE A4 =1 CF A15,SETIME DATA RDUT20,TIMRE4 ST A4,DWTTP,A7 STORE TIMER POINTER LD A4,DWTSAV+2,A7 RESTORE A4 RF RDUT40 * * TIME-OUT ENTRY * RDUT20 EQU * INH CM DWTTP,A7 =1 LDR A7,A1 GET DWT LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 ADK A5,4 STACK =1 CF A5,HALTIN ABL(Z) OLI160 MODEM NOT READY * RDUT30 EQU * ORKL A2,/8000 TIME-OUT RTN A5 * RDUT40 EQU * LDK A3,0 RESET THE LENGTH LDK A2,CIREPC RECEIVE ON PROGRAM CHANNEL CF A5,STHCIN RB(O) RDUT10 RETRY CIO START * * READ FRAME OK? * ON RETURN A3 = LENGTH * ABL(Z) OLI160 RF(N) READOK * * ERRORS WITHIN FRAME,POLL AGAIN * LDKL A2,/8000 THROUGPUT RTN A5 * * FRAME OK,INIT LENGTH AND CNT-WORD * READOK EQU * =1 LCR A2,A4 CC A2,SENDF,A6 SAME ADDRESS AS POLLED ? RF(E) RDOK1 YES LDKL A2,/8000 RTN A5 RDOK1 EQU * LDR* A2,A4 LDR A1,A2 ANK A1,REMI READ FRAME ? RF(NZ) READUT NO ST A3,ECBEL,A8 INIT LENGTH FOR I-FRAME READUT RTN A5 EJECT * * * OUTPUT HARDWARE INTERFACE * * START TRANSMITTER * GO TO DISPATCHER TO ACCEPT OUTPUT INTERRUPTS * STHCUT EQU * LD A1,PFPOST =3 ABL(NZ) TDISP WAIT FOR POWER UP =3 LCR A1,A3 =1 SC A1,SENDF,A6 LDR* A1,A6 GET DEVICE ADDRESS ADKL A1,CIOST CREATE INSTUCTION ST A1,STHCUX LDR A2,A4 GET LENGTH ANK A2,1 RF(Z) STHCU0 ALL BITS SIGNIFICANTS LDKL A2,/800 STHCU0 ADK A2,CIT4WP TRANSMIT 4-WIRES P.C ADR A4,A3 END OF BUFFER ADDRESS STHCUX EQU * HLT RF IHU400 *** SHOULD BE ACCEPTED *** * * IDLE ONE ON LINE * STHID1 EQU * LDR* A1,A6 GET DEVICE ADDRESS ADKL A1,CIOST CREATE INSTRUCTION ST A1,STHID2 STHID2 EQU * HLT RF IHU400 EJECT * * * INTERRUPT HANDLER,CHLC TRANSMITTER 1 * * IH8202 EQU * STR A1,A15 SAVE A1,A8 ON STACK STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 LDKL A6,DW8202 RESTORE OUTPUT DWT IHU100 EQU * LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 LCR A2,A3 ODD OR EVEN ADDRESS SLL A2,8 LC A2,+1,A3 IHU200 EQU * OTR A2,0,DAMU01 OUTPUT WORD * IHUXX EQU * ABL(NA) SSTU00 IFF LOGG=0 =1 CF A5,LOGOUT XIF IHU300 EQU * ADK A3,2 CWR A3,A4 END OF BUFFER ? RF(L) IHU400 * * TRANSMISSION DONE,HALT TRANSMITTER * LD A1,PFPOST =3 ABL(NZ) TDISP WAIT FOR POWER UP =3 LDKL A1,CIOH CREATE CIO HALT INSTRUCTION ADR* A1,A6 ST A1,IHU310 IHU310 EQU * HLT IHU400 EQU * ST A3,DWTSAV,A6 ST A4,DWTSAV+2,A6 ST A5,DWTSAV+4,A6 * * RETURN TO INTERRUPTED PROGRAMM * RETURN EQU * LDR* A8,A15 LDR* A7,A15 LDR* A6,A15 LDR* A5,A15 LDR* A4,A15 LDR* A3,A15 LDR* A2,A15 LDR* A1,A15 RTN A15 IFF HILINO=1 EJECT * * CHLC TRANSMITTER 2* * IH8204 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8204 RESTORE OUTPUT DWT LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU02 ABL IHUXX IFF HILINO=2 EJECT * * CHLC TRANSMITTER 3 * IH8206 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8206 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU03 ABL IHUXX IFF HILINO=3 EJECT * * CHLC TRANSMITTER 4 * IH8208 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8208 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU04 ABL IHUXX IFF HILINO=4 EJECT * * CHLC TRANSMITTER 5 * IH8210 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8210 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU05 ABL IHUXX IFF HILINO=5 EJECT * * CHLC TRANSMITTER 6 * IH8212 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8212 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU06 ABL IHUXX IFF HILINO=6 EJECT * * TRANSMITTER 7 * IH8214 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8214 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU07 ABL IHUXX IFF HILINO=7 EJECT * * CHLC TRANSMITTER 8 * IH8216 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8216 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU08 ABL IHUXX IFF HILINO=8 EJECT * * CHLC TRANSMITTER 9 * IH8218 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8218 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU09 ABL IHUXX IFF HILINO=9 EJECT * * CHLC TRANSMITTER 10 * IH8220 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8220 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU10 ABL IHUXX IFF HILINO=10 EJECT * * CHLC TRANSMITTER 11 * IH8222 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8222 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU11 ABL IHUXX IFF HILINO=11 EJECT * * CHLC TRANSMITTER 12 * IH8224 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A6,DW8224 LD A3,DWTSAV,A6 LD A4,DWTSAV+2,A6 LD A5,DWTSAV+4,A6 LD A7,DWTSAV+8,A6 LD A8,DWTSAV+10,A6 * LCR A2,A3 SLL A2,8 LC A2,+1,A3 OTR A2,0,DAMU12 ABL IHUXX XIF EJECT * * SST INTERRUPT HANDLER,CHLC TRANSMITTER * SSTU00 EQU * LDKL A1,SST ADR* A1,A6 ST A1,SSTU10 SSTU10 EQU * HLT RF(A) SSTU20 SST ACCEPTED HLT SSTU20 EQU * IFF LOGG=0 =1 CF A5,LOGSST XIF ANK A2,3 GET ONLY BITS 14.15 LDR A1,A2 GET STATUS RF(NZ) SSTU40 SST NOT OK LDK A2,2 SSTU30 EQU * CF A5,A5CND SET CONDITION REGISTER RTN A5 * * MODEM OPERABLE ? * SSTU40 EQU * LDR A1,A2 ANK A1,MODNOP RF(Z) SSTU50 MODEM OK LDK A2,0 RB SSTU30 MODEM NOT OPERABLE * SSTU50 EQU * LDR A1,A2 ANK A1,2 RF(Z) SSTU60 ERRORS ABL IHU400 THROUGPUT SSTU60 EQU * CF A5,HALTIN ABL IHU400 * * INPUT HARDWARE INTERFACE * START RECEIVER * GO TO DISPATCHER TO ACCEPT INPUT INTERRUPTS * A2 COUNTAINS CIO PARAMETER * STHCIN EQU * LD A1,PFPOST =3 ABL(NZ) TDISP WAIT FOR POWER UP =3 LDR* A1,A7 GET DEVICE ADDRESS ADKL A1,CIOST CREATE START INSTRUCTION ST A1,STHCI0 STHCI0 EQU * HLT RF IHI300 * EJECT * * INTERRUPT HANDLER,CHLC RECEIVER * IH8201 EQU * STR A1,A15 SAVE A1,A8 ON STACK STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8201 GET INPUT DWT LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI01 GET WORD FROM LINE IHI200 EQU * ABL(NA) SSTIN0 IFF LOGG=0 =1 CF A5,LOGIN XIF * * INPUT INTERRUPT ACCEPTED * ADR A4,A3 GET BUFFER ADDESS ECR A1,A2 ODD OR EVEN ADDRESS SCR A1,A4 SRL A1,8 SC A1,+1,A4 SUR A4,A3 RESTITUTE START POINTER ADK A3,2 CW A3,DCBUCU,A7 RF(L) IHI300 NO BUFFER OVERFLOW SUK A3,2 YES,MAINTAIN DATA IN LAST WORD * IHI300 EQU * ST A3,DWTSAV,A7 ST A4,DWTSAV+2,A7 ST A5,DWTSAV+4,A7 ABL RETURN IFF HILINO=1 EJECT * * CHLC RECEIVER 2 * IH8203 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8203 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI02 GET WORD FROM LINE RB IHI200 HANDLE IT * IFF HILINO=2 EJECT * * CHLC RECEIVER 3 * IH8205 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 LDKL A7,DW8205 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI03 ABL IHI200 IFF HILINO=3 EJECT * * CHLC RECEIVER 4 * IH8207 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8207 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI04 ABL IHI200 IFF HILINO=4 EJECT * * CHLC RECEIVER 5 * IH8209 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8209 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI05 ABL IHI200 IFF HILINO=5 EJECT * * CHLC RECEIVER 6 * IH8211 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8211 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI06 ABL IHI200 IFF HILINO=6 EJECT * * CHLC RECEIVER 7 * IH8213 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8213 LD A3,DWTST,A7 LD A4,DWTST+2,A7 LD A5,DWTST+4,A7 LD A6,DWTST+6,A7 LD A8,DWTST+10,A7 * INR A2,0,DAMI07 ABL IHI200 IFF HILINO=7 EJECT * * CHLC RECEIVER 8 * IH8215 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8215 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI08 ABL IHI200 IFF HILINO=8 EJECT * * CHLC RECEIVER 9 * IH8217 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8217 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI09 ABL IHI200 IFF HILINO=9 EJECT * * CHLC RECEIVER 10 * IH8219 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8219 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI10 ABL IHI200 IFF HILINO=10 EJECT * * CHLC RECEIVER 11 * IH8221 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8221 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI11 ABL IHI200 IFF HILINO=11 EJECT * * CHLC RECEIVER 12 * IH8223 EQU * STR A1,A15 STR A2,A15 STR A3,A15 STR A4,A15 STR A5,A15 STR A6,A15 STR A7,A15 STR A8,A15 * LDKL A7,DW8223 LD A3,DWTSAV,A7 LD A4,DWTSAV+2,A7 LD A5,DWTSAV+4,A7 LD A6,DWTSAV+6,A7 LD A8,DWTSAV+10,A7 * INR A2,0,DAMI12 ABL IHI200 XIF EJECT * * STATUS INTERRUPT HANDLER,CHLC RECEIVER * * A2 INPUT REGISTER FOR STATUS INFO * SSTIN0 EQU * LD A1,DWTTP,A7 GET TIMER POINTER RF(Z) SSTI03 NO TIMER CMR A1 CM DWTTP,A7 CLEAR TIMER SSTI03 EQU * LDR* A1,P SST A2,0 ADR* A1,A7 CREATE SST INSTRUCTION ST A1,SSTT05 SSTT05 EQU * HLT RF(A) SSTI06 HLT SSTI06 EQU * IFF LOGG=0 =1 CF A5,LOGSST XIF LDR A1,A2 SAVE STATUS IN REG A1 ANKL A1,SSTMSK ISOLATE SIGNIFICANT BITS RF(NZ) SST10 STATUS PRESENT * * STATUS OK,UPDATE LENGTH AND RETURN * ANKL A2,/0F00 RF(Z) SSTI07 SUK A3,1 1 CHAR IN LAST WORD SSTI07 EQU * LDK A2,2 RF SST22 * * HERE TO HANDLE RECEIVER STATUS * SST10 EQU * LDR A1,A2 ANK A1,MSKMOD MODEM AND CARRIER OFF RF(Z) SST20 * * MODEM NOT OPERABLE * LDK A2,0 RF SST22 YES,INDICATE IT SST20 EQU * LDR A1,A2 ANK A1,SSTTHR RF(NZ) SST21 * * CRC ERROR (RESTART INPUT) * LDK A2,3 ALL TYPE ERRORS RF SST22 * * THROUGPUT ERROR * SST21 LDK A2,1 SST22 CF A5,A5CND RTN A5 EJECT * * HALT LINE INPUT * HALTIN EQU * LD A2,PFPOST =3 ABL(NZ) TDISP WAIT FOR POWER UP =3 LDKL A2,CIOH ADR* A2,A7 ST A2,HALT10 HALT10 EQU * HLT ABL IHI300 RETURN TO DISPATCHER EJECT * * SET CND AT A5 STACK * A5CND EQU * LD A1,6,A5 GET CND WORD ANKL A1,/FCFF ECR A2,A2 CND WORD FROM PRG ORR A1,A2 CND WRD CHANGED ST A1,6,A5 STORE IN STACK RTN A5 EJECT * * FINDTC * SEARCH TCA IN POLLIST * A3=ADDRESS TO FIND TCA FOR EXIT * A4=INDEX IN POLLIST * A2=TCA IN ENTRY * CR=Z ACTIVE TCA FOUND * CR=N INACTIVE TCA FOUND * CR=P TCA NOT FOUND * FINDTC EQU * ADKL A15,4 LD A4,PLIST,A6 GET LENGTH OF POLLIST LDR A3,A6 ADK A3,PLIST ADR A3,A4 FIND10 EQU * LDR* A1,A3 GET TCA CWR A1,A2 RF(E) FIND40 ACTIVE TC FOUND ANK A1,/FF CWR A1,A2 RF(E) FIND30 INACTIVE TC FOUND SUK A3,4 SUK A4,4 RB(P) FIND10 GET NEXT TCA ADK A4,1 ABR* A15 FIND30 EQU * LDR* A1,A3 FIND40 EQU * ABR* 15 EJECT * * TEST LINE * TST000 EQU * ** TEMP ** ABL DISIOE ILLEGAL ORDER EJECT * * INTERRUPT LOGGING ROUTINE * IFF LOGG=0 =1 LOGSST EQU * LDKL A1,/5555 RF LOG10 LOGOUT EQU * LDK A1,0 RF LOG10 LOGIN EQU * LDKL A1,/1111 LOG10 ST A3,SAVE3 ST A2,SAVE2 LD A3,LOGPNT STR A1,A3 ADK A3,2 STR A2,A3 ADK A3,2 CWK A3,LOGEND RF(L) LOGEXI LDKL A3,LOGSTA LOGEXI ST A3,LOGPNT LD A2,SAVE2 LD A3,SAVE3 LOGE10 RTN A5 EJECT * * WORK AREAS FOR LOGGING * LOGPNT DATA LOGSTA LOGSTA EQU * RES 600 LOGEND EQU *-6 SAVE2 DATA 0 SAVE3 DATA 0 XIF * END