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DataMuseum.dkPresents historical artifacts from the history of: Philips Data Systems |
This is an automatic "excavation" of a thematic subset of
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Length: 14352 (0x3810)
Notes: pts_type(SC)
Names: »DRSOP1.SC«
└─⟦13e5fd45a⟧ Bits:30009699 Philips computer tape "600507"
└─⟦this⟧ »TOSSWORK/DRSOP1.SC«
└─⟦bc20f3abf⟧ Bits:30009670 Philips computer tape "600126"
└─⟦this⟧ »TOSSWORK/DRSOP1.SC«
IDENT DRSOP1 REL 11.0 81-01-26 870105041100 * * ************************************************************ * * PHILIPS TERMINAL SYSTEM PTS * * DRSOP1 = DRIVER FOR SYSTEM OPERATORS PANEL * * * * * * ************************************************************ * * * THIS DRIVER HANDLES INPUT AND OUTPUT ON SYSTEM OPERATOR'S * PANEL CONNECTED TO CPU VIA CHCR-SOP * * * ON AN INPUT REQUEST THE DEVICE SOFTWARE STATUS IS SET * 'BUSY' UNTIL THE INPUT INTERRUPT IS TAKEN CARE OF * * * AT POWER UP RUNNING READ REQUEST IS COMPLETED WITH -2 * IN CONTROL WORD.IF NO RUNNING READ REQUEST,POWER UP * IS INDICATED AND NEXT READ REQUEST IS TERMINATED WITH * -2 IN CONTROL WORD * * * ON AN OUTPUT REQUEST THE DEVICE SOFTWARE STATUS IS SET * 'READY' IMMEDIATELY, SINCE THE OUTPUT DOES NOT REQUIRE * AN INTERRUPT. * EJECT * * * THE DRIVER CONSISTS OF THE FOLLOWING PARTS: * * S O P A S : READ SWITCHES ENTRY * * S O P A L : ACTIVATE LIGHTS ENTRY * * I H S O P : INTERRUPT HANDLER * * S O P R : RECOVERY ROUTINE * * * * THE FOLLOWING ORDERS ARE TREATED: * * ORDER 02 : READ SWITCHES * 05 : WRITE LIGHTS ON * 06 : WRITE LIGHTS OFF * 39 : WRITE FLASHING LIGHTS * * NORMAL REGISTER USAGE: * * REGISTER A1: INPUT/OUTPUT * A2: WORK REGISTER * A3: WORK REGISTER * A4: WORK REGISTER * A5: ---- * A6: DWT-ADDRESS * A7: ORDER * A8: ECB-ADDRESS * * EJECT * ************ * ENTRIES: * ************ * * ENTRY SOPCT S.O.P. CHANNEL UNIT TABLE ENTRY SOPR S.O.P. RECOVERY ROUTINE ENTRY IHSOP S.O.P. INTERRUPT HANDLER (ALIAS) ENTRY DWSI01 INPUT DWT ENTRY DWSI02 EXTENDED INPUT DWT ENTRY DWSO01 OUTPUT DWT * ************** * EXTERNALS: * ************** * * TOSS GLOBALS: * EXTRN SAVE8 PUSH REGS A1-A8 ONTO STACK EXTRN DISIOE DISPATCHER I/O REQUEST ERROR ENTRY EXTRN TDISP DISPATCHER LKM ENTRY EXTRN RETUR8 POP A1-A8 CONT'S AND RETURN EXTRN TENDIO END-OF-I/O HOUSEKEEPING AND QUEUEING SUBROUTINE EXTRN SETIMP EXTRN SPDLCI DATA SOP LIGHTS AND FD POWER EJECT * ************************************ * * DWT DISPLACEMENTS * ************************************ * EXTRN DWTCHP CHANNEL PARAMETER EXTRN DWTST STATUS EXTRN DWTECB ECB ADDRESS EXTRN DWTOR DWT INDEX AND ORDER EXTRN DWTADR DRIVER ADDRESS BLOCK EXTRN DWTTAB TTAB ADDRESS EXTRN DWTWAT WAIT/ACTIVATE INDICATOR EXTRN DWTTQ TERMINAL QUEUE EXTRN INTSAV SAVE AREA FOR LAST INTERRUPT EXTRN ECBEL EFFECTIVE LENGTH IN ECB EXTRN ECBCW ECB CONTROL WORD TIME EQU 5 FLASH TIME EJECT * CONDITIONAL ASSEMBLY * EXTENDED SOP INPUT DWT OR NOT * SOPX=0 => NOT EXTENDED * X:A EQU 0 SOPX EQU X:A ** ** * THE ORDER /39, WRITE FLASHING LIGHTS CAN BE INCLUDED BY * SETTING X:B=1 * X:B EQU 0 WRFLA EQU X:B * * * A PROGRAM VERSION USING TOSS MMU PAGING * IS OBTAINED BY SETTING MMUPAG EQU 1. * MMUPAG EQU 0 * * * A PROGRAM VERSION USING THE EXTENDED INSTRUCTION * SET IS OBTAINED BY SETTING CPU852 EQU 0. * CPU852 EQU 1 * DVBLEN EQU 0 MMU BUFFER SIZE DEVIND EQU -2 SOP DEVICE INDEX * EJECT * * DWTDRD EQU /10 START OF DRIVER DEFINED PART * IFT MMUPAG=0 START EQU DWTDRD XIF * IFT MMUPAG=1 START EQU DWTDRD+4 XIF * DWTTP EQU START+/00 TIMER POINTER * EJECT * ************************** * S.O.P. DEVICE ADDRESS: * ************************** * * SOPDA EQU /2E DEVICE ADDRESS * * * ****************************** * * * S.O.P. CHANNEL UNIT TABLE * * * ****************************** * * SOPCT EQU * TABLE STARTS WITH ADDRESS BLOCK: * DATA DVBLEN MMU BUFFER SIZE DATA DEVIND DEVICE INDEX SOPADI EQU * INPUT ADDRESS BLOCK (FOR READ ORDERS) * DATA SOPAS ACTIVATE SWITCHES ENTRY DATA 0 ABORT ROUTINE ADDRESS * DATA DVBLEN MMU BUFFER SIZE DATA DEVIND DEVICE INDEX SOPADU EQU * ACTIVATE LIGHTS ENTRY * DATA SOPAL ACTIVATE LIGHTS ENTRY DATA 0 ABORT ROUTINE ADDRESS * * BIT 0 CONTROLS FD POWER * (0=ON, 1=OFF) EJECT * ****************************** * * * S.O.P. ACTIVATION ROUTINE: * * * ****************************** * * THE ORDER IS ANALYZED AND THE CORRESPONDING I/O ACTION * IS CARRIED OUT. * SOPAS EQU * SWITCHES ACTIVATION ENTRY * LDR A4,A7 COPY ORDER * SUK A4,/02 SEE IF READ ORDER: * RF(NZ) SOPER ERROR IF NOT READ ORDER * * INPUT SWITCH VALUE * SOPIN LDR* A2,A6 POWER UP INDICATION ? RF(NZ) EXIT NO STR A7,A6 YES RF IHSOP3 * EJECT * * ENTRY FOR CHANGES OF S.O.P. LIGHTS * SOPAL EQU * ACTIVATE LIGHTS ENTRY * LD A3,10,A8 CHANGED LIGHTS ANKL A3,/07FF BITS 5-15 CONTROLS LIGHTS * LDR A4,A7 COPY ORDER IFT WRFLA=1 CCK A4,/3939 RF(E) SOPFL XIF SUK A4,/37 RF(Z) SOPON IF SO, TURN ON LIGHTS * SUK A4,1 SEE IF LIGHTS OFF ORDER RF(Z) SOPOFF SOPER ABL(NZ) DISIOE ILLEGAL ORDER IFT WRFLA=1 EJECT * * * FLASH LIGHTS * * SOPFL EQU * LD A4,DWTTP,A6 RF(NE) FL010 TIMER ALREADY STARTED LDK A4,DWTTP ADR A4,A6 LDR A1,A6 CF A15,SETIMP DATA FLTUT,TIME ST A4,DWTTP,A6 LDKL A1,/FFBF ANS A1,DWTST,A6 SET ON FLAG FL010 EQU * * A3 CONTAINS LIGHTS THAT SHOULD FLASH ORS A3,FLASH STORE NEW LAMPS TO FLASH FL015 LD A1,DWTST,A6 ANK A1,/40 RF(Z) FL020 ORS A3,SPDLCI FIXA TILL DET HELA! RF SOPONOFF FL020 EQU * C1R A3,A3 ANS A3,SPDLCI RF SOPONOF * EJECT * FLTUT EQU * FLASH TIME OUT LDKL A6,DWSO01 LD A3,FLASH RF(Z) FL030 NO MORE FLASHING FOR THIS TIME LDKL A1,-TIME RESTART TIMER ST* A1,DWTTP,A6 LDK A1,/40 XRS A1,DWTST,A6 RB FL015 FL030 CM DWTTP,A6 RF EXIT END I/O XIF EJECT * SOPOFF EQU * C1R A3,A3 GET COMPLEMENTED CONTROL WORD ANS A3,SPDLCI MASK OUT LIGHTS TO BE TURNED OFF IFT WRFLA=1 ANS A3,FLASH STOP SOME FLASHING XIF RF SOPONOF BRANCH TO COMMON ON/OFF PATH * * * TURN ON LIGHTS INDICATED BY '1' BITS: * SOPON EQU * * A3 CONTAINS CONTROL WORD ORS A3,SPDLCI SET LIGHTS TO BE TURNED ON IFT WRFLA=1 C1R A3,A3 ANS A3,FLASH STOP SOME OTHER FLASHING XIF * * COMMON ON/OFF PATH: * SOPONOFF LD A1,SPDLCI GET LIGHTS' CORE IMAGE OTR A1,0,SOPDA AND OUTPUT TO S.O.P. * RF ENDIO PERFORM TENDIO EJECT * **************************** * * * S.O.P. INTERRUPT HANDLER * * * **************************** * * * THE INTERRUPT HANDLER WILL TAKE CARE OF ALL INTERRUPTS. * * IF NO REQUEST IS IN PROCEEDING THE INTERRUPT IS IGNORED. * IHSOP EQU * IFT CPU852=1 CF A15,SAVE8 SAVE A1-A8 ON STACK XIF * IFT CPU852=0 MSR 8,A15 SAVE A1-A8 ON STACK XIF * ST P,INTSAV SAVE LAST INTERRUPT INR A1,0,SOPDA GET SWITCH SRN A1,A2 CALC INDEX ADK A2,1 IHSOP1 EQU * IFF SOPX=0 LDKL A6,DWSI02 ANY REQUEST ON LD A4,DWTST,A6 STATUS WORD RF(N) IHSOP2 NO LD A8,DWTECB,A6 GET ECB-ADDRESS ST A2,ECBCW,A8 STORE INDEX CM ECBEL,A8 RESET EFFECTIVE LENGTH LDK A1,0 CF A15,TENDIO END I/O XIF IHSOP2 LDKL A6,DWSI01 ANY REQUEST ON LD A4,DWTST,A6 STATUS WORD RF(N) EXIT NO LD A8,DWTECB,A6 GET ECB-ADDRESS IHSOP3 ST A2,ECBCW,A8 STORE INDEX ENDIO CM ECBEL,A8 RESET EFFECTIVE LENGTH LDK A1,0 CF A15,TENDIO END I/O EXIT ABL TDISP GO TO DISPATCHER EJECT * ************************************* * * * S.O.P POWER UP RECOVERY ROUTINE * * * ************************************* * * * THIS ROUTINE IS A SUBROUTINE TO THE POWER FAILURE * RECOVERY ROUTINE (PFAR). IT'S ENTRY POINT SHOULD * BE PRESENT IN THE POWER FAILURE RECOVERY TABLE (PFTAB). * IF RUNNING READ REQUEST THIS IS COMPLETED WITH -2 IN * CONTROL WORD. ELSE -2 IS SAVED IN DWTCHP * * SOPR EQU * ENTRY POINT IFT CPU852=1 CF A15,SAVE8 SAVE A1-A8 ON STACK XIF * IFT CPU852=0 MSR 8,A15 SAVE A1-A8 ON STACK XIF * CIO A1,1,SOPDA ACTIVATE INPUT * LD A1,SPDLCI GET LIGHTS' CORE IMAGE OTR A1,0,SOPDA AND OUTPUT TO THE LIGHTS * LDK A2,0 IFF SOPX=0 LDKL A6,DWSI02 ANY REQUEST ON LD A4,DWTST,A6 GET STATUS WORD RF(NN) SOPR1 YES STR A2,A6 IND POWER UP XIF SOPR1 LDKL A6,DWSI01 ANY REQUEST ON LD A4,DWTST,A6 STATUS WORD RF(NN) SOPR2 YES STR A2,A6 IND POWER UP SOPR2 RB IHSOP1 EJECT * * D W S I 0 1 : INPUT DWT * DWSI01 EQU * DATA 0 CHANNEL PARAMETER: POWER UP IND DATA /8000 /8000 MEANS DEVICE IS READY DATA 0 ECB ADDRESS DATA 0 ORDER DATA SOPADI DATA 0 DATA 0 DATA 0 TERMINAL QUEUE IFT MMUPAG=1 DATA 0 SAVE AREA USER ECB ADDRESS DATA DEVECI MMU ECB ADDRESS DEVECI EQU * DATA 0,0,0,0,0,0 XIF * * D W S O 0 1 : OUTPUT DWT * * DWSO01 EQU * DATA /0040 CHANNEL PARAMETER DATA /8000 /8000 MEANS DEVICE IS READY DATA 0 ECB ADDRESS DATA 0 ORDER DATA SOPADU POINTER TO ADDRESS BLOCK DATA 0 TTAB-ADDRESS DATA 0 WAIT/ACTIVATE INDICATOR DATA 0 TERMINAL QUEUE IFT MMUPAG=1 DATA 0 SAVE AREA USER ECB ADDRESS DATA DEVECO MMU ECB ADDRESS XIF DATA 0 TIMER POINTER FLASH DATA 0 SAVE AREA FOR FLASHING LAMPS IFT MMUPAG=1 DEVECO EQU * DATA 0,0,0,0,0,0 XIF EJECT * * D W S I 0 2 : EXTENDED INPUT DWT * DWSI02 EQU * IFF SOPX=0 DATA 0 DATA /8000 DATA 0 ECB ADDRESS DATA 0 ORDER DATA SOPADI DATA 0,0,0 IFT MMUPAG=1 DATA 0 SAVE AREA USER ECB ADDRESS DATA DEVEC1 MMU ECB ADDRESS DEVEC1 EQU * DATA 0,0,0,0,0,0 XIF * * * END
0x0000…0036 (0, 0, 398) Head {h00=0x0032, h01=0x0050, text=» IDENT DRSOP1 REL 11.0 81-01-26 870105041100 «, t00=0x0000, t01=0x0004}
0x0036…003e Head {h00=0x0004, h01=0x0050, t00=0x0000, t01=0x003a}
0x003e…0048 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x0042}
0x0048…0052 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x004c}
0x0052…0096 Head {h00=0x0040, h01=0x0050, text=»************************************************************«, t00=0x0000, t01=0x0056}
0x0096…00a0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x009a}
0x00a0…00c8 Head {h00=0x0024, h01=0x0050, text=»* PHILIPS TERMINAL SYSTEM PTS «, t00=0x0000, t01=0x00a4}
0x00c8…00d2 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x00cc}
0x00d2…0108 Head {h00=0x0032, h01=0x0050, text=»* DRSOP1 = DRIVER FOR SYSTEM OPERATORS PANEL«, t00=0x0000, t01=0x00d6}
0x0108…0112 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x010c}
0x0112…011c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x0116}
0x011c…0126 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x0120}
0x0126…0130 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x012a}
0x0130…013a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x0134}
0x013a…0144 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x013e}
0x0144…0188 Head {h00=0x0040, h01=0x0050, text=»************************************************************«, t00=0x0000, t01=0x0148}
0x0188…0192 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0000, t01=0x018c}
0x0192…019c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0001, t01=0x0008}
0x019c…01e2 Head {h00=0x0042, h01=0x0050, text=»* THIS DRIVER HANDLES INPUT AND OUTPUT ON SYSTEM OPERATOR'S «, t00=0x0001, t01=0x0012}
0x01e2…0212 Head {h00=0x002c, h01=0x0050, text=»* PANEL CONNECTED TO CPU VIA CHCR-SOP «, t00=0x0001, t01=0x0058}
0x0212…021c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0001, t01=0x0088}
0x021c…0226 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0001, t01=0x0092}
0x0226…0268 Head {h00=0x003e, h01=0x0050, text=»* ON AN INPUT REQUEST THE DEVICE SOFTWARE STATUS IS SET «, t00=0x0001, t01=0x009c}
0x0268…02a6 Head {h00=0x003a, h01=0x0050, text=»* 'BUSY' UNTIL THE INPUT INTERRUPT IS TAKEN CARE OF «, t00=0x0001, t01=0x00de}
0x02a6…02b0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0001, t01=0x011c}
0x02b0…02ba Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0001, t01=0x0126}
0x02ba…02fc Head {h00=0x003e, h01=0x0050, text=»* AT POWER UP RUNNING READ REQUEST IS COMPLETED WITH -2 «, t00=0x0001, t01=0x0130}
0x02fc…033c Head {h00=0x003c, h01=0x0050, text=»* IN CONTROL WORD.IF NO RUNNING READ REQUEST,POWER UP «, t00=0x0001, t01=0x0172}
0x033c…037e Head {h00=0x003e, h01=0x0050, text=»* IS INDICATED AND NEXT READ REQUEST IS TERMINATED WITH «, t00=0x0002, t01=0x0022}
0x037e…039c Head {h00=0x001a, h01=0x0050, text=»* -2 IN CONTROL WORD«, t00=0x0002, t01=0x0064}
0x039c…03a6 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0002, t01=0x0082}
0x03a6…03b0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0002, t01=0x008c}
0x03b0…03f2 Head {h00=0x003e, h01=0x0050, text=»* ON AN OUTPUT REQUEST THE DEVICE SOFTWARE STATUS IS SET«, t00=0x0002, t01=0x0096}
0x03f2…0434 Head {h00=0x003e, h01=0x0050, text=»* 'READY' IMMEDIATELY, SINCE THE OUTPUT DOES NOT REQUIRE«, t00=0x0002, t01=0x00d8}
0x0434…044e Head {h00=0x0016, h01=0x0050, text=»* AN INTERRUPT. «, t00=0x0002, t01=0x011a}
0x044e…0458 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0002, t01=0x0134}
0x0458…0466 Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0002, t01=0x013e}
0x0466…0470 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0002, t01=0x014c}
0x0470…047a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0002, t01=0x0156}
0x047a…04b2 Head {h00=0x0034, h01=0x0050, text=»* THE DRIVER CONSISTS OF THE FOLLOWING PARTS: «, t00=0x0002, t01=0x0160}
0x04b2…04bc Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x0008}
0x04bc…04e8 Head {h00=0x0028, h01=0x0050, text=»* S O P A S : READ SWITCHES ENTRY «, t00=0x0003, t01=0x0012}
0x04e8…04f2 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x003e}
0x04f2…0520 Head {h00=0x002a, h01=0x0050, text=»* S O P A L : ACTIVATE LIGHTS ENTRY «, t00=0x0003, t01=0x0048}
0x0520…052a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x0076}
0x052a…0554 Head {h00=0x0026, h01=0x0050, text=»* I H S O P : INTERRUPT HANDLER «, t00=0x0003, t01=0x0080}
0x0554…055e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x00aa}
0x055e…0584 Head {h00=0x0022, h01=0x0050, text=»* S O P R : RECOVERY ROUTINE«, t00=0x0003, t01=0x00b4}
0x0584…058e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x00da}
0x058e…0598 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x00e4}
0x0598…05a2 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x00ee}
0x05a2…05d0 Head {h00=0x002a, h01=0x0050, text=»* THE FOLLOWING ORDERS ARE TREATED: «, t00=0x0003, t01=0x00f8}
0x05d0…05da Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0003, t01=0x0126}
0x05da…05fe Head {h00=0x0020, h01=0x0050, text=»* ORDER 02 : READ SWITCHES«, t00=0x0003, t01=0x0130}
0x05fe…0624 Head {h00=0x0022, h01=0x0050, text=»* 05 : WRITE LIGHTS ON«, t00=0x0003, t01=0x0154}
0x0624…064c Head {h00=0x0024, h01=0x0050, text=»* 06 : WRITE LIGHTS OFF «, t00=0x0003, t01=0x017a}
0x064c…067c Head {h00=0x002c, h01=0x0050, text=»* 39 : WRITE FLASHING LIGHTS «, t00=0x0004, t01=0x0012}
0x067c…0686 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0004, t01=0x0042}
0x0686…06a8 Head {h00=0x001e, h01=0x0050, text=»* NORMAL REGISTER USAGE:«, t00=0x0004, t01=0x004c}
0x06a8…06b2 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0004, t01=0x006e}
0x06b2…06d8 Head {h00=0x0022, h01=0x0050, text=»* REGISTER A1: INPUT/OUTPUT «, t00=0x0004, t01=0x0078}
0x06d8…06fe Head {h00=0x0022, h01=0x0050, text=»* A2: WORK REGISTER«, t00=0x0004, t01=0x009e}
0x06fe…0724 Head {h00=0x0022, h01=0x0050, text=»* A3: WORK REGISTER«, t00=0x0004, t01=0x00c4}
0x0724…074a Head {h00=0x0022, h01=0x0050, text=»* A4: WORK REGISTER«, t00=0x0004, t01=0x00ea}
0x074a…076a Head {h00=0x001c, h01=0x0050, text=»* A5: ----«, t00=0x0004, t01=0x0110}
0x076a…078e Head {h00=0x0020, h01=0x0050, text=»* A6: DWT-ADDRESS«, t00=0x0004, t01=0x0130}
0x078e…07ac Head {h00=0x001a, h01=0x0050, text=»* A7: ORDER«, t00=0x0004, t01=0x0154}
0x07ac…07d0 Head {h00=0x0020, h01=0x0050, text=»* A8: ECB-ADDRESS«, t00=0x0004, t01=0x0172}
0x07d0…07da Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0005, t01=0x0008}
0x07da…07e4 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0005, t01=0x0012}
0x07e4…07f2 Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0005, t01=0x001c}
0x07f2…07fc Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0005, t01=0x002a}
0x07fc…0810 Head {h00=0x0010, h01=0x0050, text=»************«, t00=0x0005, t01=0x0034}
0x0810…0824 Head {h00=0x0010, h01=0x0050, text=»* ENTRIES: *«, t00=0x0005, t01=0x0048}
0x0824…0838 Head {h00=0x0010, h01=0x0050, text=»************«, t00=0x0005, t01=0x005c}
0x0838…0842 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0005, t01=0x0070}
0x0842…084c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0005, t01=0x007a}
0x084c…087a Head {h00=0x002a, h01=0x0050, text=» ENTRY SOPCT S.O.P. CHANNEL UNIT TABLE«, t00=0x0005, t01=0x0084}
0x087a…08a6 Head {h00=0x0028, h01=0x0050, text=» ENTRY SOPR S.O.P. RECOVERY ROUTINE «, t00=0x0005, t01=0x00b2}
0x08a6…08dc Head {h00=0x0032, h01=0x0050, text=» ENTRY IHSOP S.O.P. INTERRUPT HANDLER (ALIAS) «, t00=0x0005, t01=0x00de}
0x08dc…08fc Head {h00=0x001c, h01=0x0050, text=» ENTRY DWSI01 INPUT DWT «, t00=0x0005, t01=0x0114}
0x08fc…0924 Head {h00=0x0024, h01=0x0050, text=» ENTRY DWSI02 EXTENDED INPUT DWT«, t00=0x0005, t01=0x0134}
0x0924…0944 Head {h00=0x001c, h01=0x0050, text=» ENTRY DWSO01 OUTPUT DWT«, t00=0x0005, t01=0x015c}
0x0944…094e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0005, t01=0x017c}
0x094e…0964 Head {h00=0x0012, h01=0x0050, text=»**************«, t00=0x0005, t01=0x0186}
0x0964…097a Head {h00=0x0012, h01=0x0050, text=»* EXTERNALS: *«, t00=0x0006, t01=0x000c}
0x097a…0990 Head {h00=0x0012, h01=0x0050, text=»**************«, t00=0x0006, t01=0x0022}
0x0990…099a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0006, t01=0x0038}
0x099a…09b2 Head {h00=0x0014, h01=0x0050, text=»* TOSS GLOBALS:«, t00=0x0006, t01=0x0042}
0x09b2…09bc Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0006, t01=0x005a}
0x09bc…09ec Head {h00=0x002c, h01=0x0050, text=» EXTRN SAVE8 PUSH REGS A1-A8 ONTO STACK «, t00=0x0006, t01=0x0064}
0x09ec…0a24 Head {h00=0x0034, h01=0x0050, text=» EXTRN DISIOE DISPATCHER I/O REQUEST ERROR ENTRY«, t00=0x0006, t01=0x0094}
0x0a24…0a4e Head {h00=0x0026, h01=0x0050, text=» EXTRN TDISP DISPATCHER LKM ENTRY «, t00=0x0006, t01=0x00cc}
0x0a4e…0a80 Head {h00=0x002e, h01=0x0050, text=» EXTRN RETUR8 POP A1-A8 CONT'S AND RETURN «, t00=0x0006, t01=0x00f6}
0x0a80…0ac6 Head {h00=0x0042, h01=0x0050, text=» EXTRN TENDIO END-OF-I/O HOUSEKEEPING AND QUEUEING SUBROUTINE «, t00=0x0006, t01=0x0128}
0x0ac6…0adc Head {h00=0x0012, h01=0x0050, text=» EXTRN SETIMP «, t00=0x0006, t01=0x016e}
0x0adc…0b0e Head {h00=0x002e, h01=0x0050, text=» EXTRN SPDLCI DATA SOP LIGHTS AND FD POWER«, t00=0x0006, t01=0x0184}
0x0b0e…0b1c Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0007, t01=0x0026}
0x0b1c…0b24 Head {h00=0x0004, h01=0x0050, t00=0x0007, t01=0x0034}
0x0b24…0b2e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0007, t01=0x003c}
0x0b2e…0b5a Head {h00=0x0028, h01=0x0050, text=»************************************«, t00=0x0007, t01=0x0046}
0x0b5a…0b64 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0007, t01=0x0072}
0x0b64…0b82 Head {h00=0x001a, h01=0x0050, text=»* DWT DISPLACEMENTS «, t00=0x0007, t01=0x007c}
0x0b82…0b8c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0007, t01=0x009a}
0x0b8c…0bb8 Head {h00=0x0028, h01=0x0050, text=»************************************«, t00=0x0007, t01=0x00a4}
0x0bb8…0bc2 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0007, t01=0x00d0}
0x0bc2…0bea Head {h00=0x0024, h01=0x001f, text=» EXTRN DWTCHP CHANNEL PARAMETER «, t00=0x0007, t01=0x00da}
0x0bea…0c06 Head {h00=0x0018, h01=0x0013, text=» EXTRN DWTST STATUS «, t00=0x0007, t01=0x0102}
0x0c06…0c28 Head {h00=0x001e, h01=0x0019, text=» EXTRN DWTECB ECB ADDRESS «, t00=0x0007, t01=0x011e}
0x0c28…0c50 Head {h00=0x0024, h01=0x0020, text=» EXTRN DWTOR DWT INDEX AND ORDER«, t00=0x0007, t01=0x0140}
0x0c50…0c7a Head {h00=0x0026, h01=0x0022, text=» EXTRN DWTADR DRIVER ADDRESS BLOCK«, t00=0x0007, t01=0x0168}
0x0c7a…0c9c (8, 0, 400) Head {h00=0x001e, h01=0x001a, text=» EXTRN DWTTAB TTAB ADDRESS«, t00=0x0008, t01=0x0004}
0x0c9c…0cca Head {h00=0x002a, h01=0x0025, text=» EXTRN DWTWAT WAIT/ACTIVATE INDICATOR «, t00=0x0008, t01=0x0026}
0x0cca…0cee Head {h00=0x0020, h01=0x001b, text=» EXTRN DWTTQ TERMINAL QUEUE «, t00=0x0008, t01=0x0054}
0x0cee…0d20 Head {h00=0x002e, h01=0x0050, text=» EXTRN INTSAV SAVE AREA FOR LAST INTERRUPT«, t00=0x0008, t01=0x0078}
0x0d20…0d4c Head {h00=0x0028, h01=0x0050, text=» EXTRN ECBEL EFFECTIVE LENGTH IN ECB«, t00=0x0008, t01=0x00aa}
0x0d4c…0d72 Head {h00=0x0022, h01=0x0050, text=» EXTRN ECBCW ECB CONTROL WORD «, t00=0x0008, t01=0x00d6}
0x0d72…0d90 Head {h00=0x001a, h01=0x0050, text=»TIME EQU 5 FLASH TIME «, t00=0x0008, t01=0x00fc}
0x0d90…0d9e Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0008, t01=0x011a}
0x0d9e…0dbc Head {h00=0x001a, h01=0x0050, text=»* CONDITIONAL ASSEMBLY«, t00=0x0008, t01=0x0128}
0x0dbc…0de4 Head {h00=0x0024, h01=0x0050, text=»* EXTENDED SOP INPUT DWT OR NOT «, t00=0x0008, t01=0x0146}
0x0de4…0e04 Head {h00=0x001c, h01=0x0050, text=»* SOPX=0 => NOT EXTENDED«, t00=0x0008, t01=0x016e}
0x0e04…0e0e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0008, t01=0x018e}
0x0e0e…0e16 Head {h00=0x0004, h01=0x0050, t00=0x0009, t01=0x0008}
0x0e16…0e28 Head {h00=0x000e, h01=0x0050, text=»X:A EQU 0 «, t00=0x0009, t01=0x0010}
0x0e28…0e3c Head {h00=0x0010, h01=0x0050, text=»SOPX EQU X:A«, t00=0x0009, t01=0x0022}
0x0e3c…0e46 Head {h00=0x0006, h01=0x0050, text=»**«, t00=0x0009, t01=0x0036}
0x0e46…0e50 Head {h00=0x0006, h01=0x0050, text=»**«, t00=0x0009, t01=0x0040}
0x0e50…0e94 Head {h00=0x0040, h01=0x0050, text=»* THE ORDER /39, WRITE FLASHING LIGHTS CAN BE INCLUDED BY «, t00=0x0009, t01=0x004a}
0x0e94…0eae Head {h00=0x0016, h01=0x0050, text=»* SETTING X:B=1 «, t00=0x0009, t01=0x008e}
0x0eae…0eb8 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0009, t01=0x00a8}
0x0eb8…0eca Head {h00=0x000e, h01=0x0050, text=»X:B EQU 0 «, t00=0x0009, t01=0x00b2}
0x0eca…0ee0 Head {h00=0x0012, h01=0x0050, text=»WRFLA EQU X:B «, t00=0x0009, t01=0x00c4}
0x0ee0…0eea Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0009, t01=0x00da}
0x0eea…0ef4 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0009, t01=0x00e4}
0x0ef4…0f26 Head {h00=0x002e, h01=0x0050, text=»* A PROGRAM VERSION USING TOSS MMU PAGING «, t00=0x0009, t01=0x00ee}
0x0f26…0f54 Head {h00=0x002a, h01=0x0050, text=»* IS OBTAINED BY SETTING MMUPAG EQU 1.«, t00=0x0009, t01=0x0120}
0x0f54…0f5e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0009, t01=0x014e}
0x0f5e…0f72 Head {h00=0x0010, h01=0x0050, text=»MMUPAG EQU 0«, t00=0x0009, t01=0x0158}
0x0f72…0f7c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0009, t01=0x016c}
0x0f7c…0f86 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0009, t01=0x0176}
0x0f86…0fc0 Head {h00=0x0036, h01=0x0050, text=»* A PROGRAM VERSION USING THE EXTENDED INSTRUCTION«, t00=0x0009, t01=0x0180}
0x0fc0…0ff2 Head {h00=0x002e, h01=0x0050, text=»* SET IS OBTAINED BY SETTING CPU852 EQU 0.«, t00=0x000a, t01=0x002a}
0x0ff2…0ffc Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000a, t01=0x005c}
0x0ffc…1010 Head {h00=0x0010, h01=0x0050, text=»CPU852 EQU 1«, t00=0x000a, t01=0x0066}
0x1010…101a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000a, t01=0x007a}
0x101a…103e Head {h00=0x0020, h01=0x0050, text=»DVBLEN EQU 0 MMU BUFFER SIZE«, t00=0x000a, t01=0x0084}
0x103e…1064 Head {h00=0x0022, h01=0x0050, text=»DEVIND EQU -2 SOP DEVICE INDEX«, t00=0x000a, t01=0x00a8}
0x1064…106e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000a, t01=0x00ce}
0x106e…107c Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x000a, t01=0x00d8}
0x107c…1086 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000a, t01=0x00e6}
0x1086…1090 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000a, t01=0x00f0}
0x1090…10c4 Head {h00=0x0030, h01=0x0050, text=»DWTDRD EQU /10 START OF DRIVER DEFINED PART «, t00=0x000a, t01=0x00fa}
0x10c4…10ce Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000a, t01=0x012e}
0x10ce…10e4 Head {h00=0x0012, h01=0x0050, text=» IFT MMUPAG=0 «, t00=0x000a, t01=0x0138}
0x10e4…10fc Head {h00=0x0014, h01=0x0050, text=»START EQU DWTDRD«, t00=0x000a, t01=0x014e}
0x10fc…1108 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x000a, t01=0x0166}
0x1108…1112 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000a, t01=0x0172}
0x1112…1128 Head {h00=0x0012, h01=0x0050, text=» IFT MMUPAG=1 «, t00=0x000a, t01=0x017c}
0x1128…1142 (11, 0, 400) Head {h00=0x0016, h01=0x0050, text=»START EQU DWTDRD+4«, t00=0x000b, t01=0x0004}
0x1142…114e Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x000b, t01=0x001e}
0x114e…1158 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x002a}
0x1158…1182 Head {h00=0x0026, h01=0x0050, text=»DWTTP EQU START+/00 TIMER POINTER «, t00=0x000b, t01=0x0034}
0x1182…118c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x005e}
0x118c…119a Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x000b, t01=0x0068}
0x119a…11a4 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x0076}
0x11a4…11c6 Head {h00=0x001e, h01=0x0050, text=»**************************«, t00=0x000b, t01=0x0080}
0x11c6…11e8 Head {h00=0x001e, h01=0x0050, text=»* S.O.P. DEVICE ADDRESS: *«, t00=0x000b, t01=0x00a2}
0x11e8…120a Head {h00=0x001e, h01=0x0050, text=»**************************«, t00=0x000b, t01=0x00c4}
0x120a…1214 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x00e6}
0x1214…121e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x00f0}
0x121e…1242 Head {h00=0x0020, h01=0x0050, text=»SOPDA EQU /2E DEVICE ADDRESS«, t00=0x000b, t01=0x00fa}
0x1242…124c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x011e}
0x124c…1256 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x0128}
0x1256…1260 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000b, t01=0x0132}
0x1260…1286 Head {h00=0x0022, h01=0x0050, text=»******************************«, t00=0x000b, t01=0x013c}
0x1286…12ac Head {h00=0x0022, h01=0x0050, text=»* *«, t00=0x000b, t01=0x0162}
0x12ac…12d2 Head {h00=0x0022, h01=0x0050, text=»* S.O.P. CHANNEL UNIT TABLE *«, t00=0x000b, t01=0x0188}
0x12d2…12f8 Head {h00=0x0022, h01=0x0050, text=»* *«, t00=0x000c, t01=0x001e}
0x12f8…131e Head {h00=0x0022, h01=0x0050, text=»******************************«, t00=0x000c, t01=0x0044}
0x131e…1328 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000c, t01=0x006a}
0x1328…1332 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000c, t01=0x0074}
0x1332…1366 Head {h00=0x0030, h01=0x0050, text=»SOPCT EQU * TABLE STARTS WITH ADDRESS BLOCK:«, t00=0x000c, t01=0x007e}
0x1366…1370 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000c, t01=0x00b2}
0x1370…1394 Head {h00=0x0020, h01=0x0050, text=» DATA DVBLEN MMU BUFFER SIZE«, t00=0x000c, t01=0x00bc}
0x1394…13b6 Head {h00=0x001e, h01=0x0050, text=» DATA DEVIND DEVICE INDEX «, t00=0x000c, t01=0x00e0}
0x13b6…13f0 Head {h00=0x0036, h01=0x0050, text=»SOPADI EQU * INPUT ADDRESS BLOCK (FOR READ ORDERS)«, t00=0x000c, t01=0x0102}
0x13f0…13fa Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000c, t01=0x013c}
0x13fa…1426 Head {h00=0x0028, h01=0x0050, text=» DATA SOPAS ACTIVATE SWITCHES ENTRY «, t00=0x000c, t01=0x0146}
0x1426…144c Head {h00=0x0022, h01=0x0050, text=» DATA 0 ABORT ROUTINE ADDRESS «, t00=0x000c, t01=0x0172}
0x144c…1456 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000d, t01=0x0008}
0x1456…147a Head {h00=0x0020, h01=0x0050, text=» DATA DVBLEN MMU BUFFER SIZE«, t00=0x000d, t01=0x0012}
0x147a…149c Head {h00=0x001e, h01=0x0050, text=» DATA DEVIND DEVICE INDEX «, t00=0x000d, t01=0x0036}
0x149c…14c6 Head {h00=0x0026, h01=0x0050, text=»SOPADU EQU * ACTIVATE LIGHTS ENTRY«, t00=0x000d, t01=0x0058}
0x14c6…14d0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000d, t01=0x0082}
0x14d0…14fa Head {h00=0x0026, h01=0x0050, text=» DATA SOPAL ACTIVATE LIGHTS ENTRY «, t00=0x000d, t01=0x008c}
0x14fa…1520 Head {h00=0x0022, h01=0x0050, text=» DATA 0 ABORT ROUTINE ADDRESS «, t00=0x000d, t01=0x00b6}
0x1520…152a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000d, t01=0x00dc}
0x152a…154e Head {h00=0x0020, h01=0x0050, text=»* BIT 0 CONTROLS FD POWER «, t00=0x000d, t01=0x00e6}
0x154e…1568 Head {h00=0x0016, h01=0x0050, text=»* (0=ON, 1=OFF) «, t00=0x000d, t01=0x010a}
0x1568…1576 Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x000d, t01=0x0124}
0x1576…1580 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000d, t01=0x0132}
0x1580…15a6 Head {h00=0x0022, h01=0x0050, text=»******************************«, t00=0x000d, t01=0x013c}
0x15a6…15cc Head {h00=0x0022, h01=0x0050, text=»* *«, t00=0x000d, t01=0x0162}
0x15cc…15f2 Head {h00=0x0022, h01=0x0050, text=»* S.O.P. ACTIVATION ROUTINE: *«, t00=0x000d, t01=0x0188}
0x15f2…1618 Head {h00=0x0022, h01=0x0050, text=»* *«, t00=0x000e, t01=0x001e}
0x1618…163e Head {h00=0x0022, h01=0x0050, text=»******************************«, t00=0x000e, t01=0x0044}
0x163e…1648 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000e, t01=0x006a}
0x1648…168a Head {h00=0x003e, h01=0x0050, text=»* THE ORDER IS ANALYZED AND THE CORRESPONDING I/O ACTION«, t00=0x000e, t01=0x0074}
0x168a…16a6 Head {h00=0x0018, h01=0x0050, text=»* IS CARRIED OUT. «, t00=0x000e, t01=0x00b6}
0x16a6…16b0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000e, t01=0x00d2}
0x16b0…16de Head {h00=0x002a, h01=0x0050, text=»SOPAS EQU * SWITCHES ACTIVATION ENTRY «, t00=0x000e, t01=0x00dc}
0x16de…16e8 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000e, t01=0x010a}
0x16e8…1706 Head {h00=0x001a, h01=0x0050, text=» LDR A4,A7 COPY ORDER «, t00=0x000e, t01=0x0114}
0x1706…1710 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000e, t01=0x0132}
0x1710…1736 Head {h00=0x0022, h01=0x0050, text=» SUK A4,/02 SEE IF READ ORDER:«, t00=0x000e, t01=0x013c}
0x1736…1740 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000e, t01=0x0162}
0x1740…176e Head {h00=0x002a, h01=0x0050, text=» RF(NZ) SOPER ERROR IF NOT READ ORDER «, t00=0x000e, t01=0x016c}
0x176e…1778 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000f, t01=0x000a}
0x1778…1796 Head {h00=0x001a, h01=0x0050, text=»* INPUT SWITCH VALUE«, t00=0x000f, t01=0x0014}
0x1796…17a0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000f, t01=0x0032}
0x17a0…17ce Head {h00=0x002a, h01=0x0050, text=»SOPIN LDR* A2,A6 POWER UP INDICATION ?«, t00=0x000f, t01=0x003c}
0x17ce…17e6 Head {h00=0x0014, h01=0x0050, text=» RF(NZ) EXIT NO «, t00=0x000f, t01=0x006a}
0x17e6…17fc Head {h00=0x0012, h01=0x0050, text=» STR A7,A6 YES«, t00=0x000f, t01=0x0082}
0x17fc…180e Head {h00=0x000e, h01=0x0050, text=» RF IHSOP3«, t00=0x000f, t01=0x0098}
0x180e…1818 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000f, t01=0x00aa}
0x1818…1826 Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x000f, t01=0x00b4}
0x1826…1830 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000f, t01=0x00c2}
0x1830…1860 Head {h00=0x002c, h01=0x0050, text=»* ENTRY FOR CHANGES OF S.O.P. LIGHTS «, t00=0x000f, t01=0x00cc}
0x1860…186a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000f, t01=0x00fc}
0x186a…1894 Head {h00=0x0026, h01=0x0050, text=»SOPAL EQU * ACTIVATE LIGHTS ENTRY «, t00=0x000f, t01=0x0106}
0x1894…189e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000f, t01=0x0130}
0x189e…18c2 Head {h00=0x0020, h01=0x0050, text=» LD A3,10,A8 CHANGED LIGHTS «, t00=0x000f, t01=0x013a}
0x18c2…18f2 Head {h00=0x002c, h01=0x0050, text=» ANKL A3,/07FF BITS 5-15 CONTROLS LIGHTS«, t00=0x000f, t01=0x015e}
0x18f2…18fc Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x000f, t01=0x018e}
0x18fc…191a Head {h00=0x001a, h01=0x0050, text=» LDR A4,A7 COPY ORDER «, t00=0x0010, t01=0x0008}
0x191a…192e Head {h00=0x0010, h01=0x0050, text=» IFT WRFLA=1«, t00=0x0010, t01=0x0026}
0x192e…1944 Head {h00=0x0012, h01=0x0050, text=» CCK A4,/3939 «, t00=0x0010, t01=0x003a}
0x1944…1958 Head {h00=0x0010, h01=0x0050, text=» RF(E) SOPFL«, t00=0x0010, t01=0x0050}
0x1958…1964 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x0010, t01=0x0064}
0x1964…1978 Head {h00=0x0010, h01=0x0050, text=» SUK A4,/37 «, t00=0x0010, t01=0x0070}
0x1978…19a2 Head {h00=0x0026, h01=0x0050, text=» RF(Z) SOPON IF SO, TURN ON LIGHTS«, t00=0x0010, t01=0x0084}
0x19a2…19ac Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0010, t01=0x00ae}
0x19ac…19d6 Head {h00=0x0026, h01=0x0050, text=» SUK A4,1 SEE IF LIGHTS OFF ORDER «, t00=0x0010, t01=0x00b8}
0x19d6…19ec Head {h00=0x0012, h01=0x0050, text=» RF(Z) SOPOFF «, t00=0x0010, t01=0x00e2}
0x19ec…1a16 Head {h00=0x0026, h01=0x0050, text=»SOPER ABL(NZ) DISIOE ILLEGAL ORDER«, t00=0x0010, t01=0x00f8}
0x1a16…1a2a Head {h00=0x0010, h01=0x0050, text=» IFT WRFLA=1«, t00=0x0010, t01=0x0122}
0x1a2a…1a38 Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0010, t01=0x0136}
0x1a38…1a42 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0010, t01=0x0144}
0x1a42…1a4c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0010, t01=0x014e}
0x1a4c…1a66 Head {h00=0x0016, h01=0x0050, text=»* FLASH LIGHTS«, t00=0x0010, t01=0x0158}
0x1a66…1a70 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0010, t01=0x0172}
0x1a70…1a7a Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0010, t01=0x017c}
0x1a7a…1a8e Head {h00=0x0010, h01=0x0050, text=»SOPFL EQU * «, t00=0x0010, t01=0x0186}
0x1a8e…1aa6 Head {h00=0x0014, h01=0x0050, text=» LD A4,DWTTP,A6 «, t00=0x0011, t01=0x000a}
0x1aa6…1ad2 Head {h00=0x0028, h01=0x0050, text=» RF(NE) FL010 TIMER ALREADY STARTED «, t00=0x0011, t01=0x0022}
0x1ad2…1ae8 Head {h00=0x0012, h01=0x0050, text=» LDK A4,DWTTP «, t00=0x0011, t01=0x004e}
0x1ae8…1afa Head {h00=0x000e, h01=0x0050, text=» ADR A4,A6«, t00=0x0011, t01=0x0064}
0x1afa…1b0c Head {h00=0x000e, h01=0x0050, text=» LDR A1,A6«, t00=0x0011, t01=0x0076}
0x1b0c…1b22 Head {h00=0x0012, h01=0x0050, text=» CF A15,SETIMP«, t00=0x0011, t01=0x0088}
0x1b22…1b3a Head {h00=0x0014, h01=0x0050, text=» DATA FLTUT,TIME«, t00=0x0011, t01=0x009e}
0x1b3a…1b52 Head {h00=0x0014, h01=0x0050, text=» ST A4,DWTTP,A6 «, t00=0x0011, t01=0x00b6}
0x1b52…1b68 Head {h00=0x0012, h01=0x0050, text=» LDKL A1,/FFBF«, t00=0x0011, t01=0x00ce}
0x1b68…1b8c Head {h00=0x0020, h01=0x0050, text=» ANS A1,DWTST,A6 SET ON FLAG«, t00=0x0011, t01=0x00e4}
0x1b8c…1ba0 Head {h00=0x0010, h01=0x0050, text=»FL010 EQU * «, t00=0x0011, t01=0x0108}
0x1ba0…1bd2 Head {h00=0x002e, h01=0x0050, text=»* A3 CONTAINS LIGHTS THAT SHOULD FLASH «, t00=0x0011, t01=0x011c}
0x1bd2…1c00 Head {h00=0x002a, h01=0x0050, text=» ORS A3,FLASH STORE NEW LAMPS TO FLASH«, t00=0x0011, t01=0x014e}
0x1c00…1c1c Head {h00=0x0018, h01=0x0050, text=»FL015 LD A1,DWTST,A6«, t00=0x0011, t01=0x017c}
0x1c1c…1c30 Head {h00=0x0010, h01=0x0050, text=» ANK A1,/40 «, t00=0x0012, t01=0x0008}
0x1c30…1c44 Head {h00=0x0010, h01=0x0050, text=» RF(Z) FL020«, t00=0x0012, t01=0x001c}
0x1c44…1c6e Head {h00=0x0026, h01=0x0050, text=» ORS A3,SPDLCI FIXA TILL DET HELA!«, t00=0x0012, t01=0x0030}
0x1c6e…1c82 Head {h00=0x0010, h01=0x0050, text=» RF SOPONOFF«, t00=0x0012, t01=0x005a}
0x1c82…1c96 Head {h00=0x0010, h01=0x0050, text=»FL020 EQU * «, t00=0x0012, t01=0x006e}
0x1c96…1ca8 Head {h00=0x000e, h01=0x0050, text=» C1R A3,A3«, t00=0x0012, t01=0x0082}
0x1ca8…1cbe Head {h00=0x0012, h01=0x0050, text=» ANS A3,SPDLCI«, t00=0x0012, t01=0x0094}
0x1cbe…1cd2 Head {h00=0x0010, h01=0x0050, text=» RF SOPONOF «, t00=0x0012, t01=0x00aa}
0x1cd2…1cdc Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0012, t01=0x00be}
0x1cdc…1cea Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0012, t01=0x00c8}
0x1cea…1cf4 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0012, t01=0x00d6}
0x1cf4…1d16 Head {h00=0x001e, h01=0x0050, text=»FLTUT EQU * FLASH TIME OUT«, t00=0x0012, t01=0x00e0}
0x1d16…1d2e Head {h00=0x0014, h01=0x0050, text=» LDKL A6,DWSO01 «, t00=0x0012, t01=0x0102}
0x1d2e…1d42 Head {h00=0x0010, h01=0x0050, text=» LD A3,FLASH«, t00=0x0012, t01=0x011a}
0x1d42…1d76 Head {h00=0x0030, h01=0x0050, text=» RF(Z) FL030 NO MORE FLASHING FOR THIS TIME «, t00=0x0012, t01=0x012e}
0x1d76…1d9a Head {h00=0x0020, h01=0x0050, text=» LDKL A1,-TIME RESTART TIMER«, t00=0x0012, t01=0x0162}
0x1d9a…1db2 Head {h00=0x0014, h01=0x0050, text=» ST* A1,DWTTP,A6«, t00=0x0012, t01=0x0186}
0x1db2…1dc6 Head {h00=0x0010, h01=0x0050, text=» LDK A1,/40 «, t00=0x0013, t01=0x000e}
0x1dc6…1dde Head {h00=0x0014, h01=0x0050, text=» XRS A1,DWTST,A6«, t00=0x0013, t01=0x0022}
0x1dde…1df0 Head {h00=0x000e, h01=0x0050, text=» RB FL015 «, t00=0x0013, t01=0x003a}
0x1df0…1e0a Head {h00=0x0016, h01=0x0050, text=»FL030 CM DWTTP,A6 «, t00=0x0013, t01=0x004c}
0x1e0a…1e22 Head {h00=0x0014, h01=0x0050, text=» RF EXIT END I/O«, t00=0x0013, t01=0x0066}
0x1e22…1e2e Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x0013, t01=0x007e}
0x1e2e…1e3c Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0013, t01=0x008a}
0x1e3c…1e46 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0013, t01=0x0098}
0x1e46…1e5a Head {h00=0x0010, h01=0x0050, text=»SOPOFF EQU *«, t00=0x0013, t01=0x00a2}
0x1e5a…1e8a Head {h00=0x002c, h01=0x0050, text=» C1R A3,A3 GET COMPLEMENTED CONTROL WORD«, t00=0x0013, t01=0x00b6}
0x1e8a…1ec2 Head {h00=0x0034, h01=0x0050, text=» ANS A3,SPDLCI MASK OUT LIGHTS TO BE TURNED OFF «, t00=0x0013, t01=0x00e6}
0x1ec2…1ed6 Head {h00=0x0010, h01=0x0050, text=» IFT WRFLA=1«, t00=0x0013, t01=0x011e}
0x1ed6…1efe Head {h00=0x0024, h01=0x0050, text=» ANS A3,FLASH STOP SOME FLASHING«, t00=0x0013, t01=0x0132}
0x1efe…1f0a Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x0013, t01=0x015a}
0x1f0a…1f3a Head {h00=0x002c, h01=0x0050, text=» RF SOPONOF BRANCH TO COMMON ON/OFF PATH«, t00=0x0013, t01=0x0166}
0x1f3a…1f44 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0014, t01=0x0008}
0x1f44…1f4e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0014, t01=0x0012}
0x1f4e…1f7e Head {h00=0x002c, h01=0x0050, text=»* TURN ON LIGHTS INDICATED BY '1' BITS:«, t00=0x0014, t01=0x001c}
0x1f7e…1f88 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0014, t01=0x004c}
0x1f88…1f9c Head {h00=0x0010, h01=0x0050, text=»SOPON EQU * «, t00=0x0014, t01=0x0056}
0x1f9c…1fc2 Head {h00=0x0022, h01=0x0050, text=»* A3 CONTAINS CONTROL WORD «, t00=0x0014, t01=0x006a}
0x1fc2…1ff4 Head {h00=0x002e, h01=0x0050, text=» ORS A3,SPDLCI SET LIGHTS TO BE TURNED ON «, t00=0x0014, t01=0x0090}
0x1ff4…2008 Head {h00=0x0010, h01=0x0050, text=» IFT WRFLA=1«, t00=0x0014, t01=0x00c2}
0x2008…201a Head {h00=0x000e, h01=0x0050, text=» C1R A3,A3«, t00=0x0014, t01=0x00d6}
0x201a…2048 Head {h00=0x002a, h01=0x0050, text=» ANS A3,FLASH STOP SOME OTHER FLASHING«, t00=0x0014, t01=0x00e8}
0x2048…2054 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x0014, t01=0x0116}
0x2054…205e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0014, t01=0x0122}
0x205e…207c Head {h00=0x001a, h01=0x0050, text=»* COMMON ON/OFF PATH:«, t00=0x0014, t01=0x012c}
0x207c…2086 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0014, t01=0x014a}
0x2086…20ba Head {h00=0x0030, h01=0x0050, text=»SOPONOFF LD A1,SPDLCI GET LIGHTS' CORE IMAGE«, t00=0x0014, t01=0x0154}
0x20ba…20e6 Head {h00=0x0028, h01=0x0050, text=» OTR A1,0,SOPDA AND OUTPUT TO S.O.P.«, t00=0x0014, t01=0x0188}
0x20e6…20f0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0015, t01=0x0024}
0x20f0…2110 Head {h00=0x001c, h01=0x0050, text=» RF ENDIO PERFORM TENDIO«, t00=0x0015, t01=0x002e}
0x2110…211e Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0015, t01=0x004e}
0x211e…2128 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0015, t01=0x005c}
0x2128…214c Head {h00=0x0020, h01=0x0050, text=»****************************«, t00=0x0015, t01=0x0066}
0x214c…2170 Head {h00=0x0020, h01=0x0050, text=»* *«, t00=0x0015, t01=0x008a}
0x2170…2194 Head {h00=0x0020, h01=0x0050, text=»* S.O.P. INTERRUPT HANDLER *«, t00=0x0015, t01=0x00ae}
0x2194…21b8 Head {h00=0x0020, h01=0x0050, text=»* *«, t00=0x0015, t01=0x00d2}
0x21b8…21dc Head {h00=0x0020, h01=0x0050, text=»****************************«, t00=0x0015, t01=0x00f6}
0x21dc…21e6 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0015, t01=0x011a}
0x21e6…21f0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0015, t01=0x0124}
0x21f0…2234 Head {h00=0x0040, h01=0x0050, text=»* THE INTERRUPT HANDLER WILL TAKE CARE OF ALL INTERRUPTS. «, t00=0x0015, t01=0x012e}
0x2234…223e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0015, t01=0x0172}
0x223e…2282 Head {h00=0x0040, h01=0x0050, text=»* IF NO REQUEST IS IN PROCEEDING THE INTERRUPT IS IGNORED.«, t00=0x0015, t01=0x017c}
0x2282…228c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0016, t01=0x0030}
0x228c…2294 Head {h00=0x0004, h01=0x0050, t00=0x0016, t01=0x003a}
0x2294…22a8 Head {h00=0x0010, h01=0x0050, text=»IHSOP EQU * «, t00=0x0016, t01=0x0042}
0x22a8…22be Head {h00=0x0012, h01=0x0050, text=» IFT CPU852=1 «, t00=0x0016, t01=0x0056}
0x22be…22e8 Head {h00=0x0026, h01=0x0050, text=» CF A15,SAVE8 SAVE A1-A8 ON STACK «, t00=0x0016, t01=0x006c}
0x22e8…22f4 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x0016, t01=0x0096}
0x22f4…22fe Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0016, t01=0x00a2}
0x22fe…2314 Head {h00=0x0012, h01=0x0050, text=» IFT CPU852=0 «, t00=0x0016, t01=0x00ac}
0x2314…233a Head {h00=0x0022, h01=0x0050, text=» MSR 8,A15 SAVE A1-A8 ON STACK«, t00=0x0016, t01=0x00c2}
0x233a…2346 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x0016, t01=0x00e8}
0x2346…2350 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0016, t01=0x00f4}
0x2350…2378 Head {h00=0x0024, h01=0x0050, text=» ST P,INTSAV SAVE LAST INTERRUPT«, t00=0x0016, t01=0x00fe}
0x2378…239a Head {h00=0x001e, h01=0x0050, text=» INR A1,0,SOPDA GET SWITCH«, t00=0x0016, t01=0x0126}
0x239a…23b8 Head {h00=0x001a, h01=0x0050, text=» SRN A1,A2 CALC INDEX «, t00=0x0016, t01=0x0148}
0x23b8…23ca Head {h00=0x000e, h01=0x0050, text=» ADK A2,1 «, t00=0x0016, t01=0x0166}
0x23ca…23d2 Head {h00=0x0004, h01=0x0050, t00=0x0016, t01=0x0178}
0x23d2…23e6 Head {h00=0x0010, h01=0x0050, text=»IHSOP1 EQU *«, t00=0x0016, t01=0x0180}
0x23e6…23fa (23, 0, 400) Head {h00=0x0010, h01=0x0050, text=» IFF SOPX=0 «, t00=0x0017, t01=0x0004}
0x23fa…2420 Head {h00=0x0022, h01=0x0050, text=» LDKL A6,DWSI02 ANY REQUEST ON«, t00=0x0017, t01=0x0018}
0x2420…2444 Head {h00=0x0020, h01=0x0050, text=» LD A4,DWTST,A6 STATUS WORD «, t00=0x0017, t01=0x003e}
0x2444…245c Head {h00=0x0014, h01=0x0050, text=» RF(N) IHSOP2 NO«, t00=0x0017, t01=0x0062}
0x245c…2484 Head {h00=0x0024, h01=0x0050, text=» LD A8,DWTECB,A6 GET ECB-ADDRESS«, t00=0x0017, t01=0x007a}
0x2484…24a8 Head {h00=0x0020, h01=0x0050, text=» ST A2,ECBCW,A8 STORE INDEX «, t00=0x0017, t01=0x00a2}
0x24a8…24d4 Head {h00=0x0028, h01=0x0050, text=» CM ECBEL,A8 RESET EFFECTIVE LENGTH «, t00=0x0017, t01=0x00c6}
0x24d4…24e6 Head {h00=0x000e, h01=0x0050, text=» LDK A1,0 «, t00=0x0017, t01=0x00f2}
0x24e6…2504 Head {h00=0x001a, h01=0x0050, text=» CF A15,TENDIO END I/O«, t00=0x0017, t01=0x0104}
0x2504…2510 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x0017, t01=0x0122}
0x2510…2518 Head {h00=0x0004, h01=0x0050, t00=0x0017, t01=0x012e}
0x2518…2544 Head {h00=0x0028, h01=0x0050, text=»IHSOP2 LDKL A6,DWSI01 ANY REQUEST ON«, t00=0x0017, t01=0x0136}
0x2544…2568 Head {h00=0x0020, h01=0x0050, text=» LD A4,DWTST,A6 STATUS WORD «, t00=0x0017, t01=0x0162}
0x2568…257e Head {h00=0x0012, h01=0x0050, text=» RF(N) EXIT NO«, t00=0x0017, t01=0x0186}
0x257e…25a6 Head {h00=0x0024, h01=0x0050, text=» LD A8,DWTECB,A6 GET ECB-ADDRESS«, t00=0x0018, t01=0x000c}
0x25a6…25ae Head {h00=0x0004, h01=0x0050, t00=0x0018, t01=0x0034}
0x25ae…25d8 Head {h00=0x0026, h01=0x0050, text=»IHSOP3 ST A2,ECBCW,A8 STORE INDEX «, t00=0x0018, t01=0x003c}
0x25d8…25e0 Head {h00=0x0004, h01=0x0050, t00=0x0018, t01=0x0066}
0x25e0…2610 Head {h00=0x002c, h01=0x0050, text=»ENDIO CM ECBEL,A8 RESET EFFECTIVE LENGTH«, t00=0x0018, t01=0x006e}
0x2610…2622 Head {h00=0x000e, h01=0x0050, text=» LDK A1,0 «, t00=0x0018, t01=0x009e}
0x2622…2640 Head {h00=0x001a, h01=0x0050, text=» CF A15,TENDIO END I/O«, t00=0x0018, t01=0x00b0}
0x2640…2648 Head {h00=0x0004, h01=0x0050, t00=0x0018, t01=0x00ce}
0x2648…2670 Head {h00=0x0024, h01=0x0050, text=»EXIT ABL TDISP GO TO DISPATCHER «, t00=0x0018, t01=0x00d6}
0x2670…267e Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x0018, t01=0x00fe}
0x267e…2688 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0018, t01=0x010c}
0x2688…26b6 Head {h00=0x002a, h01=0x0050, text=»************************************* «, t00=0x0018, t01=0x0116}
0x26b6…26e4 Head {h00=0x002a, h01=0x0050, text=»* * «, t00=0x0018, t01=0x0144}
0x26e4…2712 Head {h00=0x002a, h01=0x0050, text=»* S.O.P POWER UP RECOVERY ROUTINE * «, t00=0x0018, t01=0x0172}
0x2712…2740 Head {h00=0x002a, h01=0x0050, text=»* * «, t00=0x0019, t01=0x0010}
0x2740…276e Head {h00=0x002a, h01=0x0050, text=»************************************* «, t00=0x0019, t01=0x003e}
0x276e…2778 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0019, t01=0x006c}
0x2778…2782 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x0019, t01=0x0076}
0x2782…27c0 Head {h00=0x003a, h01=0x0050, text=»* THIS ROUTINE IS A SUBROUTINE TO THE POWER FAILURE «, t00=0x0019, t01=0x0080}
0x27c0…27fc Head {h00=0x0038, h01=0x0050, text=»* RECOVERY ROUTINE (PFAR). IT'S ENTRY POINT SHOULD«, t00=0x0019, t01=0x00be}
0x27fc…2840 Head {h00=0x0040, h01=0x0050, text=»* BE PRESENT IN THE POWER FAILURE RECOVERY TABLE (PFTAB). «, t00=0x0019, t01=0x00fa}
0x2840…2880 Head {h00=0x003c, h01=0x0050, text=»* IF RUNNING READ REQUEST THIS IS COMPLETED WITH -2 IN«, t00=0x0019, t01=0x013e}
0x2880…28b4 Head {h00=0x0030, h01=0x0050, text=»* CONTROL WORD. ELSE -2 IS SAVED IN DWTCHP«, t00=0x0019, t01=0x017e}
0x28b4…28be Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001a, t01=0x0022}
0x28be…28c8 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001a, t01=0x002c}
0x28c8…28e8 Head {h00=0x001c, h01=0x0050, text=»SOPR EQU * ENTRY POINT «, t00=0x001a, t01=0x0036}
0x28e8…28fe Head {h00=0x0012, h01=0x0050, text=» IFT CPU852=1 «, t00=0x001a, t01=0x0056}
0x28fe…2928 Head {h00=0x0026, h01=0x0050, text=» CF A15,SAVE8 SAVE A1-A8 ON STACK «, t00=0x001a, t01=0x006c}
0x2928…2934 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x001a, t01=0x0096}
0x2934…293e Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001a, t01=0x00a2}
0x293e…2954 Head {h00=0x0012, h01=0x0050, text=» IFT CPU852=0 «, t00=0x001a, t01=0x00ac}
0x2954…297a Head {h00=0x0022, h01=0x0050, text=» MSR 8,A15 SAVE A1-A8 ON STACK«, t00=0x001a, t01=0x00c2}
0x297a…2986 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x001a, t01=0x00e8}
0x2986…2990 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001a, t01=0x00f4}
0x2990…29b6 Head {h00=0x0022, h01=0x0050, text=» CIO A1,1,SOPDA ACTIVATE INPUT«, t00=0x001a, t01=0x00fe}
0x29b6…29c0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001a, t01=0x0124}
0x29c0…29ec Head {h00=0x0028, h01=0x0050, text=» LD A1,SPDLCI GET LIGHTS' CORE IMAGE«, t00=0x001a, t01=0x012e}
0x29ec…2a1c Head {h00=0x002c, h01=0x0050, text=» OTR A1,0,SOPDA AND OUTPUT TO THE LIGHTS«, t00=0x001a, t01=0x015a}
0x2a1c…2a26 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001a, t01=0x018a}
0x2a26…2a38 (27, 0, 400) Head {h00=0x000e, h01=0x0050, text=» LDK A2,0 «, t00=0x001b, t01=0x0004}
0x2a38…2a40 Head {h00=0x0004, h01=0x0050, t00=0x001b, t01=0x0016}
0x2a40…2a54 Head {h00=0x0010, h01=0x0050, text=» IFF SOPX=0 «, t00=0x001b, t01=0x001e}
0x2a54…2a7a Head {h00=0x0022, h01=0x0050, text=» LDKL A6,DWSI02 ANY REQUEST ON«, t00=0x001b, t01=0x0032}
0x2a7a…2aa2 Head {h00=0x0024, h01=0x0050, text=» LD A4,DWTST,A6 GET STATUS WORD «, t00=0x001b, t01=0x0058}
0x2aa2…2abc Head {h00=0x0016, h01=0x0050, text=» RF(NN) SOPR1 YES «, t00=0x001b, t01=0x0080}
0x2abc…2adc Head {h00=0x001c, h01=0x0050, text=» STR A2,A6 IND POWER UP «, t00=0x001b, t01=0x009a}
0x2adc…2ae8 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x001b, t01=0x00ba}
0x2ae8…2af0 Head {h00=0x0004, h01=0x0050, t00=0x001b, t01=0x00c6}
0x2af0…2b1c Head {h00=0x0028, h01=0x0050, text=»SOPR1 LDKL A6,DWSI01 ANY REQUEST ON «, t00=0x001b, t01=0x00ce}
0x2b1c…2b40 Head {h00=0x0020, h01=0x0050, text=» LD A4,DWTST,A6 STATUS WORD «, t00=0x001b, t01=0x00fa}
0x2b40…2b5a Head {h00=0x0016, h01=0x0050, text=» RF(NN) SOPR2 YES «, t00=0x001b, t01=0x011e}
0x2b5a…2b7a Head {h00=0x001c, h01=0x0050, text=» STR A2,A6 IND POWER UP «, t00=0x001b, t01=0x0138}
0x2b7a…2b82 Head {h00=0x0004, h01=0x0050, t00=0x001b, t01=0x0158}
0x2b82…2b9a Head {h00=0x0014, h01=0x0050, text=»SOPR2 RB IHSOP1 «, t00=0x001b, t01=0x0160}
0x2b9a…2ba8 Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x001b, t01=0x0178}
0x2ba8…2bb2 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001b, t01=0x0186}
0x2bb2…2bd6 Head {h00=0x0020, h01=0x0050, text=»* D W S I 0 1 : INPUT DWT «, t00=0x001b, t01=0x0190}
0x2bd6…2be0 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001c, t01=0x0024}
0x2be0…2bf4 Head {h00=0x0010, h01=0x0050, text=»DWSI01 EQU *«, t00=0x001c, t01=0x002e}
0x2bf4…2c24 Head {h00=0x002c, h01=0x0050, text=» DATA 0 CHANNEL PARAMETER: POWER UP IND «, t00=0x001c, t01=0x0042}
0x2c24…2c54 Head {h00=0x002c, h01=0x0050, text=» DATA /8000 /8000 MEANS DEVICE IS READY «, t00=0x001c, t01=0x0072}
0x2c54…2c70 Head {h00=0x0018, h01=0x0050, text=» DATA 0 ECB ADDRESS «, t00=0x001c, t01=0x00a2}
0x2c70…2c86 Head {h00=0x0012, h01=0x0050, text=» DATA 0 ORDER «, t00=0x001c, t01=0x00be}
0x2c86…2c9a Head {h00=0x0010, h01=0x0050, text=» DATA SOPADI«, t00=0x001c, t01=0x00d4}
0x2c9a…2caa Head {h00=0x000c, h01=0x0050, text=» DATA 0 «, t00=0x001c, t01=0x00e8}
0x2caa…2cba Head {h00=0x000c, h01=0x0050, text=» DATA 0 «, t00=0x001c, t01=0x00f8}
0x2cba…2cd8 Head {h00=0x001a, h01=0x0050, text=» DATA 0 TERMINAL QUEUE«, t00=0x001c, t01=0x0108}
0x2cd8…2cee Head {h00=0x0012, h01=0x000d, text=» IFT MMUPAG=1 «, t00=0x001c, t01=0x0126}
0x2cee…2d18 Head {h00=0x0026, h01=0x0022, text=» DATA 0 SAVE AREA USER ECB ADDRESS«, t00=0x001c, t01=0x013c}
0x2d18…2d3c Head {h00=0x0020, h01=0x0050, text=» DATA DEVECI MMU ECB ADDRESS«, t00=0x001c, t01=0x0166}
0x2d3c…2d50 Head {h00=0x0010, h01=0x0050, text=»DEVECI EQU *«, t00=0x001c, t01=0x018a}
0x2d50…2d6a Head {h00=0x0016, h01=0x0050, text=» DATA 0,0,0,0,0,0 «, t00=0x001d, t01=0x000e}
0x2d6a…2d76 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x001d, t01=0x0028}
0x2d76…2d80 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001d, t01=0x0034}
0x2d80…2da4 Head {h00=0x0020, h01=0x0050, text=»* D W S O 0 1 : OUTPUT DWT«, t00=0x001d, t01=0x003e}
0x2da4…2dae Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001d, t01=0x0062}
0x2dae…2db8 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001d, t01=0x006c}
0x2db8…2dcc Head {h00=0x0010, h01=0x0050, text=»DWSO01 EQU *«, t00=0x001d, t01=0x0076}
0x2dcc…2df2 Head {h00=0x0022, h01=0x0050, text=» DATA /0040 CHANNEL PARAMETER «, t00=0x001d, t01=0x008a}
0x2df2…2e22 Head {h00=0x002c, h01=0x0050, text=» DATA /8000 /8000 MEANS DEVICE IS READY «, t00=0x001d, t01=0x00b0}
0x2e22…2e3e Head {h00=0x0018, h01=0x0050, text=» DATA 0 ECB ADDRESS «, t00=0x001d, t01=0x00e0}
0x2e3e…2e54 Head {h00=0x0012, h01=0x0050, text=» DATA 0 ORDER «, t00=0x001d, t01=0x00fc}
0x2e54…2e82 Head {h00=0x002a, h01=0x0050, text=» DATA SOPADU POINTER TO ADDRESS BLOCK «, t00=0x001d, t01=0x0112}
0x2e82…2e9e Head {h00=0x0018, h01=0x0050, text=» DATA 0 TTAB-ADDRESS«, t00=0x001d, t01=0x0140}
0x2e9e…2ec6 Head {h00=0x0024, h01=0x0050, text=» DATA 0 WAIT/ACTIVATE INDICATOR «, t00=0x001d, t01=0x015c}
0x2ec6…2ee4 Head {h00=0x001a, h01=0x0050, text=» DATA 0 TERMINAL QUEUE«, t00=0x001d, t01=0x0184}
0x2ee4…2efa Head {h00=0x0012, h01=0x000d, text=» IFT MMUPAG=1 «, t00=0x001e, t01=0x0012}
0x2efa…2f24 Head {h00=0x0026, h01=0x0022, text=» DATA 0 SAVE AREA USER ECB ADDRESS«, t00=0x001e, t01=0x0028}
0x2f24…2f48 Head {h00=0x0020, h01=0x0050, text=» DATA DEVECO MMU ECB ADDRESS«, t00=0x001e, t01=0x0052}
0x2f48…2f54 Head {h00=0x0008, h01=0x0004, text=» XIF«, t00=0x001e, t01=0x0076}
0x2f54…2f72 Head {h00=0x001a, h01=0x0050, text=» DATA 0 TIMER POINTER «, t00=0x001e, t01=0x0082}
0x2f72…2fa4 Head {h00=0x002e, h01=0x0050, text=»FLASH DATA 0 SAVE AREA FOR FLASHING LAMPS «, t00=0x001e, t01=0x00a0}
0x2fa4…2fba Head {h00=0x0012, h01=0x0050, text=» IFT MMUPAG=1 «, t00=0x001e, t01=0x00d2}
0x2fba…2fce Head {h00=0x0010, h01=0x0050, text=»DEVECO EQU *«, t00=0x001e, t01=0x00e8}
0x2fce…2fe8 Head {h00=0x0016, h01=0x0050, text=» DATA 0,0,0,0,0,0 «, t00=0x001e, t01=0x00fc}
0x2fe8…2ff4 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x001e, t01=0x0116}
0x2ff4…3002 Head {h00=0x000a, h01=0x0050, text=» EJECT«, t00=0x001e, t01=0x0122}
0x3002…300a Head {h00=0x0004, h01=0x0050, t00=0x001e, t01=0x0130}
0x300a…3014 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001e, t01=0x0138}
0x3014…3042 Head {h00=0x002a, h01=0x0050, text=»* D W S I 0 2 : EXTENDED INPUT DWT «, t00=0x001e, t01=0x0142}
0x3042…304c Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001e, t01=0x0170}
0x304c…3054 Head {h00=0x0004, h01=0x0050, t00=0x001e, t01=0x017a}
0x3054…3068 Head {h00=0x0010, h01=0x0050, text=»DWSI02 EQU *«, t00=0x001e, t01=0x0182}
0x3068…307c Head {h00=0x0010, h01=0x0050, text=» IFF SOPX=0 «, t00=0x001f, t01=0x0008}
0x307c…308c Head {h00=0x000c, h01=0x0050, text=» DATA 0 «, t00=0x001f, t01=0x001c}
0x308c…30a0 Head {h00=0x0010, h01=0x0050, text=» DATA /8000 «, t00=0x001f, t01=0x002c}
0x30a0…30bc Head {h00=0x0018, h01=0x0050, text=» DATA 0 ECB ADDRESS «, t00=0x001f, t01=0x0040}
0x30bc…30d2 Head {h00=0x0012, h01=0x0050, text=» DATA 0 ORDER «, t00=0x001f, t01=0x005c}
0x30d2…30e6 Head {h00=0x0010, h01=0x0050, text=» DATA SOPADI«, t00=0x001f, t01=0x0072}
0x30e6…30fa Head {h00=0x0010, h01=0x0050, text=» DATA 0,0,0 «, t00=0x001f, t01=0x0086}
0x30fa…3110 Head {h00=0x0012, h01=0x000d, text=» IFT MMUPAG=1 «, t00=0x001f, t01=0x009a}
0x3110…313a Head {h00=0x0026, h01=0x0022, text=» DATA 0 SAVE AREA USER ECB ADDRESS«, t00=0x001f, t01=0x00b0}
0x313a…315e Head {h00=0x0020, h01=0x0050, text=» DATA DEVEC1 MMU ECB ADDRESS«, t00=0x001f, t01=0x00da}
0x315e…3172 Head {h00=0x0010, h01=0x0050, text=»DEVEC1 EQU *«, t00=0x001f, t01=0x00fe}
0x3172…318c Head {h00=0x0016, h01=0x0050, text=» DATA 0,0,0,0,0,0 «, t00=0x001f, t01=0x0112}
0x318c…3198 Head {h00=0x0008, h01=0x0050, text=» XIF«, t00=0x001f, t01=0x012c}
0x3198…31a2 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001f, t01=0x0138}
0x31a2…31ac Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001f, t01=0x0142}
0x31ac…31b6 Head {h00=0x0006, h01=0x0050, text=»* «, t00=0x001f, t01=0x014c}
0x31b6…31c2 Head {h00=0x0008, h01=0x0050, text=» END«, t00=0x001f, t01=0x0156}
0x31c2…31c6 Head {h00=0x4004, h01=0x0000}
0x31c6…31ca 00 1f 01 62 ┆ b┆
0x31ca…31d2 (32, 1, 8) 20 04 00 00 00 20 00 04 ┆ ┆
0x31d2…3222 (33, 0, 398) 00 1a 00 15 5c 4d 53 52 5c 38 2c 41 31 35 5c 50 55 53 48 20 41 31 2d 41 38 20 00 71 00 04 00 08 00 04 5c 58 49 46 00 71 00 22 00 06 00 03 2a 20 00 71 00 2e 00 26 00 50 5c 4c 44 4b 4c 5c 41 35 2c 50 4c 30 43 57 54 5c 43 57 54 20 41 44 44 52 ┆ MSR 8,A15 PUSH A1-A8 q XIF q " * q . & P LDKL A5,PL0CWT CWT ADDR┆
0x3222…3272 45 53 53 2c 20 50 4c 43 20 30 00 71 00 38 00 24 00 50 5c 52 46 5c 49 48 50 4c 5c 43 4f 4d 4d 4f 4e 20 50 41 52 54 2c 20 41 4c 4c 20 50 4c 43 3a 53 20 00 71 00 62 00 06 00 50 2a 20 00 71 00 8a 00 0a 00 50 5c 45 4a 45 43 54 00 71 00 94 00 06 ┆ESS, PLC 0 q 8 $ P RF IHPL COMMON PART, ALL PLC:S q b P* q P EJECT q ┆
0x3272…32c2 00 50 2a 20 00 71 00 a2 00 10 00 50 49 48 50 4c 30 32 5c 45 51 55 5c 2a 00 71 00 ac 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 71 00 c0 00 12 00 50 5c 49 46 54 5c 43 50 55 38 35 32 3d 31 20 00 71 00 d4 00 1c 00 18 5c 43 46 5c 41 31 ┆ P* q PIHPL02 EQU * q IFF PLCNR=1 q P IFT CPU852=1 q CF A1┆
0x32c2…3312 35 2c 53 41 56 45 38 5c 50 55 53 48 20 41 31 2d 41 38 00 71 00 ea 00 08 00 04 5c 58 49 46 00 71 01 0a 00 06 00 03 2a 20 00 71 01 16 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 71 01 20 00 12 00 0d 5c 49 46 46 5c 43 50 55 38 35 32 3d ┆5,SAVE8 PUSH A1-A8 q XIF q * q IFF PLCNR=1 q IFF CPU852=┆
0x3312…3360 31 20 00 71 01 34 00 1a 00 15 5c 4d 53 52 5c 38 2c 41 31 35 5c 50 55 53 48 20 41 31 2d 41 38 20 00 71 01 4a 00 08 00 04 5c 58 49 46 00 71 01 68 00 06 00 03 2a 20 00 71 01 74 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 71 01 7e ┆1 q 4 MSR 8,A15 PUSH A1-A8 q J XIF q h * q t IFF PLCNR=1 q ~┆
0x3360…33b0 (34, 0, 400) 00 26 00 50 5c 4c 44 4b 4c 5c 41 35 2c 50 4c 31 43 57 54 5c 43 57 54 20 41 44 44 52 45 53 53 2c 20 50 4c 43 20 31 00 72 00 04 00 24 00 50 5c 52 46 5c 49 48 50 4c 5c 43 4f 4d 4d 4f 4e 20 50 41 52 54 2c 20 41 4c 4c 20 50 4c 43 3a 53 20 00 72 ┆ & P LDKL A5,PL1CWT CWT ADDRESS, PLC 1 r $ P RF IHPL COMMON PART, ALL PLC:S r┆
0x33b0…3400 00 2e 00 08 00 04 5c 58 49 46 00 72 00 56 00 06 00 03 2a 20 00 72 00 62 00 10 00 50 49 48 50 4c 30 33 5c 45 51 55 5c 2a 00 72 00 6c 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 72 00 80 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 32 ┆ . XIF r V * r b PIHPL03 EQU * r l IFF PLCNR=1 r IFF PLCNR=2┆
0x3400…3450 00 72 00 94 00 12 00 0d 5c 49 46 54 5c 43 50 55 38 35 32 3d 31 20 00 72 00 a8 00 1c 00 18 5c 43 46 5c 41 31 35 2c 53 41 56 45 38 5c 50 55 53 48 20 41 31 2d 41 38 00 72 00 be 00 08 00 04 5c 58 49 46 00 72 00 de 00 06 00 03 2a 20 00 72 00 ea ┆ r IFT CPU852=1 r CF A15,SAVE8 PUSH A1-A8 r XIF r * r ┆
0x3450…34a0 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 72 00 f4 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 32 00 72 01 08 00 12 00 0d 5c 49 46 46 5c 43 50 55 38 35 32 3d 31 20 00 72 01 1c 00 1a 00 15 5c 4d 53 52 5c 38 2c 41 31 35 5c 50 55 53 ┆ IFF PLCNR=1 r IFF PLCNR=2 r IFF CPU852=1 r MSR 8,A15 PUS┆
0x34a0…34f0 48 20 41 31 2d 41 38 20 00 72 01 32 00 08 00 04 5c 58 49 46 00 72 01 50 00 06 00 03 2a 20 00 72 01 5c 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 72 01 66 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 32 00 72 01 7a 00 26 00 50 5c 4c ┆H A1-A8 r 2 XIF r P * r IFF PLCNR=1 r f IFF PLCNR=2 r z & P L┆
0x34f0…3540 (35, 0, 400) 44 4b 4c 5c 41 35 2c 50 4c 32 43 57 54 5c 43 57 54 20 41 44 44 52 45 53 53 2c 20 50 4c 43 20 32 00 72 01 8e 00 24 00 50 5c 52 46 5c 49 48 50 4c 5c 43 4f 4d 4d 4f 4e 20 50 41 52 54 2c 20 41 4c 4c 20 50 4c 43 3a 53 20 00 73 00 28 00 08 00 04 ┆DKL A5,PL2CWT CWT ADDRESS, PLC 2 r $ P RF IHPL COMMON PART, ALL PLC:S s ( ┆
0x3540…3590 5c 58 49 46 00 73 00 50 00 06 00 03 2a 20 00 73 00 5c 00 10 00 50 49 48 50 4c 30 34 5c 45 51 55 5c 2a 00 73 00 66 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 73 00 7a 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 32 00 73 00 8e 00 10 ┆ XIF s P * s PIHPL04 EQU * s f IFF PLCNR=1 s z IFF PLCNR=2 s ┆
0x3590…35e0 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 33 00 73 00 a2 00 12 00 0d 5c 49 46 54 5c 43 50 55 38 35 32 3d 31 20 00 73 00 b6 00 1c 00 18 5c 43 46 5c 41 31 35 2c 53 41 56 45 38 5c 50 55 53 48 20 41 31 2d 41 38 00 73 00 cc 00 08 00 04 5c 58 49 46 ┆ IFF PLCNR=3 s IFT CPU852=1 s CF A15,SAVE8 PUSH A1-A8 s XIF┆
0x35e0…3630 00 73 00 ec 00 06 00 03 2a 20 00 73 00 f8 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 31 00 73 01 02 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 32 00 73 01 16 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 33 00 73 01 2a 00 12 00 0d 5c 49 ┆ s * s IFF PLCNR=1 s IFF PLCNR=2 s IFF PLCNR=3 s * I┆
0x3630…3680 46 46 5c 43 50 55 38 35 32 3d 31 20 00 73 01 3e 00 1a 00 15 5c 4d 53 52 5c 38 2c 41 31 35 5c 50 55 53 48 20 41 31 2d 41 38 20 00 73 01 54 00 08 00 04 5c 58 49 46 00 73 01 72 00 06 00 03 2a 20 00 73 01 7e 00 10 00 0c 5c 49 46 46 5c 50 4c 43 ┆FF CPU852=1 s > MSR 8,A15 PUSH A1-A8 s T XIF s r * s ~ IFF PLC┆
0x3680…36d0 (36, 0, 400) 4e 52 3d 31 00 73 01 88 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 32 00 74 00 0c 00 10 00 0c 5c 49 46 46 5c 50 4c 43 4e 52 3d 33 00 74 00 20 00 26 00 50 5c 4c 44 4b 4c 5c 41 35 2c 50 4c 33 43 57 54 5c 43 57 54 20 41 44 44 52 45 53 53 2c ┆NR=1 s IFF PLCNR=2 t IFF PLCNR=3 t & P LDKL A5,PL3CWT CWT ADDRESS,┆
0x36d0…3720 20 50 4c 43 20 33 00 74 00 34 00 24 00 50 5c 52 46 5c 49 48 50 4c 5c 43 4f 4d 4d 4f 4e 20 50 41 52 54 2c 20 41 4c 4c 20 50 4c 43 3a 53 20 00 74 00 5e 00 08 00 04 5c 58 49 46 00 74 00 86 00 06 00 50 2a 20 00 74 00 92 00 0a 00 50 5c 45 4a 45 ┆ PLC 3 t 4 $ P RF IHPL COMMON PART, ALL PLC:S t ^ XIF t P* t P EJE┆
0x3720…3770 43 54 00 74 00 9c 00 06 00 03 2a 20 00 74 00 aa 00 0e 00 50 49 48 50 4c 5c 45 51 55 5c 2a 00 74 00 b4 00 26 00 50 5c 53 54 5c 50 2c 49 4e 54 53 41 56 5c 53 41 56 45 20 4c 41 54 45 53 54 20 49 4e 54 45 52 52 55 50 54 00 74 00 c6 00 1e 00 19 ┆CT t * t PIHPL EQU * t & P ST P,INTSAV SAVE LATEST INTERRUPT t ┆
0x3770…37c0 5c 4c 44 4b 5c 41 31 2c 30 5c 52 45 53 45 54 20 48 49 47 48 20 42 59 54 45 20 00 74 00 f0 00 2c 00 28 5c 4c 43 5c 41 31 2c 43 57 54 43 49 44 2b 43 49 44 49 4e 54 2c 41 35 5c 49 4e 54 45 52 52 55 50 54 20 53 4f 55 52 43 45 00 74 01 12 00 18 ┆ LDK A1,0 RESET HIGH BYTE t , ( LC A1,CWTCID+CIDINT,A5 INTERRUPT SOURCE t ┆
0x37c0…3810 00 50 5c 43 57 4b 5c 41 31 2c 2f 34 30 5c 52 45 4c 45 41 53 45 3f 00 74 01 42 00 1c 00 50 5c 52 46 28 45 29 5c 50 4c 49 48 52 5c 59 45 53 2c 20 48 41 4e 44 4c 45 00 74 01 5e 00 20 00 50 5c 43 57 4b 5c 41 31 2c 2f 32 30 5c 49 2f 4f 20 43 4f ┆ P CWK A1,/40 RELEASE? t B P RF(E) PLIHR YES, HANDLE t ^ P CWK A1,/20 I/O CO┆