|
DataMuseum.dkPresents historical artifacts from the history of: RC4000/8000/9000 |
This is an automatic "excavation" of a thematic subset of
See our Wiki for more about RC4000/8000/9000 Excavated with: AutoArchaeologist - Free & Open Source Software. |
top - metrics - download
Length: 30720 (0x7800)
Types: TextFile
Names: »kkmonret3«
└─⟦621cfb9a2⟧ Bits:30002817 RC8000 Dump tape fra HCØ. Detaljer om "HC8000" projekt.
└─⟦0364f57e3⟧
└─⟦3b4b74406⟧ »kkmon3filer«
└─⟦this⟧
; bs disc3 2000 40
(
message monchange release 7.0 to 7.13
clear temp mondef moncentral monprocs mondisc monfpaline monhost monfpasub,
montabinit monprocfnc1 monprocfnc2 mons1 mons2 moncatinit,
mdef mcentral mprocs mdisc mfpaline mhost mfpasub,
mtabinit mprocfnc1 mprocfnc2 ms1 ms2 mcatinit
contract entry.kkmon3filer mondef moncentral monprocs mondisc monfpaline,
monhost monfpasub montabinit monprocfnc1 monprocfnc2 mons1 mons2 moncatinit
skip 36.1
c=copy mess.no 1
mdef=set 1 disc3
mdef=edit mondef
skip 36.1
c=copy mess.no 1
mcentral=set 1 disc3
mcentral=edit moncentral
skip 36.1
c=copy mess.no 1
mprocs=set 1 disc3
mprocs=edit monprocs
skip 36.1
c=copy mess.no 1
mdisc=assign mondisc
skip 36.1
c=copy mess.no 1
mfpaline=assign monfpaline
skip 36.1
c=copy mess.no 1
mhost=assign monhost
skip 36.1
c=copy mess.no 1
mfpasub=assign monfpasub
skip 36.1
c=copy mess.no 1
mtabinit=set 1 disc3
mtabinit=edit montabinit
skip 36.1
c=copy mess.no 1
mprocfnc1=assign monprocfnc1
skip 36.1
c=copy mess.no 1
mprocfnc2=set 1 disc3
mprocfnc2=edit monprocfnc2
skip 36.1
c=copy mess.no 1
ms1=assign mons1
skip 36.1
c=copy mess.no 1
ms2=assign mons2
skip 36.1
c=copy mess.no 1
mcatinit=assign moncatinit
head cpu
finisb
end)
$def
;********************
l./a48=-4/,i/
a200= -14 ; first of internal process description
a194= -14 ; process descr addr(other comp) if mirror proc exist
a192= -12 ; process type 0 useal internal process
; 2 master process (this computer)
; 3 master mirror process
; 5 mirror process
a190= -10 ; process description addr of master process
a188= -8,a189= -7 ; computer number<12 + internal claim (other computer)
a186= -6, a187= -5 ; cpu running mask,allowed cpu mask
/,l./-a48/,r/a48/a200/,l./a48=first/,g 2/a48/a200/,
l./a104=/,l1,i/
a94 = 2.11111000 ; waiting for external interrupt
/,l./a139=-2/,i/
a158=-10 ; buffer state
a156=-8 ; reciever <12 + sender (computer numbers)
a155=-6 ; process descr addr receiver (other computer)
a154=-4 ; process descr addr sender (other computer)
/,l./a6=/,r/a139/a158/,
f
$central
;********************
l./,f20,e/,r/f20/f23/,r/e62/e64/,
l./b76:/,
l./b26=b5/,l1,i/
c. a430
0,r.(:66<1 -k +2:) > 1 ;
b56: 0,r.a350 ; current process (cpu(i)) i=1,...,last cpu
z.
/,l./c0:/,r/c0:/c0:
c. a430
jl w3 d35 ; stop cpu(i), i=1, ,last cpu;
z.
/,l./c99:/,l1,i/
c. a430
jl w3 d36 ; start cpu(i), i=1,...,last cpu;
z.
/,l./h0:/,l1,i/
h1: d140 ; addr(dump core procedure)
/,l1,l./d140/,r/d140./(h1) /,r/./ /,r/);/) ;/,
l2,i/
c. a430
jl w3 d37 ; init cpu1
z.
/,l./c50:/,r/:/:
c. a430
jl w3 d35 ; stop(i), i=1,2,3,...,last cpu
z./,l./d13:/,l./c.(/,i/
rs w1 x2+a158 ; clear buffer state
/,l./d104:/,l2,r/ /d114:/,
l./d10:/,l./i3:/,l./(x1-a16+a301)/,r/x1-a16+a301/i6/,l./i5:/,l2,i/
i6: a249+1 ; max number for priority except for a dummy process
/,l./e./,l1,i/
; bitpatterns:
g48: 3 ; constant 3 (= number of chars per word)
g50: 8.7777 7776 ; first 23 bits
g51: 8.7777 0000 ; first 12 bits
g52: 8.0000 7777 ; last 12 bits
g53: 8.0000 0377 ; last 8 bits
g49: 1<23 ; bit 0
g62: 1<18 ; bit 5
g65: 8.3777 7777 ; last 23 bits
g63: 1 ; bit 23
/,l./b52:/,l./comment:the/,
l./g34:/,l./i0/,r/s /s./,r/0 /0./,
l./i0)/,r/l /l./,r/) /.)/,l1,l./i0)/,r/l /l./,r/) /.)/,
l1,r/l /l./,r/0 /0./,
l./d74:/,r/s /s./,r/i3 /i3./,
l./i3)/,r/l /l./,r/3) /3.)/,l./;bit/,d./g63:/,i/
c. a430
d35: jl. (2),d25 ;
d36: jl. (2),d26 ;
d37: jl. (2),d27 ;
b55: 0 ; interrupt addr for cpu1
b57: 0 ; cur proc(cpu0) (when b1 is cur proc(cpu1))
b58: 0 ; relative addr of curr proc at cpu1
f23: 1<23 +20 < 3 + 0 ; device addr for device 20 (cpu1)
z.
b105: 0 ; master process description addr
b106: 0 ; proc descr addr(hcdriver)
b109: 0 ; computer number (this computer)
/,f
$procs
;********************
l./b16:/,l./;30:(type/,d2,i/
e15 ; 30: set cpu mask (or lookup cpu mask) 'cpumask'
e16 ; 32: select or remove master process 'systemaddr'
e17 ; 34: move-buff 'sendfurther'
/,l./e62;124/,l1,i/
e63 ; 126 : select or remove buff
e64 ; 128 : start cpu(1)
/,l./d15:/,l./x1+a250/,l1,i/
rl w3 x1+a192 ; process type
sl w3 3 ; if mirror proc then
rl w1 x1+a190 ; calling proc:=master proc
/,l./d16:/,l./x1+a250/,l1,i/
rl w0 x1+a192 ; process type
sl w0 3 ; if mirror proc then
rl w1 x1+a190 ; calling proc:=master proc
/,l./e0:/,l-20,l./i40:/,l./e./,l2,i/
;
; procedure test other computers
; if current proces has performed a call of
; create internal process (other computers)
; start internal process (other computers)
; stop internal process (other computers)
; modify internal process (other computers)
; remove internal process (other computers or own computer)
; then there is selected and initialized a message buffer
;
; - 10 0
; - 8 0
- 6 0
; - 4 0
; - 2 0
; buf + 0 next buf
; + 2 prev buff
; + 4 receiver (=master process)
; + 6 sender (=calling process)
; + 8 1<22 + monitor procedure number (56,58,60,62 or 64)
; +10 saved w0 (from calling process)
; +12 - w1 -
; +14 - w2 -
; +16 - w3 -
;
; and the buffer is linked to the master process (this computer)
;
; call w2=curr+a16 w3 =return
; return: w2 is unchanged
;
b. h10,i10 w.
;
d40:
rl w1 b105 ; w1:= master
se w1 0 ; if master not present
sn w1 x2-a16 ; or calling proc =master proc then
jl x3 ; return
rl w1 x2-a16+a33; w1:=ic.cur
al w0 2.11111111;
la w0 x1-2 ; w1:= monitor procedure number
sh w0 64 ; if number > 64 or
sh w0 55 ; number <56 then
jl x3 ; return
rs. w0 h1. ; save monitor procedure number
ds. w3 h3. ; save(w2,w3)
se w0 56 ; if not create internal process then
jl. i0. ; goto search name
rl w1 x2-a16+a29; w1:=saved w1
rl w1 x1+8 ; w1:=mode
se w1 -8 ; if mode<>-8 then
jl x3 ; return
jl. i2. ; else goto select buff
i0: rl w2 x2-a16+a31; w2:=saved w3
jl w3 d11 ; search name
jl. i5. ; if not found then return
rl w3 x3 ; else w3:=proc
rl w0 x3 ; w0:=kind
se w3 (b105) ; if masterproc or
se w0 0 ; not internal proc then
jl. i5. ; return
rl w0 x3+a194 ; w0:=proc addr other comp.
sh w0 0 ; if not mirror process or a proc with mirror proc thenen
jl. i5. ; return
i2: rl w1 b105 ; w1:=master proc
rl w2 b8 ; w2:=next buff
al w0 -2 ; set up message buff
rs w0 x2+a158 ; buf -10 := -2 (mon call buff)
ld w0 -100 ; buf - 8 := 0
rs w0 x2+a156 ; buf - 6 := 0
ds w0 x2+a154 ; buf - 4 := 0
rl. w3 h2. ;
al w3 x3-a16 ;
rs w3 x2+a142 ; + 6 :=sender
rs w1 x2+a141 ; + 4 :=receiver
rl. w0 h0. ;
wa. w0 h1. ;
rs w0 x2+a145 ; + 8 := 1<22 + monitor procedure no
dl w1 x3+a29 ; +10 := w0.sender
ds w1 x2+a145+4 ; +12 := w1.sender
dl w1 x3+a31 ; +14 := w2.sender
ds w1 x2+a145+8 ; +16 := w3.sender
rs w0 x2+a139 ; w2.sender
jl w3 d5 ; remove buf
al w3 c99 ;
jl. d16. ; deliver message and goto interrupt return
i5: dl. w3 h3. ;
jl x3 ; return
h0: 1<22
h1: 0
h2: 0
h3: 0
e.
/,l./e10:/,l-1,r/i8/i20/,l./e11:/,l1,i/
rl w3 x2+a158 ; w3:=buffer type
se w3 -2 ; if it is not a moncall buffer then
jl. i9. ; goto i9
rl w3 b105 ;
se w3 0 ; if rhdriver exist then
jl. i12. ; goto i12
i9:
/,l./jl.d15./,l1,i/
;
; if the buffer contain an answer from mon call other computer then
; set result in calling proc
i12: dl w1 x2+a142 ; w0:=receiver w1:=sender
ds. w1 i11. ;
ld w0 -100 ;
ds w0 x2+a156 ; clear buff(other comp),receiver-sender,
rs w0 x2+a154 ; proc descr addr
jl w3 d106 ; remove buff
rl. w1 i11. ; restore sender
sh w1 0 ; if regretted then
jl c99 ; return
rl. w3 i10. ; w3:=receiver
sh w3 0 ;
ac w3 x3 ;
bz w0 x3+a19 ;
ba. w0 1 ; increase bufferclaim.master
hs w0 x3+a19 ;
rl w0 x3+a28 ; w0:=answer
rs w0 x1+a28 ; set result
al w3 c99 ; and return interrupt
jl d10 ;
i10: 0 ; receiver
i11: 0 ; sender
/,l./e57:/,l./rlw1(b6)/,i/
jl. w3 d40. ; check mirror process
/,l./e35:/,l./jlr3/,l1,i/
rl w3 x2+6 ; w3:=sender
rl w0 x3+a192 ;
sl w0 3 ; if sender is a mirror process then
jl. i14. ; goto move to master
/,l./i3./,l1,i/
; w1 = cur
; w2 = buf
; w3 = sender
i14: ; move buf to master
rl w3 x3+a190 ; w3:=master
rl w0 x3+a19 ;
bs. w0 1 ;
rs w0 x3+a19 ; decrease bufferclaim.master
ds. w3 j1. ; save buf, master
jl w3 d5 ; remove buf
bz w3 x1+a19 ;
al w3 x3+1 ; increase bufferclaim.cur
hs w3 x1+a19 ;
al w0 a101 ;
jl w3 d9 ; remove calling proc
rl. w1 j1. ; w1:=master
al w1 x1+a15 ;
jl w3 d6 ; link buf
al w1 x1-a15 ;
am (b1) ;
rl w0 a29 ; w0:=first addr
rl w3 b109 ; w3:=computer number
rl. w2 j0. ; w2:=buf
ds w3 x2+a153+2 ;
al w0 -1 ; set buffer state to
rs w0 x2+a158 ; copy buffer
rl w0 x1+a13 ; w0:=state
sn w0 a104 ; if waiting for event then
jl w3 d10 ; link proc and
jl c99 ; and return
/,l./e47:/,l-6,i/
; set cpu mask
; saved w0 new cpu mask result=if new cpu mask=0 then old cpu mask else
; new cpu mask
; saved w1
; saved w2
; saved w3
b. w.
e15: rl w2 x1+a28 ; w2:=new cpu mask
se w2 0 ; if new cpu mask<>0 then
hs w2 x1+a187 ; set new cpu mask
bz w2 x1+a187 ; load result
rs w2 x1+a28 ;
jl c99 ; return
e.
;
; procedure select or remove masterproc
; saved w0=0 for remove
; 2 for select
; 4 for select hcdriver process addr
; saved w3= proc addr (in the 3 last cases)
b. i5 w.
e16: rl w2 x1+a28 ; w2:=saved w0
sl w2 3 ; if set proc addr then
jl. i0. ; goto i0
rs w2 x1+a192 ; select or remove master
se w2 0 ; if select then
al w2 x1 ; set current master
rs w2 b105 ; else remove current master
jl c99 ; return interrupt
i0: rs w1 b106 ; set proc addr
jl c99 ; return interrupt
e.
;
; procedure move buff(sender,receiver);
; saved w0 return: =0 buffer claim execeeded (receiver)
; =1 buffer moved
; saved w1
; saved w2 buf
; saved w3 receiver
;
b. h5,i5 w.
e17: jl w3 d101 ; check and search name
jl r3 ; if process do not exist then result 3
rs. w3 h0. ; save receiver
jl w3 d12 ; check buf
rl. w3 (h0.) ; w3:=receiver
bz w0 x3+a19 ;
sh w0 0 ;
jl. i0. ;
bs. w0 1 ;
hs w0 x3+a19 ;
jl w3 d5 ; remove buf
al w0 1 ;
rs w0 x1+a28 ; set result
ba w0 x1+a19 ; increase buffer claim(sender)
hs w0 x1+a19 ;
rl. w1 (h0.) ; w1:=reciever
al w1 x1+a15 ;
jl w3 d6 ; link buf
al w1 x1-a15 ;
bz w0 x1+a13 ; w0:=state
rl w3 b1 ; w3:=sender
sn w0 a102 ; if waiting for message
jl. i1. ; goto message
se w0 a104 ; if not waiting for event then
jl c99 ; return from interrupt
al w3 0 ; else set result
i1: rs w3 x1+a28 ; =0 (i.e. message) or proc addr
rs w2 x1+a30 ; saved w2:=buf
al w3 c99 ;
jl d10 ; and link proc
i0: al w0 0 ;
rs w0 x3+a28 ; set result
jl c99 ; and return
h0: 0
e.
/,l./e50:/,l./i55:/,l./end of start i/,l1,i?
;
;
; procedure get or release buf
; if w20=0 a free buffer is selected and the bufferclaim of the calling
; process is decreased by one
; else it is checked that w2 is a buffer address and the buffer is then
; released and the buffer claim of the calling process is increased by
; one.
;
; call return
; saved w0
; saved w1
; saved w2 0/bufferaddress buffer address
; saved w3
;
b. i4 w.
e63:
rl w2 x1+a30 ; saved w2
se w2 0 ; if remove buffer then
jl. i1. ; goto i1
; else select:
rl w2 b8 ; w2:=first buffer
bz w0 x1+a19 ;
sh w0 0 ; if bufferclaim<= 0 then
jl. i0. ; goto i0
al w0 x1 ;
ds w1 x2+6 ; save calling proc both as sender and receiver
i0: jl w3 d108 ; and goto claim buffer
rs w2 x1+a30 ;
jl w3 d5 ; remove buf from free queue
jl. i2. ;
i1: jl w3 d12 ; check buf
jl w3 d109 ; increase claim, remove and release buf
i2: jl c99 ; goto return from interrupt
e.
;
;
;
; start cpu(1)
e64: al w2 0 ; select cpu(1)
c. a430
jl. w1 d23. ; reset cpu(1)
jl. w3 d27. ; start cpu(1)
z.
jl c99 ;
;
;
;
c. a430
m. start of cpu(i) service
;
;
; the following procedures are all used to service other cpu's
; than the commen cpu (cpu0)
b. i20,h20 w.
; data-out instruction at cpu(i);
;
; interrupt cpu1 1<23 + 20<3 + 0<1
; reset cpu1 1<23 + 20<3 + 1<1
; stop cpu1 1<23 + 20<3 + 2<1
; start cpu1 1<23 + 20<3 + 3<1
;
; call: w2=relative addr of cpu(i), w1=return
; return: w2,w3 are unchanged, w0 are changed
; if cpu(i) is started then w1<h9 else w1=h9
h9=2
d21: am 1<1 ; start cpu(x2)
d20: am 1<1 ; stop cpu(x2)
d23: am 1<1 ; reset cpu(x2)
d22: al w0 0<1 ; interrupt cpu(x2)
wa w0 x2+f23 ; interrupt address(cpu(i))
rs. w1 h1. ;
ds. w3 h3. ;
al w1 0 ; do_count:=0;
i0: do w3 (0) ; data_out(cpu(i))
sx 2.111 ; if buserror then
jl. i2. ; goto count;
i1: dl. w3 h3. ;
jl. (h1.) ; return;
i2: al w1 x1+1 ; do_count:=do_count+1;
se w1 h9 ; if do_count<h9 then
jl. i0. ; goto repeat data_out instruction else
ls w2 -1 ; set cpu(x2) as not able to use;
al w3 2.10 ; w3=mask for cpu(1)
ls w3 x2 ; w3=2**(x2//2) ; mask for cpu(i)
ac w3 x3+1 ;
la. w3 b59. ; remove bit for cpu(i)
rs. w3 b59. ;
jl. i1. ; return
h1: 0
h2: 0
h3: 0
b59: 2.000 000 000 011 ; mask for cpu's in use
b51: 0,r.a350 ; b51+2*i = 0 cpu(i) is not initialisized
; = 1 a interrupt is send to cpu0, but
; not recieved.
; (special meaning at init cpu(i))
; = 2 cpu(i) is ready for start
; = 4 cpu(i) is running or stopped
; without reg. dump
;
;
; stop cpu(i) i=1,...,last cpu
; call: w3=return
; return: all reg unchanged
d25: ds. w1 h5. ;
ds. w3 h7. ;
al w2 -2 ;
i5: al w2 x2+2 ; next cpu
sl w2 a351+1 ; if all cpu's is stopped then
jl. i6. ; return
rl w1 x2+b56 ;
sn w1 0 ; if no proc then
jl. i5. ; goto next proc
al w0 0 ;
hs w0 x1+a186 ; clear cpu running mask
rl. w0 x2+b51. ;
sn w0 4 ; if a proc is running then
jl. w1 d22. ; interrupt at cpu(x2)
jl. i5. ; goto next cpu
i6: dl. w1 h5. ;
dl. w3 h7. ;
jl x3 ; return
; start cpu(i) i=1,...,last cpu
; call: w1=curr int proc at cpu0 before interrupt, w3=return
; return: all reg. are changed
d26: rs. w3 h7. ;
jl. w3 d28. ; error test at cpu1
rl w0 b57 ; w0:=cur proc(cpu0)
sl w0 1 ; if current proc at cpu0 is not restored then
rs w0 b1 ; restore cur proc(cpu0)
al w2 -2 ;
rs w2 b57 ; no proc to restore before a new interrupt at cpu(i)
al w3 1 ; w3:=mask(cpu0);
i10: ls w3 1 ; w3:=mask(next cpu);
al w2 x2+2 ; w2:=addr(next cpu);
sl w2 a351+1 ; if all cpu is started then
jl. i13. ; goto test first proc
al w0 a353 ; w0:=mask for allowed cpu;
rl. w1 b59. ; w1:=mask for cpu in use;
sz w1 x3 ; if the cpu can not be used or
so w0 x3 ; the cpu is not allowed then
jl. i10. ; goto next cpu else
rl. w0 x2+b51. ;
sh w0 1 ; if cpu(x2) is not waiting for cpu0-interrupt then
jl. i10. ; and goto next cpu
al w1 b2 ; w1:=chain head
i11: rl w1 x1 ; w1:=next proc in time slice queue;
al w0 x1-a16 ; process addr
rs w0 x2+b56 ;
rl w0 x1-a16+a186; w0:=mask for allowed cpu;
sh w0 2047 ; if cpu(x2) is started or
so w0 x3 ; this cpu can not be used then
jl. i11. ; goto next proc;
i12: rl w1 x2+b56 ; else
hs w3 x1+a186 ; set cpu running mask;
i14: al w0 4 ;
rs. w0 x2+b51. ; set start signal
jl. i10. ; goto next cpu
i13: al w2 b2 ;
i16: rl w2 x2 ; w2:= next proc
rl w0 x2-a16+a186; w0:=cpu-mask
so w0 2.1 ; if cpu0 is not allowed then
jl. i16. ; goto next proc else
sl w0 2047 ; if proc is started then
jl. i16. ; goto next proc else
sn w2 (b2) ; if proc already is in front then
jl. (h7.) ; return
jl w3 d5 ; else remove proc
rl w1 b2 ; and
jl w3 d6 ; link proc in front
jl. (h7.) ; return
; init cpu1
d27: rs. w3 h7. ;
rl w3 b65 ; w3:=base of controller descr table;
al. w1 c26. ; w1:=power up entry for cpu1;
rs w1 x3+20<3+a310;
al w2 0 ; select cpu1
jl. w1 d22. ; start cpu(i)
sl w1 h9 ; if cpu1 is not ready then
jl. i17. ; return
i15: rl. w0 b51. ; wait for ready signal
sh w0 0 ; from cpu1
jl. i15. ;
al w0 2 ;
rs. w0 b51.+0;
i17: jl. (h7.) ;
h4: 0
h5: 0
h6: 0
h7: 0
d28: ; error test at cpu1
rl w0 b55 ; w0:=last service addr.cpu1
se w0 c99 ; if no errors then
jl x3 ; return
al. w2 i18. ; else restart cpu1
rs w2 b55 ;
jl. w3 e64. ; and init cpu1
i18: jl c99 ; if not init then return
e.
;
b. h16,i10 w.
c15: ; interrupt at cpu1
al w1 0 ;
rx w1 b56 ; w1:=current process cpu1
rx w1 b1 ; b1:=current process cpu1
rs w1 b57 ; save(current process)
al w1 2 ;
rs. w1 b51.+0 ; set after intterupt
dl. w2 h7. ; w1:=top reg dump; w2:= 2*interrupt number
jl (b55) ; goto interrupt service for cpu1-process
0 ; w1 = top reg. dump
h7: 0 ; w2 = 2*interrupt number
;
c26: al. w3 h0. ;#1 init cpu1
gp w3 b91 ;#1 set inf register addr;
rl w3 b65 ;#1 base of controller descr addr
al. w1 c27. ;#1
rs w1 x3+20<3+a310;#1 set start addr
ri a179 ;#1 return interrupt;
h9: am 1 ;#1
c27: ;#1
al w3 1 ;#1
rs. w3 b51.+0 ;#1
h8:
rl. w2 b51.+0 ;#1
se w2 4 ;#1 if cpu0 is not ready then
jl. h8. ;#1 goto test and wait else
c28: gg w1 b91 ;#1 w1:=inf reg(cpu1)
rl w2 b56 ;#1 w2:=proc addr(cpu1)
dl w0 x2+a170 ;#1 set user exception addr and
ds w0 x1+a325+a328;#1 user escape addr
al w0 x2+a28 ;#1
rs w0 x1+a325+a326;#1 set register dump addr;
ri a179 ;#1 return interrupt;
;#1 system table: monitor mode
0 ; -5 monitor call service addr
h6 ; -3 interrupt service addr
1<23+0 ; -1 status interrupt limit
h0=k-13
h1=k-1 ; inf addr: monitor mode
h2=k+11 ; inf addr: user mode
h3 ; +1 register dump addr
0 ; +3 exception service addr
0 ; +5 escape service addr
;#1 system table: user mode
h4 ; -5 monitor call service addr
h5 ; -3 interrupt - -
1<23 + 6 ; -1 status < 12 + interrupt limit
0 ; +1 register dump addr
0 ; +3 exception service addr
0 ; +5 escape service addr
;#1 monitor register dump addr
h3: 0 ; w0
0 ; w1
0 ; w2
0 ; w3
1<23 ; status monitor mode
c27 ; ic start cpu1 process
0 ; cause
0 ; sb
0 ; cpa
0 ; base
8 ; lower write limit
8.3777 7777 ; upper write limit
0<12 + 6 ; interrupt limits
;#1 interrupt service cpu1
;#1 interrupt level = 14 timer interrupt (or interrupt from cpu0)
;#1 = 16 channel input finis
;#1 = 18 channel input start
;#1 = 20 channel output finis
;#1 = 22 character device interrupt
;#1
;#1
h6: am c99-c0 ;#1 internal interrupt level 2
h4: am c0-c1 ;#1 internal interrupt w3:=monitor call service addr
;#1 external interrupt
h5: al w3 c1 ;#1 w3:=interrupt service addr (level 1)
ds. w2 h7. ;#1 save (w1,w2)
sn w3 c0 ;#1 if internal interrupt then
jl. i6. ;#1 goto i6
sn w2 14 ;#1 if cpu(i) is interrupted from cpu0 then
jl. h9. ;#1 goto start
sl w2 14 ;#1 if interruptlevel > 7 then
jl. c20. ;#1 go interruptservice for other computers
i6:
rs w3 b55 ;#1 set interrupt service addr
al w0 1 ;#1
rs. w0 b51.+0 ;#1
rl w1 b56 ;#1 adrr of curr.cpu1
al w0 0 ;#1
hs w0 x1+a186 ;#1 clear cpu user bit
am -3<3 ;#1 level20
i8: al w3 23<3 ;#1 level23
wa w3 b65 ;#1 base of controller table
i7: rl w1 x3+a313 ;#1 w1:=interrupt level
do w1 (x3+a312) ;#1 interrupt(cpu0)
sx 2.111 ;#1 if buserror then
jl. i7. ;#1 repeat data out;
jl. h8. ;#1 goto wait for interrupt
;
; interrupt service for interrupt caused of data out instructions on
; other computers (HC8000's)
;
; do wreg addr
; wa 1<23+level<3+ 2.001 send data transfer request
; wa>= 0 contents irr
; request to send data specified by level location
; wa =1<23 + message
;
;
;
; di wreg addr
; wb 1<23+level<3+ 2.001 start input
; wb >=0 input to addr specified in level location
; wb = 1<23 + message
;
; level location (8) + level < 3
; *----------*----------*----------*----------*
; ! number of! input or ! interrupt! !
; ! bytes to ! output ! address ! level !
; ! transfer ! address ! ! !
; *----------*----------*----------*----------*
;
c20:
; interrupt 16 channel input finis
; interrupt 18 channnel input start (input request)
; interrupt 20 channel output finis
; interrupt 22 character device interrupt
rl w1 b106 ; w1:=addr(hcdriver)
sn w1 0 ; if no proc then
jl. c28. ; ri(cpu1)
bz w0 x1+a13 ; w0:=state
se w0 a94 ; if the proc is waiting for external interrupt or
sn w0 a104 ; waiting for event then
jl. i9. ; goto start proc
am x2-16 ; else
rs w2 x1+a302+2 ; save interrupt level
jl. c28. ; and goto ri(cpu1)
i9: al w0 1 ;
rs. w0 b51.+0 ; rh.state:=wait interrupt service
rs w2 x1+a28 ; saved w0:=interrupt level
jl. i8. ; goto interrupt cpu0
;
;
;
z.
c21: ; interrupt received at cpu(0) level23
c. a430
al w0 2 ;
rs. w0 b51.+0 ; rh.state:= interrupt served
z.
rl w1 b106 ; w1:=addr of hcdriver proc
al w3 c99 ; insert proc and return to start
jl d10 ;
c. a430
e.
m. end of service for cpu(i)
z.
?,l./b087:/,l1,i/
jl. 0 ; wait forever
c.-1
/,l./b.e10/,i/
z.
/,
f
$disc
;********************
$fpaline
;********************
$host
;********************
$fpasub
;********************
$tabinit
;********************
l./f5=k/,i/
2.000 000 000 001 ; cpu mask: only cpu(0) allowed
0,r.(:a16-a48:)>1
/,l./b2,b2/,d,i/
c. a430
f22,b2
z.
c. -a430
b2,b2
z.
/,l./h2=k/,l1,i/
c. a430
m. dummy internal process(cpu1):
2.000 000 000 010 ; cpu mask: only cpu(1) allowed
0,r.(:a16-a48:)>1
f22=k
f21=k-a16 ; start of dummy process(cpu1)
b2, f5+a16 ; timer q links: initially single in queue
r.(:a17-a16-2:)>1
f21-6, h12 ; first, top of process
r.(:a19-a18:)>1
0<12+0 ; claims
0<12+0 ;
r.(:a301-a21:)>1
1<23 - 2 ; priority = almost greatest integer
r.(:a27-a301:)>1
h11 ; interrupt address
r.(:a170-a27:)>1
h11 ; escape address
0 ; all params
r.(:a28-a171:)>1
c. -1 ; must be used later
rl w3 132 ; dummy loop
rs w3 x3 ;
jl 0 ;
0 ; w3
z.
0,0,0,0
r.(:a32-a31:)>1
1<23 ; status
r.(:a33-a32:)>1
h13 ; ic
r.(:a181-a33:)>1
8 ; cpa
0 ; base
8 ; lower write limit
8388607 ; upper write limit
b54 ;+0<12 ; interrupt levels
r.(:a302-a185:)>1
0 ; save area address
r.(:a303-a302:)>1 ; (fill up for save area, used during upstart)
m. dummy internal reg dump(cpu1)
b. i9 w.
h11: ; register dump
0,r.a180>1 ;
h13:
rl. w1 f21.-2
al w1 x1+2
rs. w1 f21.-2 ;
rl w1 112 ; last sensed clock value
rs. w1 f21.+6 ;
jl. h13. ;
e.
w.
h12=k ; top addr of dummy proc(cpu1)
z.
/,l./segment5:i/,l./g5:/,l1,i/
rs. w2 g17. ;
al w2 a352 ;
rs w2 x3+a186 ; set cpu mask;
rl. w2 g17. ;
/,l./g13:/,l1,i/
g17: 0 ; name table entry
/,
l./g10:/,l./b2+2/,d,i/
c. a430
b2+2 , f21+a16
z.
c. -a430
b2+2 , f5+a16
z.
/,f
$procfnc1
;********************
$procfnc2
;********************
l./m22:/,l./common variables:/,r/;/m./,
l./m151:/,l./a27/,d,i/
al w1 x2+a200 ; index:=first of internal proc
/,l./a4-4/,r/-4;/+a200;/,i/
sn w1 x2 ; if index = internal.kind then
al w1 x2+a27 ; index:=internal.interrupt_addr
/,l./d1./,i/
al w0 1 ;
rs w0 x2+a186 ; allowed cpu := cpu0
/,l./rl.w1d2./,i/
rl w0 x1+8 ; w0:=proc type
/,l./dlw0x2+a44/,i/
sh w0 -1 ; if mirror proc
jl. g0. ; goto g0 else
/,l./g3:/,l1,r/rl/dl/,r/a19/a21/,r/w3/w0/,l1,i/
so. w0 (c6.) ;
/,l3,d8,i/
dl w0 x1+a21 ;
ss w0 x2+a21 ; decrease claims
hl w0 x1+a22 ; set functions mask
so. w0 (c6.) ;
sz. w3 (c4.) ;
/,l2,d1,i/
ds w0 x1+a21 ;
g0: al w0 -1 ;
ba w0 x1+a21 ;
sh w0 -1 ;
jl. j1. ;
hs w0 x1+a21
/,
l./m155:/,l./g16:/,l./dlw1/,i/
rx w2 x3+a34 ;
rl w0 x3+a192 ; w0:= proc type
sl w0 3 ; if mirror proc then
jl. g18. ; skip add claim
/,l./rxw2/,r/rxw2x3+a34/ /,
l./a4-4/,r/-4 /+a200/,
l./f26/,i/
jl. g9.
g18: bz w0 x2+a21 ;
ba. w0 1 ;
hs w0 x2+a21 ;
g9:
/,l./c7:/,i/
c6: 1<23
/,
f
$s1
;********************
$s2
;********************
$catinit
;********************
▶EOF◀