DataMuseum.dk

top - metrics - download

    Length: 3840 (0xf00)
    Types: TextFile
    Names: »lmitxt00b«

└─⟦2c55ea56f⟧ Bits:30001844 SW-save af projekt 1000, Alarm-system
    └─⟦093e2ad1c⟧ 
        └─⟦this⟧ »lmitxt00b« 

TextFile

;;
;;lmitxt00b
;;
;;special timing and sequencing conventions.
;;
;;
;;the microprogram fullfills the following conventions:
;;
;;max h-time:
;;          worstcase time for a sequence containing "h" in all microinstructions
;;          is about 40 microseconds.
;;
;;bf/bfm:
;;          the value of module select(bf/bfm) has only effect in conjunction
;;          with "bd"(read or write signals on the back-plane bus). bf/bfm
;;          may thus be changed forth and back without any effect within the
;;          communication sequences on the back-plane bus, as long as the
;;          bf/bfm register has the correct value when "bd" is performed.
;;
;;h:
;;          there must always be "h" together with "int", "u", and "bd".
;;          throughout memory and i/o communication sequences, there must be "h"
;;          in all microinstructions, including the step just before the first
;;          "bd:=". this is also true for the one instruction sequences
;;          for clearing and setting external interrupt flip-flops.
;;          finally st2, st3, and st5 are only defined, when the preceeding
;;          instructions contained "h".
.p ;;
;;u:
;;          module select may not be changed in an instruction containing "u".
;;          the instruction must contain "h", but the preceeding instruction
;;          is not required to contain "h".
;;
;;int:
;;          "int" must always be present in at least two succeeding
;;          instructions. this will ensure zero data if no external
;;          interrupt flip-flop is set. "int" may occur within other
;;          sequences.
;;
;;ir,int:
;;          there must be at least two steps between "ir:=" and "int".
;;          this will ensure, that the priority chain is stable when
;;          performing "int".
;;
;;st2,st3,st5:
;;          these  conditions are only defined, when the preceeding
;;          instruction contains "h".
;;          they define the status of the module, which was selected
;;          in the preceeding micro-instruction.
;;          selection of an external interrupt flip-flop defines the
;;          status of the corresponding i/o module.
.p ;;
;;memory communication sequences:
;;
;;          before any of the following sequences starts, the address
;;          register in the memory must be selected by module select.
;;
;;          1. read:
;;                    bd:=addr, h r
;;                    data:=bd, h w (b)
;;
;;          2. read with parity error:
;;                    bd:=addr, h r
;;                    data:=bd, h w (b)
;;                    data:=bd, h w (b)
;;
;;          3. read during memory test at startup:
;;                    bd:=addr, h r
;;                    data:=bd, h w (b)
;;                    data:=bd, h w (b)
;;
;;          4. write:
;;                    bd:=addr, h
;;                    bf:= "select the data register", h
;;                    bd:=data, h w (b)
;;
;;          ad 4:
;;                    at most two steps may exist between "bd:=addr, h" and
;;                    "bd:=data, h w (b)". this will limit the delay of the
;;                    refreshing in certain types of memories.
;;
;;          please note, that "r" is always required in the sequences
;;          1, 2, 3, and only in these sequences.
;;
;;non-existing memory modules:
;;          if during read sequences ones are forced out onto the back-plane
;;          bus before performing "data:=bd, h w (b)", then the data will be zero,
;;          if no module is selected. this may be used when examining which
;;          memory modules exist. the following sequence may be used:
;;                    bd:=addr, h r
;;                    0,        h
;;                    data:=bd, h w (b)
.p ;;
▶EOF◀