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Names: »rc3503testl«
└─⟦2c55ea56f⟧ Bits:30001844 SW-save af projekt 1000, Alarm-system
└─⟦093e2ad1c⟧
└─⟦this⟧ »rc3503testl«
\f
0001 m3503
; rc3503 microprogram description.
;
; date 1980.11.11 kneh.
; listing rcsl 52 - aa 1005
; source tape rcsl 52 - aa 1006
; macro source rcsl 52 - aa 1007
;
; des35 source rcsl 52 - aa 1008
; def1 source rcsl 52 - aa 1009
;
; slice register layout.
; ac0 save current w0.
; ac1 current level number.
; ac2 save read address (m:ram).
; ac3 ea (effective address)
; ac4 op (operand).
; ac5 current i/o level.
; ac6 enable/disable flag; =4 if enable else =5.
; ac7 scratch register.
; ac10 constant 8.177000
; ac11 constant 8.400
; ac12 constant 8.2
; ac13 module select.
; ac14 constant 8.37
; ac15 current level shift logical left 3 positions.
; ac16 memory address to mem read/write routines.
; ac17 data to/from mem read/write routines.
\f
!0002 m3503
; rc3503 microprogram description.
; the microprogram listing has the following format:
;
; microaddress word1 word2 word3 word4
; xxxx xxxx xxxx xxxx xxxx
; x means hex ciffer.
; xxxx --> bit 0-15
;
; word1 :
;--------
; bit 0-3 next i0-3 next microinstruction.
; 0 jz jump zero.
; 1 cjs cond jsb pl.
; 2 jmap jump map.
; 3 cjp cond jump pl.
; 4 push push/cond ld cntr
; 5 jsrp cond jsb r/pl.
; 6 cjv cond jump vector.
; 7 jrp cond jump r/pl.
; 8 rfct repeat loop,cntr<>0
; 9 rpct repeat pl,cntr<>0.
; a crtn cond rtn.
; b cjpp cond jump pl&pop.
; c ldct ld cntr&continue.
; d loop test end loop
; e cont continue.
; f twb three-way branch.
;
; bit 4-7 cond 0-3 condition select.
; bit 8-11 asel 0-3 a-slice register select.
; bit 12-15 bsel 0-3 b-slice register select.
\f
!0003 m3503
; rc3503 microprogram description.
; word2 :
; -------
; bit 0-2 slice 0-2 alu destination control.
; bit 3-6 alu func 0-2,c alu function and carry.
; bit 7-9 alu op 0-2 alu source operand.
; bit10 enable hold
; bit 11-12 cload 0-1 carry load control field
; bit 13-15 wreg 0-2 w-register ram address control.
;
; word 3 :
; --------
; bit 0-3 dummy
; bit 4 escape/polx
; bit5 -,sup itr.
; bit 6 test ack.
; bit 7 -,byte en/nxt mar 0.
; bit 8 -,update alu status.
; bit 9 -,update carry.
; bit 10 -,set base
; bit 11 -,syn itr/-,sign extend.
; bit12 -,reg load.
; bit 13 -,ccen
; bit14 -,forward read.
; bit 15 -,inta.
\f
!0004 m3503
; rc3503 microprogram description.
;
; word 4 :
; -------
; bit 0-2 bus source control field.
; bit 3-5 bus destination field.
; bit 6-15 nxt mar 1-10.
\f
!0005 m3503
; log: rcm35 03b -- bj --
;
; date 1980-11-11
;
0010 .rdxo 16
0010 .rdx 16
; constants
01ff aucon= 1ff
0040 citr= 40 ;
003b cpuve= 3b ; cpu number, micro-version.
03ff fi5= 3ff
03fe fi4= 3fe
03fd fi3= 3fd
03fc fi2= 3fc
03fb fi1= 3fb
03fa fi0= 3fa
03ef fia= 3ef ; save of parity error inforation.
03ee fib= 3ee
03ed fic= 3ed
03ec fid= 3ec
03eb fie= 3eb
03ea fif= 3ea ; save of ac17 during parity error routine.
0041 perro= 41 ; parity error frame
0000 ritr= 0 ;
0020 sitr= 20 ; set interrupt (bus 10)
0140 timer= 140 ; timeout
0006 waits= 06 ; sup-itr wait
0008 wctim= 08
0008 .rdx 8
\f
!0006 m3503
; 1980.11.04 kneh.
.title m3503
; rc3503 microprogram.
; initialization routine.
; place the following constants in slice registers:
; ac12:= 2
; ac11:= 400
; ac06:= 4
; ac13:= 1
; ac14:= 37
; ac10:= 1000
; enable interrupt
0000 e0aa 61f8 05fe 6002 init: cont cs00,ar12,br12,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,2
0001 e099 61f8 05fe 6100 cont cs00,ar11,br11,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,400
0002 e0bb 61f8 05fe 6001 cont cs00,ar13,br13,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,1
0003 e0cc 61f8 05fe 601f cont cs00,ar14,br14,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,37
0004 e088 61f8 05fe 6200 cont cs00,ar10,br10,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,1000
0005 e006 61f8 05fe 7404 cont cs00,ar00,br06,ldbf,addz,rsdo,cb,waw,bs3,bd5,doxx,4
0006 e0dd 61f8 05fe 7c80 cont cs00,ar15,br15,ldbf,addz,rsdo,cb,waw,bs3,bd7,doxx,200
0007 3011 7138 05fe aeb9 jp cs00,ar01,br01,ldbf,ands,rsoa,cb,waw,bs5,bd3,doxx,uptab
; debug initialization routine.
0008 6600 2138 05fe a3cc debug: jv cs06,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,map45
0009 3e00 2138 05fa a009 dupdat: cjp cs16,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,dupdat
000a 3600 2138 0dfa a008 cjp cs06,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,debug
000b e000 2138 05fe e000 cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,0
000c 3000 2138 05ee a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&sextend,fetch
; exec one instruction.
000d 3e6b 3078 057a a00d fetcd: cjp cs16,ar06,br13,nonf,ands,rsab,cb,waw,bs5,bd0,doxx&ccen&alustat,fetcd
000e 3000 2138 05fe 03ed jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs0,bd0,doxx,fetca
000f e0ff 3fff f5ff 03ff nop
\f
!0007 m3503
; rc3503 microprogram. 1979.10.07 kneh.
; shift rotate-instructions with ir(7:8)=00.
; the number of shifts of shifts is specified by ir(12:15).
0010 e0bf 71a8 057e 600f shiti: cont cs00,ar13,br17,ldbf,ands,rsdq,cl,waw,bs3,bd0,doxx&alustat,17
; ;b01:= w(current level).
0011 3800 2138 05fa a1ed shlop: cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,nupdat
0012 c0ff 24e8 05f6 a000 ldct cs00,ar17,br17,nonf,sunz,rsob,cl,waw,bs5,bd0,ldcoun,0
; ; q and a13 -----> a17. a17-1 ----> n-counter (am2910).
0013 3777 61e8 0d7a 4015 cjp cs07,ar07,br07,ldbf,addz,rsdo,cl,waw,bs2,bd0,(xdox+nccen)&alustat,shrop
0014 6d00 21e8 05fe a3a0 jv cs15,ar00,br00,nonf,addz,rsdo,cl,waw,bs5,bd0,doxx,rleft
; ; if ir11=1 then jump vector "rleft" else continue.
0015 6d00 20e8 05fe a394 shrop: jv cs15,ar00,br00,nonf,addz,rsob,cl,waw,bs5,bd0,doxx,rright
0016 e0ff 3fff f5ff 03ff nop
0017 e0ff 3fff f5ff 03ff nop
0018 e0ff 3fff f5ff 03ff nop
; shift rotate-instructions with ir(7:8) <> 00.
; the number of shifts is specified by x(12:15).
0019 e077 61f8 05fe 600f shitx: cont cs00,ar07,br07,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,17
001a 307f 716a 057e 4011 jp cs00,ar07,br17,ldbf,ands,rsda,cl,wax,bs2,bd0,xdox&alustat,shlop
; ; (x) and a07 -----> a17.
001b e0ff 3fff f5ff 03ff nop
\f
!0008 m3503
; rc3503 microprogram.
; main loop.fetch routine.
001c 3ec1 61f8 0dfa 0008 yfetch: cjp cs16,ar14,br01,ldbf,addz,rsdo,cb,waw,bs0,bd0,(doxx+nccen),debug
001d 1011 2138 05fe bdf5 js cs00,ar01,br01,nonf,addz,rsoa,cb,waw,bs5,bd7,doxx,gint1
001e e000 61ff 05be 4000 xfetca: cont cs00,ar00,br00,ldbf,addz,rsdo,cb,war,bs2,bd0,xdox&ucarry,0
001f e000 2118 05fe 64c0 cont cs00,ar00,br00,nonf,addz,rsoa,xcb,waw,bs3,bd1,doxx,300
0020 e00e 6108 05fc b000 cont cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,0
0021 e000 2118 05fe 7405 cont cs00,ar00,br00,nonf,addz,rsoa,xcb,waw,bs3,bd5,doxx,5
0022 e0ff 01df 076e 8000 cont cs00,ar17,br17,ldqf,addz,rsdo,xcb,war,bs4,bd0,tack&alustat&sextend,0
0023 6362 5138 05fe b7e4 jv cs03,ar06,br02,ldba,ands,rsoa,cb,waw,bs5,bd5,doxx,sparf
0024 20a0 6067 05fe a800 fetrd: jmap cs00,ar12,br00,ldbf,addz,rsab,cr,war,bs5,bd2,xdox,0
0025 e0ff 3fff f5ff 03ff nop
\f
!0009 m3503
; rc 3503 microprogram
; jump to address calculation map.
; ir jump to routine:
; 78901234
; 00xxxxxx ir(0:4)<24 format a, x=0 fax0
; 01xxxxxx ir(0:4)<24 format a, x<>0 faxn
; 10xxxxxx ir(0:4)<24 format a ,x<>0 faxn
; 11xxxxxx ir(0:4)<24 format a, x<>0 faxn
; 00011110 format b,x=0,i=0 bx001
; 00111110 format b,x=0,i=1 bx0i1
; 01011110 format b,x<>0,i=0 bxn01
; 10011110 format b,x<>0,i=0 bxn01
; 11011110 format b,x<>0,i=0 bxn01
; 01111110 format b,x<>0,i=1 bxni1
; 10111110 format b,x<>0,i=1 bxni1
; 11111110 format b,x<>0,i=1 bxni1
; 00011111 format c,x=0,i=0 cx001
; 00111111 format c,x=0,i=1 cx0i1
; 01011111 format c,x<>0,i=0 cxn01
; 10011111 format c,x<>0,i=0 cxn01
; 11011111 format c,x<>0,i=0 cxn01
; 01111111 format c,x<>0,i=1 cxni1
; 10111111 format c,x<>0,i=1 cxni1
; 11111111 format c,x<>0,i=1 cxni1
; xx011000 read status/word rxc
; xx111000 read block of bytes/word rbx
; 00011001 write control/word,x=0 wxcx0
; 01011001 write control/word,x<>0 wxcxn
; 10011001 write control/word,x<>0 wxcxn
; 11011001 write control/word,x<>0 wxcxn
; xx111001 write block of bytes/word wbx
; 00x11100 shift/rotate,x=0 shiti
; 01x11100 shift/rotate,x<>0 shitx
; 10x11100 shift/rotate,x<>0 shitx
; 11x11100 shift/rotate,x<>0 shitx
; xxx11010 interlevel load ild
; xxx11011 interlevel store ist
; xxx11101 not used update
; xxx01110 not used update
\f
!0010 m3503
; rc3503 microprogram.
; address calculation. format a. x=0.
; when called:
; ac0=w0(current);
; q=d(sign extended);
; return:
; ac3=ea; ac4=operand
0026 e033 60b8 05fe a000 fax0: cont cs00,ar03,br03,ldbf,addz,rsoq,cb,waw,bs5,bd0,doxx,0
0027 2044 60b8 0dfe a000 jmap cs00,ar04,br04,ldbf,addz,rsoq,cb,waw,bs5,bd0,doxx+escape,0
; address calculation. format a. x<>0.
; call: ac0=w0(current); q=d(displacement sign extended);
; return: ac3=ea; ac4=operand;
0028 e033 61ba 05fe 4000 faxn: cont cs00,ar03,br03,ldbf,addz,rsdq,cb,wax,bs2,bd0,xdox,0
0029 103e 610a 05fc b20f js cs00,ar03,br16,ldbf,addz,rsoa,xcl,wax,bs5,bd4,doxx&forread,ywread
002a 20f4 6138 0dfe a000 jmap cs00,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+escape,0
\f
!0011 m3503
; rc3503 microprogram.
; address calculation. format c.(ir(0:4))=31. x<>0.i=0.
; call: ac0=w0(current); q=d(displacement sign extended);
; return: ac3=ea; ac4=operand;
002b 100e 6108 05fc b20f cxn01: js cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
; ; ac17:= a( next word);
002c e0f3 617a 05fe 4000 cont cs00,ar17,br03,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
; ; ac3:= ea;
002d 103e 6108 05fc b20f js cs00,ar03,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
002e e0a0 6067 05fe a800 cont cs00,ar12,br00,ldbf,addz,rsab,cr,war,bs5,bd2,xdox,0
; ; ac17:= st( xn+a);
002f 28f4 6138 0dfe a000 jmap cs10,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,(doxx+escape),0
; address calculation. format c. ir(0:4)=31. x<>0. i=1.
; call: ac0=w0(current); q=d(displacement sign extended);
; return: ac3= ea; ac4= operand = ea;
0030 100e 6108 05fc b20f cxni1: js cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0031 e0f3 617a 05fe 4000 cont cs00,ar17,br03,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
0032 e0a0 6067 05fe a800 cont cs00,ar12,br00,ldbf,addz,rsab,cr,war,bs5,bd2,xdox,0
0033 2834 6138 05fe a000 jmap cs10,ar03,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
\f
!0012 m3503
; rc3503 microprogram.
; address calculation. format c. ir(0:4)=31. x=0. i=0.
; call: ac0=w0(current); q=d(displacement sign extended);
; return: ac3=ea; ac4=operand= st(ea);
0034 100e 6108 05fc b20f cx001: js cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0035 e0f3 6138 05fe a000 cont cs00,ar17,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
0036 10fe 6108 05fc b20f js cs00,ar17,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0037 e0a0 6067 05fe a800 cont cs00,ar12,br00,ldbf,addz,rsab,cr,war,bs5,bd2,xdox,0
0038 28f4 6138 0dfe a000 jmap cs10,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+escape,0
; address calculation .format c. ir(0:4)=31. x=0. i=1.
; call: ac0=w0(current); q=d(displacement sign extended);
; return: ac3=ea; ac4=operand;
0039 100e 6108 05fc b20f cx0i1: js cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
003a e0f3 6138 05fe a000 cont cs00,ar17,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
003b e0a0 6067 05fe a800 cont cs00,ar12,br00,ldbf,addz,rsab,cr,war,bs5,bd2,xdox,0
003c 28f4 6138 0dfe a000 jmap cs10,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+escape,0
\f
!0013 m3503
; rc3503 microprogram.
; address calculation. format b. ir(0:4)=30. x<>0. i=0.
; call: ac0=w0(current);
; return: ac3=ea ; ac4=operand;
003d e033 61fa 05fe 4000 bxn01: cont cs00,ar03,br03,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,0
003e 103e 6108 05fc b20f js cs00,ar03,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
003f 28f4 6138 0dfe a000 jmap cs10,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+escape,0
; address calculation. format b. ir(0:4)=30. x<>0. i=1.
; call: ac0=w0(current);
; return: ac3=ea; ac4=operand;
0040 e033 61fa 05fe 4000 bxni1: cont cs00,ar03,br03,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,0
0041 2834 6138 05fe a000 jmap cs10,ar03,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; rc3503 microprogram.
; address calculation. format b. ir(0:4)=30. x=0. i=1.
0042 e033 7138 05fe a000 bx0i1: cont cs00,ar03,br03,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
0043 2834 6138 0dfe a000 jmap cs10,ar03,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+escape,0
; address calculation. format b. ir(0:4)=30. x=0. i=1.
; call: ac0=w0(current);
; return: ac3=ea; ac4=operand.
0044 e033 7138 05fe a000 bx001: cont cs00,ar03,br03,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
0045 103e 7108 05fc b20f js cs00,ar03,br16,ldbf,ands,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0046 28f4 6138 0dfe a000 jmap cs10,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+escape,0
0047 e0ff 3fff f5ff 03ff nop
0048 e0ff 3fff f5ff 03ff nop
0049 e0ff 3fff f5ff 03ff nop
004a e0ff 3fff f5ff 03ff nop
004b e0ff 3fff f5ff 03ff nop
004c e0ff 3fff f5ff 03ff nop
004d e0ff 3fff f5ff 03ff nop
004e e0ff 3fff f5ff 03ff nop
\f
!0014 m3503
; interlevel store (ist).
; store the w-register into the working register specified by x
; from interruption level n. the contents of w remain unchanged.
; control the status of the interruption system as follows:
; x(nth level):= w(current level).
; if code= d then enable:=0.
; if code= e then enable:=1.
; if code= s then interrupt(n):=1.
004f e077 61e8 05fe 4000 ist: cont cs00,ar07,br07,ldbf,addz,rsdo,cl,waw,bs2,bd0,xdox,0
; ; b07:= w(current level).
0050 e0c3 7028 05fe bc00 cont cs00,ar14,br03,ldbf,ands,rsaq,cl,waw,bs5,bd7,doxx,0
; ; q and a14 ---> wadd register.
0051 e0ee 61ff 05fe 4000 istx: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,war,bs2,bd0,xdox,0
0052 e0ee 2138 05fe bc00 cont cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd7,doxx,0
0053 e077 20ea 05fe a800 cont cs00,ar07,br07,nonf,addz,rsob,cl,wax,bs5,bd2,xdox,0
; ; b07 ---> x(nth level).
0054 6ddd 20e8 05fe bf90 jv cs15,ar15,br15,nonf,addz,rsob,cl,waw,bs5,bd7,doxx,upitr
; ; b15 ---> wadd register (set cur level).
0055 e0ff 3fff f5ff 03ff nop
0056 e0ff 3fff f5ff 03ff nop
; interlevel load (ild).
; load the w-register with the working register specified by x from
; interruption level n.control the status of the interruption system as
; follows:
; w(current level):= x(nth level).
; if code= d then enable:= 0.
; if code= e then enable:= 1.
; if code= s then interrupt(n):=1.
0057 e0c3 702a 05fe bc00 ild: cont cs00,ar14,br03,ldbf,ands,rsaq,cl,wax,bs5,bd7,doxx,0
; ; q and a14 --> wadd,b16.
0058 e0ee 61ff 05fe 4000 ildx: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,war,bs2,bd0,xdox,0
0059 e0ee 6138 05fe bc00 cont cs00,ar16,br16,ldbf,addz,rsoa,cb,waw,bs5,bd7,doxx,0
005a e077 61ea 05fe 4000 cont cs00,ar07,br07,ldbf,addz,rsdo,cl,wax,bs2,bd0,xdox,0
; ; b02:= (x).
005b e0dd 20e8 05fe bc00 cont cs00,ar15,br15,nonf,addz,rsob,cl,waw,bs5,bd7,doxx,0
; ; b15 --> wadd.
005c 6d77 20e8 05fe ab90 jv cs15,ar07,br07,nonf,addz,rsob,cl,waw,bs5,bd2,xdox,upitr
; ; b02---> w(current level).
005d e0ff 3fff f5ff 03ff nop
005e e0ff 3fff f5ff 03ff nop
\f
!0015 m3503
; rc3503 microprogram.
; subroutines.
; routine to set the interrupt level specified in a16(9:15).
005f e0e8 2060 05fe a600 sitrn: cont cs00,ar16,br10,nonf,addz,rsab,cr,waw,bs5,bd1,doxx,1000
; ; a17:= a16+(-, iors0=1,-,iors1=0).
0060 e0ff 61e0 05fe 6020 cont cs00,ar17,br17,ldbf,addz,rsdo,cr,waw,bs3,bd0,doxx,sitr
; ; load set condition in reg 17 (bus 10= 1).
0061 a0fe 2c40 07fe b000 rtn cs00,ar17,br16,nonf,rors,rsab,xcr,waw,bs5,bd4,tack,0
; ; set intr. and return.
0062 e0ff 3fff f5ff 03ff nop
; routine to reset the interrupt level specified in a16(9:15).
0063 e0e8 2060 05fe a600 citrn: cont cs00,ar16,br10,nonf,addz,rsab,cr,waw,bd5,bd1,doxx,1000
; ; a17:= a16 +(-,iors0=1,-,iors1=0).
; ; modul select + set/clear condition
0064 a0ce 3044 07fe b000 rtn cs00,ar14,br16,nonf,ands,rsab,xcr,wap,bs5,bd4,tack,0
; ; clear interrupt and return.
0065 e0ff 3fff f5ff 03ff nop
0066 e0ff 3fff f5ff 03ff nop
0067 e0ff 3fff f5ff 03ff nop
0068 e0ff 3fff f5ff 03ff nop
\f
!0016 m3503
; rc3503 microprogram.
; arithmetic and logical instructions.
; ldr. load register. format a.
0069 3044 2128 05fe a9f7 ldr1: jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,cupdat
006a e0ff 3fff f5ff 03ff nop
006b e0ff 3fff f5ff 03ff nop
006c e0ff 3fff f5ff 03ff nop
006d e0ff 3fff f5ff 03ff nop
; arithmetic and logical instructions.
; ldr. load register. format b&c.
006e 3144 2128 0dfa a9f7 ldr23: cjp cs01,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,(xdox+nccen),cupdat
006f e0a4 617a 05fe 4000 cont cs00,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
0070 3044 212a 05fe a9f7 jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,cupdat
0071 e0ff 3fff f5ff 03ff nop
0072 e0ff 3fff f5ff 03ff nop
0073 e0ff 3fff f5ff 03ff nop
0074 e0ff 3fff f5ff 03ff nop
\f
!0017 m3503
; rc3503 microprogram.
; arithmetic and logical instructions.
; ldc. load complement. format a.
; w:= -operand (ac4); carry:= alu carry.
0075 e044 2b28 057e a800 ldc1: cont cs00,ar04,br04,nonf,subo,rsoa,cl,waw,bs5,bd2,(xdox&alustat),0
0076 3044 2b30 05be a1ed jp cs00,ar04,br04,nonf,subo,rsoa,ca,waw,bs5,bd0,doxx&ucarry,nupdat
0077 e0ff 3fff f5ff 03ff nop
0078 e0ff 3fff f5ff 03ff nop
0079 e0ff 3fff f5ff 03ff nop
; arithmetic and logical instructions.
; ldc. load complement. format b&c.
007a e044 2b28 057e a800 ldc23: cont cs00,ar04,br04,nonf,subo,rsoa,cl,waw,bs5,bd2,(xdox&alustat),0
007b 3144 2b30 0dba a1ed cjp cs01,ar04,br04,nonf,subo,rsoa,ca,waw,bs5,bd0,doxx&ucarry+nccen,nupdat
007c e0a4 617a 05fe 4000 cont cs00,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
007d 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
007e e0ff 3fff f5ff 03ff nop
; rc3503 microprogram.
; arithmetic and logical instructions.
; ldi. load indirect.
007f 104e 6108 05fc b20f ldi1: js cs00,ar04,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0080 30f4 6128 05fe a9ed jp cs00,ar17,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
0081 3000 2138 05fe a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,fetch
0082 e0ff 3fff f5ff 03ff nop
; arithmetic and logical instructions.
; ldi. load indirect. format b&c.
0083 104e 6108 05fc b20f ldi23: js cs00,ar04,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0084 31ff 2128 0dfa a9ed cjp cs01,ar17,br17,nonf,addz,rsoa,cl,waw,bs5,bd2,(xdox+nccen),nupdat
0085 e0a4 616a 05fe 4000 cont cs00,ar12,br04,ldbf,addz,rsda,cl,wax,bs2,bd0,xdox,0
0086 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
0087 e0ff 3fff f5ff 03ff nop
0088 e0ff 3fff f5ff 03ff nop
\f
!0018 m3503
; rc3503 microprogram.
; arithmetic and logical instructions.
; str.store register. format a.
; st(ea):= w.
0089 e03e 6138 05fe a000 str1: cont cs00,ar03,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
008a 10ff 61f8 05fe 4177 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,wwrite
008b 3000 61e7 05fe 41ee jp cs00,ar00,br00,ldbf,addz,rsdo,cr,war,bs2,bd0,xdox,qupdat
008c e0ff 3fff f5ff 03ff nop
008d e0ff 3fff f5ff 03ff nop
; arithmetic and logical instructions.
; str. store register. format b&c.
; if i=0 then st(ea):= w;
; if i=1 and x<>0 then x:=w;
; if i=1 and x=0 then st(ea):=w;
; if n=1 then x:=x+2;
008e e03e 6138 05fe a000 stri0: cont cs00,ar03,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
008f 10ff 61f8 05fe 4177 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,wwrite
0090 31a4 617a 0dfa 41ed cjp cs01,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,(xdox+nccen),nupdat
0091 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
0092 e044 61f8 05fe 4000 strix: cont cs00,ar04,br04,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,0
0093 3144 212a 0dfa a9ed cjp cs01,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,(xdox+nccen),nupdat
0094 30a4 206a 05fe a9ed jp cs00,ar12,br04,nonf,addz,rsab,cl,wax,bs5,bd2,xdox,nupdat
0095 e0ff 3fff f5ff 03ff nop
0096 e0ff 3fff f5ff 03ff nop
; rc3503 microprogram.
; arithmetic and logical instructions.
; store indirect. format a.
; st(operand):= w;
0097 e04e 6138 05fe a000 sti1: cont cs00,ar04,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
0098 10ff 61f8 05fe 4177 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,wwrite
0099 3000 61e7 05fe 41ee jp cs00,ar00,br00,ldbf,addz,rsdo,cr,war,bs2,bd0,xdox,qupdat
009a e0ff 3fff f5ff 03ff nop
009b e0ff 3fff f5ff 03ff nop
; arithmetic and logical instructions.
; store indirect. format b&c.
009c e04e 6138 05fe a000 sti23: cont cs00,ar04,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
009d 10ff 61f8 05fe 4177 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,wwrite
009e 31a4 617a 0dfa 41ed cjp cs01,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,(xdox+nccen),nupdat
009f 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
00a0 e0ff 3fff f5ff 03ff nop
00a1 e0ff 3fff f5ff 03ff nop
\f
!0019 m3503
; rc3503 microprogram.
; arithmetic and logical instructions.
; xsr. exchange register and store. format a.
; i=1(x=0); st(ea):=w; w:=ea;
; i=0(x<>0); a:=st(ea);st(ea):=w;w:=a;
00a2 e03e 6138 05fe a000 xsrai: cont cs00,ar03,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
00a3 10ff 61f8 05fe 4177 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,wwrite
00a4 3044 2128 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
00a5 e0ff 3fff f5ff 03ff nop
00a6 e0ff 3fff f5ff 03ff nop
; arithmetic and logical instructions.
; xsr.exchange register and store. format b&c.
; if i=0 then a:=st(ea);st(ea):=w;w:=a;
; if i=1 and x=0 then st(ea):=w;w:=ea.
; if i=1 and x<>0 then a:=x;x:=w;w:=a;
00a7 e03e 6138 05fe a000 xsrb0: cont cs00,ar03,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
00a8 10ff 61f8 05fe 4177 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,wwrite
00a9 3144 2128 0dfa a9ed cjp cs01,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,(xdox+nccen),nupdat
00aa e0a4 617a 05fe 4000 cont cs00,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
00ab 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
00ac e033 61f8 05fe 4000 xsrbx: cont cs00,ar03,br03,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,0
00ad e044 2128 05fe a800 cont cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,0
00ae 3133 212a 0dfa a9ed cjp cs01,ar03,br03,nonf,addz,rsoa,cl,wax,bs5,bd2,(xdox+nccen),nupdat
00af 30a3 206a 05fe a9ed jp cs00,ar12,br03,nonf,addz,rsab,cl,wax,bs5,bd2,xdox,nupdat
00b0 e0ff 3fff f5ff 03ff nop
00b1 e0ff 3fff f5ff 03ff nop
\f
!0020 m3503
; rc3503 microprogram.
; arithmetic and logical instructions.
;ldb. load byte. format a.
00b2 e033 3178 057e 6001 lba: cont cs00,ar03,br03,nonf,ands,rsda,cb,waw,bs3,bd0,(doxx&alustat),1
00b3 3844 2138 05fa a0b6 cjp cs10,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,(doxx&ccen),ldbal
00b4 e044 7178 05fe 60ff cont cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
00b5 3044 2128 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
00b6 e044 61f8 05fe 2000 ldbal:cont cs00,ar04,br04,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,0
00b7 e044 7178 05fe 60ff cont cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
00b8 3044 2128 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
00b9 e0ff 3fff f5ff 03ff nop
00ba e0ff 3fff f5ff 03ff nop
; ldb. load byte. format b&c.
00bb e033 3178 057e 6001 ldbb: cont cs00,ar03,br03,nonf,ands,rsda,cb,waw,bs3,bd0,(doxx&alustat),1
00bc 3844 2138 05fa a0c1 cjp cs10,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,(doxx&ccen),ldbbl
00bd e044 7178 05fe 60ff ldbl: cont cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
00be 3144 2128 0dfa a9ed cjp cs01,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,(xdox+nccen),nupdat
00bf e044 63fa 05fe 4000 cont cs00,ar04,br04,ldbf,addo,rsdo,cb,wax,bs2,bd0,xdox,0
00c0 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
00c1 3044 61f8 05fe 20bd ldbbl: jp cs00,ar04,br04,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,ldbl
00c2 e0ff 3fff f5ff 03ff nop
00c3 e0ff 3fff f5ff 03ff nop
\f
!0021 m3503
; rc3503 microprogram.
; arithmetic and logical instruction.
; stb. store byte. format a.
00c4 e03e 6138 05fe a000 stba: cont cs00,ar03,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
00c5 10ff 61f8 05fe 417b js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,bwrite
00c6 3000 61e7 05fe 41ee jp cs00,ar00,br00,ldbf,addz,rsdo,cr,war,bs2,bd0,xdox,qupdat
00c7 e0ff 3fff f5ff 03ff nop
00c8 e0ff 3fff f5ff 03ff nop
; stb. store byte. format b&c.
; if n=1 then x:=x+1
00c9 e03e 6138 05fe a000 stbb: cont cs00,ar03,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
00ca 10ff 61f8 05fe 417b js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs2,bd0,xdox,bwrite
00cb 3144 63fa 0dfa 41ed cjp cs01,ar04,br04,ldbf,addo,rsdo,cb,wax,bs2,bd0,(xdox+nccen),nupdat
00cc 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
00cd e0ff 3fff f5ff 03ff nop
00ce e0ff 3fff f5ff 03ff nop
; rc3503 microprogram.
; arithmetic and logical instruction.
; add. add integer word. format a.
; w:= w+operand.
00cf e044 6170 05be 4000 adda: cont cs00,ar04,br04,ldbf,addz,rsda,ca,waw,bs2,bd0,(xdox&ucarry),0
00d0 3044 2128 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
00d1 e0ff 3fff f5ff 03ff nop
00d2 e0ff 3fff f5ff 03ff nop
; add. add integer word. format b&c.
; w:= w+operand;
; if n=1 then x:=x+2;
00d3 e044 6170 05be 4000 addb: cont cs00,ar04,br04,ldbf,addz,rsda,ca,waw,bs2,bd0,(xdox&ucarry),0
00d4 3144 2128 0dfa a9ed logll: cjp cs01,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox+nccen,nupdat
00d5 e0a4 617a 05fe 4000 cont cs00,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
00d6 3044 212a 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,nupdat
00d7 e0ff 3fff f5ff 03ff nop
00d8 e0ff 3fff f5ff 03ff nop
\f
!0022 m3503
; rc3503 microprogram.
; arithmetic and logical instruction.
; sub. subtract integer word. format a.
; w:=w-operand; carry:=alu carry.
00d9 e044 6b70 05be 4000 suba: cont cs00,ar04,br04,ldbf,subo,rsda,ca,waw,bs2,bd0,(xdox&ucarry),0
00da 3044 2128 05fe a9ed jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
00db e0ff 3fff f5ff 03ff nop
00dc e0ff 3fff f5ff 03ff nop
; sub.subtract integer word. format b&c.
; w:=w-operand;
; if n=1 then x:=x+2;
00dd 3044 6b70 05be 40d4 subb: jp cs00,ar04,br04,ldbf,subo,rsda,ca,waw,bs2,bd0,(xdox&ucarry),logll
00de e0ff 3fff f5ff 03ff nop
00df e0ff 3fff f5ff 03ff nop
\f
!0023 m3503
; rc3503 microprogram.
; arithmetic and logical instruction.
; and. logic and. format a.
; w:=w and operand.
00e0 e044 7178 05fe 4000 anda: cont cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs2,bd0,xdox,0
00e1 3044 2128 05fe a9f7 jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,cupdat
00e2 e0ff 3fff f5ff 03ff nop
00e3 e0ff 3fff f5ff 03ff nop
; logic and . format b&c.
00e4 3044 7178 05fe 41f9 andb: jp cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs2,bd0,xdox,cogll
00e5 e0ff 3fff f5ff 03ff nop
00e6 e0ff 3fff f5ff 03ff nop
; lor. logic or. format a.
; w:= w or operand.
00e7 e044 6d78 05fe 4000 lora: cont cs00,ar04,br04,ldbf,rors,rsda,cb,waw,bs2,bd0,xdox,0
00e8 3044 2128 05fe a9f7 jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,cupdat
00e9 e0ff 3fff f5ff 03ff nop
00ea e0ff 3fff f5ff 03ff nop
; lor. logic or . format b&c.
00eb 3044 6d78 05fe 41f9 lorb: jp cs00,ar04,br04,ldbf,rors,rsda,cb,waw,bs2,bd0,xdox,cogll
00ec e0ff 3fff f5ff 03ff nop
00ed e0ff 3fff f5ff 03ff nop
; xor. logical exclusive or. format a.
00ee e044 7978 05fe 4000 xora: cont cs00,ar04,br04,ldbf,exor,rsda,cb,waw,bs2,bd0,xdox,0
00ef 3044 2128 05fe a9f7 jp cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,cupdat
00f0 e0ff 3fff f5ff 03ff nop
00f1 e0ff 3fff f5ff 03ff nop
; xor. logical exclusive or. format b&c.
00f2 3044 7978 05fe 41f9 xorb: jp cs00,ar04,br04,ldbf,exor,rsda,cb,waw,bs2,bd0,xdox,cogll
00f3 e0ff 3fff f5ff 03ff nop
00f4 e0ff 3fff f5ff 03ff nop
\f
!0024 m3503
; rc3503 microprogram.
; arithmetic and logical instructions.
; lce. load clear enable. format a.
00f5 e044 2128 05fe a800 lce1: cont cs00,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,0
00f6 e018 2078 05fe a400 lcec: cont cs00,ar01,br10,nonf,addz,rsab,cb,waw,bs5,bd1,doxx,0
00f7 30c1 3058 07fe b1f2 jp cs00,ar14,br01,nonf,ands,rsab,xcb,waw,bs5,bd4,tack,eupdat
00f8 e0ff 3fff f5ff 03ff nop
00f9 e0ff 3fff f5ff 03ff nop
00fa e0ff 3fff f5ff 03ff nop
00fb e0ff 3fff f5ff 03ff nop
00fc e0ff 3fff f5ff 03ff nop
; lce. load clear enable. format b&c.
00fd 3144 2128 0dfa a8f6 lce23: cjp cs01,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox+nccen,lcec
00fe e0a4 617a 05fe 4000 cont cs00,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
00ff 3044 212a 05fe a8f6 jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,lcec
0100 e0ff 3fff f5ff 03ff nop
0101 e0ff 3fff f5ff 03ff nop
; rc3503 microprogram.
; arithmetic and logical instructions.
; rsw. read switches. format a.
0102 e000 2138 05fe 7cd4 rsw1: cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd7,doxx,4+120+128.
0103 e000 213f 05fe 4000 cont cs00,ar00,br00,nonf,addz,rsoa,cb,war,bs2,bd0,xdox,0
0104 e055 61f8 05fe 2000 cont cs00,ar05,br05,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,0
0105 e000 2138 05fe 7cdc cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd7,doxx,4+130+128.
0106 e055 617f 05fe 4000 cont cs00,ar05,br05,ldbf,addz,rsda,cb,war,bs2,bd0,xdox,0
0107 e0dd 2138 05fe bc00 cont cs00,ar15,br15,nonf,addz,rsoa,cb,waw,bs5,bd7,doxx,0
0108 3055 2128 05fe a9ed jp cs00,ar05,br05,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
0109 e0ff 3fff f5ff 03ff nop
010a e0ff 3fff f5ff 03ff nop
; rsw. read switches. format b&c.
010b 31a4 617a 0dfa 4102 rsw23: cjp cs01,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox+nccen,rsw1
010c 3044 212a 05fe a902 jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,rsw1
010d e0ff 3fff f5ff 03ff nop
010e e0ff 3fff f5ff 03ff nop
\f
!0025 m3503
; rc3503 microprogram.
; branch and continue instructions.
; bgw. branch if greater. format b&c.
; w0:= if w>operand then b else w0+2;
010f e047 7978 057e 4000 bgwb: cont cs00,ar04,br07,ldbf,exor,rsda,cb,waw,bs2,bd0,xdox&alustat,0
0110 e077 2138 057e a000 cont cs00,ar07,br07,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
0111 3044 2178 0d7a 411b cjp cs00,ar04,br04,nonf,addz,rsda,cb,waw,bs2,bd0,xdox&alustat+nccen,blp10
0112 3044 2978 0d7a 4118 cjp cs00,ar04,br04,nonf,subz,rsda,cb,waw,bs2,bd0,xdox&alustat+nccen,carg1
0113 3000 2138 05fe a115 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,blp01
0114 3ba0 2078 05fa a118 blp03: cjp cs13,ar12,br00,nonf,addz,rsab,cb,waw,bs5,bd0,(doxx&ccen),carg1
0115 310e 6138 0dfa a202 blp01: cjp cs01,ar00,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,(doxx+nccen),vupdat
0116 10ff 2138 05fe a20e js cs00,ar17,br17,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,xwread
0117 30f0 6127 05fe a9ed jp cs00,ar17,br00,ldbf,addz,rsoa,cr,war,bs5,bd2,xdox,nupdat
0118 310e 6138 05fa a202 carg1: cjp cs01,ar00,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,vupdat
0119 10ff 2138 05fe a20e js cs00,ar17,br17,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,xwread
011a 30f0 6127 05fe a9ed jp cs00,ar17,br00,ldbf,addz,rsoa,cr,war,bs5,bd2,xdox,nupdat
011b 3044 2978 057e 4114 blp10: jp cs00,ar04,br04,nonf,subz,rsda,cb,waw,bs2,bd0,xdox&alustat,blp03
011c e0ff 3fff f5ff 03ff nop
; bgw. branch if greater. format a.
011d e047 7978 05fe 4000 bgwa: cont cs00,ar04,br07,ldbf,exor,rsda,cb,waw,bs2,bd0,xdox,0
011e e077 2138 057e a000 cont cs00,ar07,br07,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
011f 3044 2138 0d7a 4125 cjp cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs2,bd0,xdox&alustat+nccen,blp11
0120 3044 2978 0d7a 4123 cjp cs00,ar04,br04,nonf,subz,rsda,cb,waw,bs2,bd0,xdox&alustat+nccen,blp15
0121 3000 2138 05fe a202 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vupdat
0122 3ba0 2078 0dfa a202 blp02: cjp cs13,ar12,br00,nonf,addz,rsab,cb,waw,bs5,bd0,(doxx+nccen),vupdat
0123 100e 6138 05fe a20e blp15: js cs00,ar00,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,xwread
0124 30f0 6127 05fe a9ed jp cs00,ar17,br00,ldbf,addz,rsoa,cr,war,bs5,bd2,xdox,nupdat
0125 3044 2978 057e 4122 blp11: jp cs00,ar04,br04,nonf,subz,rsda,cb,waw,bs2,bd0,xdox&alustat,blp02
0126 e0ff 3fff f5ff 03ff nop
\f
!0026 m3503
; rc3503 microprogram.
; branch and continue instruction.
; bew. branch if equal. format a.
; w0:= if w=operand then b else w0+2
0127 e044 2b78 057e 4000 bewa: cont cs00,ar04,br04,nonf,subo,rsda,cb,waw,bs2,bd0,(xdox&alustat),0
0128 38a0 2078 0dfa a202 blp04: cjp cs10,ar12,br00,nonf,addz,rsab,cb,waw,bs5,bd0,(doxx+nccen),vupdat
0129 100e 6108 05fc b20f js cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
012a 30f0 6127 05fe a9ed jp cs00,ar17,br00,ldbf,addz,rsoa,cr,war,bs5,bd2,xdox,nupdat
012b e0ff 3fff f5ff 03ff nop
012c e0ff 3fff f5ff 03ff nop
; bew. branch if equal. format b&c.
012d e044 2b78 057e 4000 bewb: cont cs00,ar04,br04,nonf,subo,rsda,cb,waw,bs2,bd0,(xdox&alustat),0
012e 38a0 2078 05fa a118 blp05: cjp cs10,ar12,br00,nonf,addz,rsab,cb,waw,bs5,bd0,doxx&ccen,carg1
012f 310e 6138 0dfa a202 cjp cs01,ar00,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,(doxx+nccen),vupdat
0130 10ee 2108 05fc b20f js cs00,ar16,br16,nonf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0131 30f0 6127 05fe a9ed jp cs00,ar17,br00,ldbf,addz,rsoa,cr,war,bs5,bd2,xdox,nupdat
0132 e0ff 3fff f5ff 03ff nop
0133 e0ff 3fff f5ff 03ff nop
\f
!0027 m3503
; rc3503 microprogram.
; branch and continue instructions.
; branch if less. blw. format a.
; w0:= if w<operand then b else w0+2.
0134 e047 7978 05fe 4000 blwa: cont cs00,ar04,br07,ldbf,exor,rsda,cb,waw,bs2,bd0,xdox,0
0135 e077 2138 057e a000 cont cs00,ar07,br07,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
0136 3044 2138 0d7a 413a cjp cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs2,bd0,xdox&alustat+nccen,blp13
0137 3044 2578 057a 4123 cjp cs00,ar04,br04,nonf,sunz,rsda,cb,waw,bs2,bd0,xdox&alustat&ccen,blp15
0138 3000 2138 05fe a202 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vupdat
0139 3044 2138 05fe a122 jp cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,blp02
013a 3044 2578 057e 4122 blp13: jp cs00,ar04,br04,nonf,sunz,rsda,cb,waw,bs2,bd0,xdox&alustat,blp02
013b e0ff 3fff f5ff 03ff nop
; blw. branch if less. format b&c.
013c e047 7978 05fe 4000 blwb: cont cs00,ar04,br07,ldbf,exor,rsda,cb,waw,bs2,bd0,xdox,0
013d e077 2138 057e a000 cont cs00,ar07,br07,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
013e 3044 2138 0d7a 4141 cjp cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs2,bd0,xdox&alustat+nccen,blp12
013f 3044 2578 057a 4118 cjp cs00,ar04,br04,nonf,sunz,rsda,cb,waw,bs2,bd0,xdox&alustat&ccen,carg1
0140 3044 2138 05fe a115 jp cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,blp01
0141 3044 2578 057e 4114 blp12: jp cs00,ar04,br04,nonf,sunz,rsda,cb,waw,bs2,bd0,xdox&alustat,blp03
0142 e0ff 3fff f5ff 03ff nop
0143 e0ff 3fff f5ff 03ff nop
; bgb. branch if greater than byte. format a.
; a(0:7):=0;
; a(8:15):= if ea(15)=0 then operand(0:7) else operand(8:15);
0144 1000 2138 05fe a14c bgba: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,boper
0145 3044 2b78 057e 411d jp cs00,ar04,br04,nonf,subo,rsda,cb,waw,bs2,bd0,(xdox&alustat),bgwa
0146 e0ff 3fff f5ff 03ff nop
0147 e0ff 3fff f5ff 03ff nop
; bgb. branch if greater than byte. format b&c.
0148 1000 2138 05fe a14c bgbb: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,boper
0149 3044 2b78 057e 410f jp cs00,ar04,br04,nonf,subo,rsda,cb,waw,bs2,bd0,(xdox&alustat),bgwb
014a e0ff 3fff f5ff 03ff nop
014b e0ff 3fff f5ff 03ff nop
; subroutine to get the byte operand.
; call: ac4=operand.
; rtn: ac4(8:15):= if ea(15)=0 then ac4(0:7) else ac4(8:15);
; ac4(0:7):= 0;
014c e033 3178 057e 6001 boper: cont cs00,ar03,br03,nonf,ands,rsda,cb,waw,bs3,bd0,(doxx&alustat),1
014d 3844 2138 0dfa a14f cjp cs10,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,(doxx+nccen),bopbl
014e e044 61f8 05fe 2000 bopal: cont cs00,ar04,br04,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,0
014f a044 7178 05fe 60ff bopbl: rtn cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
0150 e0ff 3fff f5ff 03ff nop
0151 e0ff 3fff f5ff 03ff nop
\f
!0028 m3503
; rc3503 microprogram.
; branch and continue instruction.
; branch if equal to byte. beb. format a.
; a(0:7):=0;
; a(8:15):= if ea(15)=0 then operand(0:7) else operand(8:15);
; w0:= if w=a then b else w0+2.
0152 1000 2138 05fe a14c beba: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,boper
0153 3044 2b78 057e 4128 jp cs00,ar04,br04,nonf,subo,rsda,cb,waw,bs2,bd0,(xdox&alustat),blp04
0154 e0ff 3fff f5ff 03ff nop
0155 e0ff 3fff f5ff 03ff nop
; beb. branch if equal to byte. format b&c.
0156 1000 2138 05fe a14c bebb: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,boper
0157 3044 2b78 057e 412e jp cs00,ar04,br04,nonf,subo,rsda,cb,waw,bs2,bd0,(xdox&alustat),blp05
0158 e0ff 3fff f5ff 03ff nop
0159 e0ff 3fff f5ff 03ff nop
; blb. branch if less than byte. format a.
; a(0:7):=0;
; a(8:15):= if ea(15)=0 then operand(0:7) else operand(8:15);
; w0:= if w<a then belse w0+2;
015a 1000 2138 05fe a14c blba: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,boper
015b 3044 2778 057e 4134 jp cs00,ar04,br04,nonf,suno,rsda,cb,waw,bs2,bd0,(xdox&alustat),blwa
015c e0ff 3fff f5ff 03ff nop
015d e0ff 3fff f5ff 03ff nop
; blb. branch if less than byte. format b&c.
015e 1000 2138 05fe a14c blbb: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,boper
015f 3044 2b78 057e 413c jp cs00,ar04,br04,nonf,subo,rsda,cb,waw,bs2,bd0,(xdox&alustat),blwb
0160 e0ff 3fff f5ff 03ff nop
0161 e0ff 3fff f5ff 03ff nop
\f
!0029 m3503
; rc3503 microprogram.
; branch and continue instructions.
; bsz. branch if all selected bits are zero. format a.
; a:=w and operand;
; w0:= if a=0 then b else w0+2;
0162 3044 3178 057e 4128 bsza: jp cs00,ar04,br04,nonf,ands,rsda,cb,waw,bs2,bd0,(xdox&alustat),blp04
; ; bsz. branch if all selected bits are zero. format b&c.
0163 e0ff 3fff f5ff 03ff nop
0164 e0ff 3fff f5ff 03ff nop
0165 3044 3178 057e 412e bszb: jp cs00,ar04,br04,nonf,ands,rsda,cb,waw,bs2,bd0,(xdox&alustat),blp05
0166 e0ff 3fff f5ff 03ff nop
0167 e0ff 3fff f5ff 03ff nop
; bop. branch if odd parity. format a.
; a:= w and operand;
; w0:= if odd a then b else w0+2;
0168 e044 7178 05fe 4000 bopa: cont cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs2,bd0,xdox,0
0169 e044 2138 057e a000 cont cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,(doxx&alustat),0
016a 63a0 2078 05fe a3d4 jv cs03,ar12,br00,nonf,addz,rsab,cb,waw,bs5,bd0,doxx,xpeven
016b 100e 6108 05fc b20f xbopa: js cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
016c 30f0 6127 05fe a9ed jp cs00,ar17,br00,ldbf,addz,rsoa,cr,war,bs5,bd2,xdox,nupdat
016d e0ff 3fff f5ff 03ff nop
016e e0ff 3fff f5ff 03ff nop
; bop. branch if odd parity. format b&c
016f e044 7178 05fe 4000 bopb: cont cs00,ar04,br04,ldbf,ands,rsda,cb,waw,bs2,bd0,xdox,0
0170 e044 2138 057e a000 cont cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,(doxx&alustat),0
0171 63a0 2078 05fe a3d8 jv cs03,ar12,br00,nonf,addz,rsab,cb,waw,bs5,bd0,doxx,peven
0172 310e 6138 0dfa a202 bopc: cjp cs01,ar00,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,vupdat
0173 10ee 2108 05fc b20f js cs00,ar16,br16,nonf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,ywread
0174 30f0 6127 05fe a9ed jp cs00,ar17,br00,ldbf,addz,rsoa,cr,war,bs5,bd2,xdox,nupdat
0175 e0ff 3fff f5ff 03ff nop
0176 e0ff 3fff f5ff 03ff nop
\f
!0030 m3503
; routine to write into memory (word).
; ac16=address. ac17=data. (ac16-17 bitslice registers).
0177 e000 2028 05fe 64c0 wwrite: cont cs00,ar00,br00,nonf,addz,rsaq,cl,waw,bs3,bd1,doxx,300
; ; 8.306 --> modul select register.
0178 e0ee 2108 05fe b000 cont cs00,ar16,br16,nonf,addz,rsoa,xcl,waw,bs5,bd4,doxx,0
; ; load address(ac16) out on the back plane bus.
0179 e000 2009 05fe 64c1 cont cs00,ar00,br00,nonf,addz,rsaq,xcl,wbw,bs3,bd1,doxx,301
; ; set modul select to data mode.
017a a0ff 2108 07fe b000 rtn cs00,ar17,br17,nonf,addz,rsoa,xcl,waw,bs5,bd4,tack,0
; ; return from subroutine.
; routine to write into memory (byte).
017b e000 2028 05fe 64c0 bwrite: cont cs00,ar00,br00,nonf,addz,rsaq,cl,waw,bs3,bd1,doxx,300
; ; load 8.306 into modul select register.
017c e0ee 2108 05fe b000 cont cs00,ar16,br16,nonf,addz,rsoa,xcl,waw,bs5,bd4,doxx,0
; ; load address(ac16) out onto the back plane bus.
017d e000 2008 04fe 64c1 cont cs00,ar00,br00,nonf,addz,rsaq,xcl,waw,bs3,bd1,(doxx&byten),301
; ; set modul select to data mode.
017e a0ff 2108 06fe b000 rtn cs00,ar17,br17,nonf,addz,rsoa,xcl,waw,bs5,bd4,(tack&byten),0
017f e0ff 3fff f5ff 03ff nop
0180 e0ff 3fff f5ff 03ff nop
0181 e0ff 3fff f5ff 03ff nop
0182 e0ff 3fff f5ff 03ff nop
; return from subroutine.
\f
!0031 m3503
; rc3503 microprogram.
; write control/word. x=0.
0183 e005 71b8 057e 601f wxcx0: cont cs00,ar00,br05,ldbf,ands,rsdq,cb,waw,bs3,bd0,doxx&alustat,37
; ; test if ir(11:15)=0.
0184 38c3 6138 0dfa a186 cjp cs10,ar14,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,wxcx1
0185 e015 6138 05fe a000 cont cs00,ar01,br05,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
0186 3153 5078 0dfa a5cb wxcx1: cjp cs01,ar05,br03,ldba,ands,rsab,cb,waw,bs5,bd1,doxx+nccen,wwc
0187 3000 2138 05fe a1dd jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wcc0
0188 e0ff 3fff f5ff 03ff nop
0189 e0ff 3fff f5ff 03ff nop
; write control/word. x<>0.
018a e005 71b8 057e 601f wxcxn: cont cs00,ar00,br05,ldbf,ands,rsdq,cb,waw,bs3,bd0,doxx&alustat,37
018b 38c3 6138 0dfa a18d cjp cs10,ar14,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,wxcx2
018c e015 6138 05fe a000 cont cs00,ar01,br05,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
018d 3153 5078 0dfa a5cb wxcx2: cjp cs01,ar05,br03,ldba,ands,rsab,cb,waw,bs5,bd1,doxx+nccen,wwc
018e 3000 2138 05fe a1d8 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wccx
018f e0ff 3fff f5ff 03ff nop
0190 e0ff 3fff f5ff 03ff nop
; rc3503 microprogram.
; write block of bytes/words.
0191 e005 71b8 057e 601f wbxx: cont cs00,ar00,br05,ldbf,ands,rsdq,cb,waw,bs3,bd0,doxx&alustat,37
; ; test if ir(11:15)=0.
0192 38c3 6138 0dfa a194 cjp cs10,ar14,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,wbx1
0193 e015 6138 05fe a000 cont cs00,ar01,br05,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
0194 3153 7078 0dfa a1cf wbx1: cjp cs01,ar05,br03,ldbf,ands,rsab,cb,waw,bs5,bd0,doxx+nccen,wbb
0195 3000 2138 05fe a1d3 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wbww
0196 e0ff 3fff f5ff 03ff nop
0197 e0ff 3fff f5ff 03ff nop
; read status/word.
0198 e005 71b8 057e 601f rxc: cont cs00,ar00,br05,ldbf,ands,rsdq,cb,waw,bs3,bd0,doxx&alustat,37
0199 38c3 6138 0dfa a19b cjp cs10,ar14,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,rxc1
019a e015 6138 05fe a000 cont cs00,ar01,br05,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
019b 3153 5078 0dfa a5b0 rxc1: cjp cs01,ar05,br03,ldba,ands,rsab,cb,waw,bs5,bd1,doxx+nccen,rwc
019c 3000 2138 05fe a1e2 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rsc
019d e0ff 3fff f5ff 03ff nop
019e e0ff 3fff f5ff 03ff nop
\f
!0032 m3503
; rc3503 microprogram.
; read block of bytes/word.
019f e005 71b8 057e 601f rbx: cont cs00,ar00,br05,ldbf,ands,rsdq,cb,waw,bs3,bd0,doxx&alustat,37
; ; test if ir(11:15)=0.
01a0 38c3 6138 0dfa a1a2 cjp cs10,ar14,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,rbx1
01a1 e015 6138 05fe a000 cont cs00,ar01,br05,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
01a2 3153 5078 0dfa a5b9 rbx1: cjp cs01,ar05,br03,ldba,ands,rsab,cb,waw,bs5,bd1,doxx+nccen,rbb
01a3 3000 2138 05fe a1c3 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rbw
01a4 e0ff 3fff f5ff 03ff nop
01a5 e0ff 3fff f5ff 03ff nop
01a6 e0ff 3fff f5ff 03ff nop
01a7 e0ff 3fff f5ff 03ff nop
; rc3503 microprogram.
; routine to set devno/head bits(ac3+devno) and
; transmit the contents of ac4 to the device.
; call: ac3= 0 read data.
; 100 write data.
; 200 read status.
; 300 write control.
; ac4= transmit data.
; ac5= device number.
01a8 3295 2078 0dfa a5a8 xhead: cjp cs02,ar11,br05,nonf,addz,rsab,cb,waw,bs5,bd1,doxx+nccen,xhead
; ; set modul selext:= 400+device number.
01a9 e035 2118 07fe b000 cont cs00,ar03,br05,nonf,addz,rsoa,xcb,waw,bs5,bd4,tack,0
01aa e055 2138 05fe a400 xwait: cont cs00,ar05,br05,nonf,addz,rsoa,cb,waw,bs5,bd1,doxx,0
01ab a044 2118 07fe b000 rtn cs00,ar04,br04,nonf,addz,rsoa,xcb,waw,bs5,bd4,tack,0
; rc3503 microprogram.
; routine to set timer and wait upon
; timeout or data in ready.
; if eoi or timeout then zero flag=0
01ac 4000 2138 01fe a140 push cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,subitr,timer
01ad f500 2138 01fa a1af twb cs05,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,subitr&ccen,timot
01ae a300 3138 017a a000 wdal: crtn cs03,ar00,br00,nonf,ands,rsoa,cb,waw,bs5,bd0,(subitr&ccen&alustat),0
01af a000 23f8 017e 6000 timot: rtn cs00,ar00,br00,nonf,addo,rsdo,cb,waw,bs3,bd0,subitr&alustat,0
\f
!0033 m3503
; read word and compare.
; ac7:=x;
; w1:= data in;
; if w<>a and eoi=0 then begin ir(current level):=0; w0:=w0-2 end;
; enable:=1;
01b0 e033 6178 05fe 6000 rwc: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,0
01b1 e044 61fc 05fe 4001 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
01b2 1077 61fa 05fe 41a8 js cs00,ar07,br07,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,xhead
01b3 1000 3138 057e a218 js cs00,ar00,br00,nonf,ands,rsoa,cb,waw,bs5,bd0,doxx&alustat,wdair
01b4 3877 2b78 0d7a 41f2 cjp cs10,ar07,br07,nonf,subo,rsda,cb,waw,bs2,bd0,xdox&alustat+nccen,eupdat
01b5 3000 2138 05fe a1c1 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rbbl
01b6 e0ff 3fff f5ff 03ff nop
01b7 e0ff 3fff f5ff 03ff nop
01b8 e0ff 3fff f5ff 03ff nop
; read block of bytes.
; if x(15)=0 then st(x)(0:7):=data in(8:15);
; else st(x):=data in(8:15);
; x:=x+1;
; if w<>x and eoi=0 then begin ir(current level):=0; w0:=w0-2 end;
; enable:=1;
01b9 e033 6178 05fe 6000 rbb: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,0
; ; "read data" frame to reg 3
01ba e044 61fc 05fe 4001 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
; ; read w1 to reg 4
01bb 1077 61fa 05fe 41a8 js cs00,ar07,br07,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,xhead
; ; read x-reg to reg 7, jump xhead
01bc 107e 6138 05fe a1fc js cs00,ar07,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wdain
; ; wait data in ready, jump wdain
01bd e081 2078 05fe a400 cont cs00,ar10,br01,nonf,addz,rsab,cb,waw,bs5,bd1,doxx,0
01be e0c1 3058 07fe b000 cont cs00,ar14,br01,nonf,ands,rsab,xcb,waw,bs5,bd4,tack,0
01bf 10ff 61d8 07fe 817b js cs00,ar17,br17,ldbf,addz,rsdo,xcb,waw,bs4,bd0,tack,bwrite
; ; write byte into mem, incr x-reg
01c0 3077 632a 05fe ab6d jp cs00,ar07,br07,ldbf,addo,rsoa,cl,wax,bs5,bd2,(xdox),xrbb
; ; jump if eoi to eupdat
01c1 3881 2078 05fa a5f2 rbbl: cjp cs10,ar10,br01,nonf,addz,rsab,cb,waw,bs5,bd1,(doxx&ccen),eupdat
; ; prepare iors signals for clear itr
01c2 30c1 3058 07fe b1f0 jp cs00,ar14,br01,nonf,ands,rsab,xcb,waw,bs5,bd4,tack,bupdat
; ; clear itr-f/f, jump bupdat
\f
!0034 m3503
; rc3503 microprogram.
; read block of words.
; st(x):=data in;
; x:=x+2;
; if w<>x and eoi=0 then begin ir(current level):=0; w0:=w0-2 end;
; enable:=1;
01c3 e033 6178 05fe 6000 rbw: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,0
01c4 e044 61fc 05fe 4001 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
01c5 1077 61fa 05fe 41a8 js cs00,ar07,br07,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,xhead
01c6 107e 6138 05fe a1fc js cs00,ar07,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wdain
01c7 e081 2078 05fe a400 cont cs00,ar10,br01,nonf,addz,rsab,cb,waw,bs5,bd1,doxx,0
01c8 e0c1 3058 07fe b000 cont cs00,ar14,br01,nonf,ands,rsab,xcb,waw,bs5,bd4,tack,0
01c9 10ff 61f8 07fe 8177 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs4,bd0,tack,wwrite
01ca 30a7 606a 05fe ab6d jp cs00,ar12,br07,ldbf,addz,rsab,cl,wax,bs5,bd2,xdox,xrbb
; write word and compare.
; data out:= w1;
; w<>x then begin ir(current level):=0; w0:=w0-2 end;
; enable:=1;
01cb e033 6178 05fe 6040 wwc: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,100
01cc e044 61fc 05fe 4001 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
01cd 1077 61fa 05fe 41a8 js cs00,ar07,br07,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,xhead
01ce 3070 2778 057e 41c1 wwcl: jp cs00,ar07,br00,nonf,suno,rsda,cb,waw,bs2,bd0,xdox&alustat,rbbl
; ; compare x and w reg
\f
!0035 m3503
; rc3503 microprogram.
; write block of bytes.
; data out(8:15):= if x(15)=0 then st(x)(0:7) else st(x)(8:15);
; x:=x+1;
; if w<>x then begin ir(current level):=0; w0:=w0-2 end;
; enable:= 1;
01cf e033 6178 05fe 6040 wbb: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,100
; ; "write data" frame to reg 3
01d0 10ee 61fa 05fe 4214 js cs00,ar16,br16,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,xbread
; ; read byte from mem
01d1 10f4 6138 05fe a1a8 js cs00,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,xhead
; ; move byte to reg 17, jump xhead
01d2 30e7 632a 05fe a9ce jp cs00,ar16,br07,ldbf,addo,rsoa,cl,wax,bs5,bd2,xdox,wwcl
; ; incr. x reg, jump to wwcl
; write block of words.
; data out:= st(x);
; x:=x+2;
; if w<>x then begin ir(current level):=0; w0:=w0-2 end;
; enable:=1.
01d3 e033 6178 05fe 6040 wbww: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,100
01d4 10ee 61fa 05fe 420e js cs00,ar16,br16,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,xwread
01d5 10f4 6138 05fe a1a8 js cs00,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,xhead
01d6 e0ae 606a 05fe a800 cont cs00,ar12,br16,ldbf,addz,rsab,cl,wax,bs5,bd2,xdox,0
01d7 30e0 2778 057e 41c1 jp cs00,ar16,br00,nonf,suno,rsda,cb,waw,bs2,bd0,xdox&alustat,rbbl
\f
!0036 m3503
; rc3503 microprogram.
; write control. x<>0.
; control:= w1;
; enable:=1;
01d8 e033 6178 05fe 60c0 wccx: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,300
01d9 e044 61fc 05fe 4001 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
01da 1000 2138 05fe a1a8 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,xhead
01db e006 61e4 05fe 7404 wccl: cont cs00,ar00,br06,ldbf,addz,rsdo,cr,wap,bs3,bd5,doxx,4
01dc 3000 2138 05ee a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&sextend,fetch
; write control. x=0.
; control:=w1;
; enable:=1; ir(current level):=0;
01dd e033 6178 05fe 60c0 wcc0: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,300
01de e044 61fc 05fe 4001 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
01df 1000 2138 05fe a221 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,lhead
01e0 e081 2078 05fe a400 cont cs00,ar10,br01,nonf,addz,rsab,cb,waw,bs5,bd1,doxx,0
01e1 30c1 3058 07fe b1db jp cs00,ar14,br01,nonf,ands,rsab,xcb,waw,bs5,bd4,tack,wccl
; rc3503 microprogram.
; read status and compare.
; ac6:=x
; w1:=status.
; if w<>ac6 and eoi=0 then begin ir(current):=0;w0:=w0-2 end;
; enable:=1;
01e2 e033 6178 05fe 6080 rsc: cont cs00,ar03,br03,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,200
01e3 e044 61fc 05fe 4001 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
01e4 1077 61fa 05fe 41a8 js cs00,ar07,br07,ldbf,addz,rsdo,cb,wax,bs2,bd0,xdox,xhead
01e5 1000 3138 057e a218 js cs00,ar00,br00,nonf,ands,rsoa,cb,waw,bs5,bd0,doxx&alustat,wdair
01e6 3800 3138 0dfa a1f2 rscl: cjp cs10,ar00,br00,nonf,ands,rsoa,cb,waw,bs5,bd0,(doxx+nccen),eupdat
01e7 e070 2778 057e 4000 cont cs00,ar07,br00,nonf,suno,rsda,cb,waw,bs2,bd0,(xdox&alustat),0
01e8 3881 2078 05fa a5f2 cjp cs10,ar10,br01,nonf,addz,rsab,cb,waw,bs5,bd1,doxx&ccen,eupdat
01e9 30c1 3058 07fe b1f0 jp cs00,ar14,br01,nonf,ands,rsab,xcb,waw,bs5,bd4,tack,bupdat
01ea e0ff 3fff f5ff 03ff nop
\f
!0037 m3503
; rc3503 microprogram.
; update w0 routine.
; sync interrupt.
01eb 30a0 2064 05ee a3ec update: jp cs00,ar12,br00,nonf,addz,rsab,cr,wap,bs5,bd0,doxx&sextend,fetch
01ec 3000 2138 05fe 63ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd0,doxx,fetch
01ed e000 61e4 05fe 4000 nupdat: cont cs00,ar00,br00,ldbf,addz,rsdo,cr,wap,bs2,bd0,xdox,0
01ee 3000 2124 05ee abec qupdat: jp cs00,ar00,br00,nonf,addz,rsoa,cr,wap,bs5,bd2,xdox&sextend,fetch
01ef 3000 2138 05fe 63ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd0,doxx,fetch
; bupdat. w0:=w0-2; enable;
01f0 e006 61f8 05fe 7404 bupdat: cont cs00,ar00,br06,ldbf,addz,rsdo,cb,waw,bs3,bd5,doxx,4
; ; set enable in reg 6, enable, sync-itr
01f1 30a0 6667 05ee abec jp cs00,ar12,br00,ldbf,suno,rsab,cr,war,bs5,bd2,xdox&sextend,fetch
; ; decr w0 (-2), jump fetch
01f2 e006 61e4 05fe 7404 eupdat: cont cs00,ar00,br06,ldbf,addz,rsdo,cr,wap,bs3,bd5,doxx,4
01f3 3000 2138 05ee a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&sextend,fetch
; subroutine to update ac15 with highest priority level number.
01f4 e011 2138 05fe bc00 ginta: cont cs00,ar01,br01,nonf,addz,rsoa,cb,waw,bs5,bd7,doxx,0
01f5 e0dd 61ff 05fe 4000 gint1: cont cs00,ar15,br15,ldbf,addz,rsdo,cb,war,bs2,bd0,xdox,0
01f6 a0dd 2138 05fe bc00 rtn cs00,ar15,br15,nonf,addz,rsoa,cb,waw,bs5,bd7,doxx,0
01f7 3000 2138 05ee a3ec cupdat: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&sextend,fetch
01f8 3000 2138 05fe a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,fetch
01f9 3144 2128 0dfa a9f7 cogll: cjp cs01,ar04,br04,nonf,addz,rsoa,cl,waw,bs5,bd2,xdox+nccen,cupdat
01fa e0a4 617a 05fe 4000 cont cs00,ar12,br04,ldbf,addz,rsda,cb,wax,bs2,bd0,xdox,0
01fb 3044 212a 05fe a9f7 jp cs00,ar04,br04,nonf,addz,rsoa,cl,wax,bs5,bd2,xdox,cupdat
01fc e0ff 61f8 05fe 6006 wdain: cont cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,waits
01fd c0ff 2138 05f6 a000 ldct cs00,ar17,br17,nonf,addz,rsoa,cb,waw,bs5,bd0,ldcoun,0
01fe 9000 2138 05fe a1fe wdasp: rpct cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wdasp
01ff 4000 2138 01fe a140 push cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,subitr,timer
0200 f500 2138 01fa a1af twb cs05,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,subitr&ccen,timot
0201 3000 2138 01fe a1ae jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,subitr,wdal
0202 30a0 6064 05ee abec vupdat: jp cs00,ar12,br00,ldbf,addz,rsab,cr,wap,bs5,bd2,xdox&sextend,fetch
0203 3000 2138 05fe a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,fetch
\f
!0038 m3503
; rc3503 microprogram.
; interlevel store (ist). format c.
0204 e077 61e8 05fe 4000 istc: cont cs00,ar07,br07,ldbf,addz,rsdo,cl,waw,bs2,bd0,xdox,0
0205 e00e 6128 05fe a000 cont cs00,ar00,br16,ldbf,addz,rsoa,cl,waw,bs5,bd0,doxx,0
0206 10ae 6667 05fe a20d js cs00,ar12,br16,ldbf,suno,rsab,cr,war,bs5,bd0,doxx,wread
0207 30f3 6138 05fe bc51 jp cs00,ar17,br03,ldbf,addz,rsoa,cb,waw,bs5,bd7,doxx,istx
; interlevel load (ild). format c.
0208 e00e 6128 05fe a000 ildc: cont cs00,ar00,br16,ldbf,addz,rsoa,cl,waw,bs5,bd0,doxx,0
0209 10ae 6667 05fe a20d js cs00,ar12,br16,ldbf,suno,rsab,cr,war,bs5,bd0,doxx,wread
020a 30f3 6138 05fe bc58 jp cs00,ar17,br03,ldbf,addz,rsoa,cb,waw,bs5,bd7,doxx,ildx
; instruction to set the module select.
020b 304b 2138 05fe a374 mseta: jp cs00,ar04,br13,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,msetc
020c 304b 2138 05fe a374 msetb: jp cs00,ar04,br13,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,msetc
\f
!0039 m3503
; routine to read from memory(word).
; ac16=address.ac17:=data.
020d e0ee 2128 05fe 64c0 wread: cont cs00,ar16,br16,nonf,addz,rsoa,cl,waw,bs3,bd1,doxx,300
; ; load 8.300 into modul select.
020e e0ee 2108 05fc b000 xwread: cont cs00,ar16,br16,nonf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,0
; ; load address register.
020f e0ff 41c8 077e 8000 ywread: cont cs00,ar17,br17,ldba,addz,rsdo,xcl,waw,bs4,bd0,tack&alustat,0
; ; read answer,v-jump on lpe/rpe status
0210 aaff 2108 0dfa a000 crtn cs12,ar17,br17,nonf,addz,rsoa,xcl,waw,bs5,bd0,doxx+nccen,0
0211 e0ff 41c8 07fe 8000 cont cs00,ar17,br17,ldba,addz,rsdo,xcl,waw,bs4,bd0,tack,0
0212 6302 7138 05fe a3e8 jv cs03,ar00,br02,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,sparw
; routine to read from memory (byte).
0213 e000 2028 05fe 64c0 bread: cont cs00,ar00,br00,nonf,addz,rsaq,cl,waw,bs3,bd1,doxx,300
; ; load 8.300 into modul select register.
0214 e0ee 2108 05fc b000 xbread: cont cs00,ar16,br16,nonf,addz,rsoa,xcl,waw,bs5,bd4,(doxx&forread),0
; ; load address register.
0215 e0ff 2008 04fe 64c1 cont cs00,ar17,br17,nonf,addz,rsaq,xcl,waw,bs3,bd1,(doxx&byten),301
; ; select data mode.
0216 e0ff 41c8 067e 8000 cont cs00,ar17,br17,ldba,addz,rsdo,xcl,waw,bs4,bd0,(tack&alustat&byten),0
; ; read answer, v-jump on lpe/rpe status
0217 6302 7138 05fe a3d0 jv cs03,ar00,br02,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,bypar
0218 e0ff 61f8 05fe 6006 wdair: cont cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,waits
0219 c0ff 2138 05f6 a000 ldct cs00,ar17,br17,nonf,addz,rsoa,cb,waw,bs5,bd0,ldcoun,0
021a 9000 2138 05fe a21a wdai1: rpct cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wdai1
021b 4000 2138 01fe a140 push cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,subitr,timer
021c f500 2138 01fa a220 twb cs05,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,subitr&ccen,timxx
021d e00f 61cc 01fe 8001 cont cs00,ar00,br17,ldbf,addz,rsdo,xcl,wap,bs4,bd0,subitr+ydox,1
021e a3ff 212c 01fa a801 crtn cs03,ar17,br17,nonf,addz,rsoa,cl,wap,bs5,bd2,(subitr&ccen)+ydox,1
021f e000 313c 01fe a801 cont cs00,ar00,br00,nonf,ands,rsoa,cb,wap,bs5,bd2,subitr+ydox,1
0220 a000 23f8 017e 6000 timxx: rtn cs00,ar00,br00,nonf,addo,rsdo,cb,waw,bs3,bd0,subitr&alustat,0
; write control timer loop.
0221 e0ff 61f8 05fe 6008 lhead: cont cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,wctim
0222 1000 2138 05fe a1a8 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,xhead
0223 c0ff 2138 05f6 a000 ldct cs00,ar17,br17,nonf,addz,rsoa,cb,waw,bs5,bd0,ldcoun,0
0224 9000 2138 05fe a224 wdao1: rpct cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wdao1
0225 a000 2138 05fe a000 rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
\f
!0040 m3503
; routine to write into the w-register.
; ac16=address.ac17=data.
0226 e0ee 212f 05fe bc00 wwreg: cont cs00,ar16,br16,nonf,addz,rsoa,cl,war,bs5,bd7,doxx,0
; ; load working register address register.
0227 e0ff 210f 05fe a800 cont cs00,ar17,br17,nonf,addz,rsoa,xcl,war,bs5,bd2,xdox,0
; ; write into working register.
0228 a0dd 2128 05fe bc00 rtn cs00,ar15,br15,nonf,addz,rsoa,cl,waw,bs5,bd7,doxx,0
; ; restore current level and return.
; routine to read from the w-register.
; ac16=address. ac17:=data.
0229 e0ee 212f 05fe bc00 rwreg: cont cs00,ar16,br16,nonf,addz,rsoa,cl,war,bs5,bd7,doxx,0
; ; load working register address.
022a e0ff 41cf 05fe 4000 cont cs00,ar17,br17,ldba,addz,rsdo,xcl,war,bs2,bd0,xdox,0
; ; read from working register.
022b a0dd 2128 05fe bc00 rtn cs00,ar15,br15,nonf,addz,rsoa,cl,waw,bs5,bd7,doxx,0
; ; restore current level and return.
; routine to read from memory module. the module number is send
; from the debug'er.
; call: ac16=offset address,ac07=module number.
; ret : ac17=data.
022c e077 2138 05fe ac00 dbread: cont cs00,ar07,br07,nonf,addz,rsoa,cb,waw,bs5,bd3,doxx,0
022d e0ee 213f 05fe 64c0 cont cs00,ar16,br16,nonf,addz,rsoa,cb,war,bs3,bd1,doxx,300
022e e0ee 211f 05fc b000 cont cs00,ar16,br16,nonf,addz,rsoa,xcb,war,bs5,bd4,doxx&forread,0
022f 3200 3118 0dfa a22f bwrd: cjp cs02,ar00,br00,nonf,ands,rsoa,xcb,waw,bd5,bd0,doxx+nccen,bwrd
0230 e0ff 41c8 077e 8000 cont cs00,ar17,br17,ldba,addz,rsdo,xcl,waw,bs4,bd0,tack&alustat,0
; ; read answer, v-jump on lpe/rpe status
0231 63b2 7138 05fe afe8 jv cs03,ar13,br02,ldbf,ands,rsoa,cb,waw,bs5,bd3,doxx,sparw
; routine to write into memory module.
; call: ac16=offset addr.,ac07=module no,ac17=data.
0232 e077 2138 05fe ac00 dbwrite: cont cs00,ar07,br07,nonf,addz,rsoa,cb,waw,bs5,bd3,doxx,0
0233 e0ee 213f 05fe 64c0 cont cs00,ar16,br16,nonf,addz,rsoa,cb,war,bs3,bd1,doxx,300
0234 e0ee 211f 05fe b000 cont cs00,ar16,br16,nonf,addz,rsoa,xcb,war,bs5,bd4,doxx,0
0235 e0ee 211f 05fe 64c1 cont cs00,ar16,br16,nonf,addz,rsoa,xcb,war,bs3,bd1,doxx,301
0236 e0ff 2108 07fe b000 cont cs00,ar17,br17,nonf,addz,rsoa,xcl,waw,bs5,bd4,tack,0
0237 a000 3128 05fe ac00 rtn cs00,ar00,br00,nonf,ands,rsoa,cl,waw,bs5,bd3,doxx,0
\f
!0041 m3503
; rc3503 microprogram.
; procedure to receive one byte from the debug microprocessor.
; ac3(8:15):= cdi;
; ac3(0:7) := 0;
; ac4(0:7):= cdi;
; ac4(8:15):= 0;
0238 e033 71f8 05fe a000 gbyte: cont cs00,ar03,br03,ldbf,ands,rsdo,cb,waw,bs5,bd0,doxx,0
0239 3e33 2138 05fa a239 glp1: cjp cs16,ar03,br03,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,glp1
023a e033 61f8 05fe c000 cont cs00,ar03,br03,ldbf,addz,rsdo,cb,waw,bs6,bd0,doxx,0
023b e033 7178 05fe 60ff cont cs00,ar03,br03,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
023c e033 2138 05fe a000 cont cs00,ar03,br03,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
023d e044 61f8 05fe 2000 cont cs00,ar04,br04,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,0
023e a000 2138 05fe a000 rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; routine to send ac3(8:15) to the debug microprocessor(m).
023f e0ee 61f8 05fe 63ff prbyt: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
0240 303f 6138 05fe a226 jp cs00,ar03,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; routine to send ac3(0:7) to the debug microprocessor.
0241 e0ee 61f8 05fe 63fe plbyt: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi4
0242 e033 2138 05fe a000 cont cs00,ar03,br03,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
0243 30ff 61f8 05fe 2226 jp cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,wwreg
; rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; routine to get word from fifo.
; call: ac16= fix.
; return: ac16(0:7)=fix-1 and ac16(8:15)=fix.
0244 10ee 2138 05fe a229 gword: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0245 e0f3 7178 05fe 60ff cont cs00,ar17,br03,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
0246 10ee 6538 05fe a229 js cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0247 e0ff 7178 05fe 60ff cont cs00,ar17,br17,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
0248 e0ff 2138 05fe a000 cont cs00,ar17,br17,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
0249 a03e 6178 05fe 2000 rtn cs00,ar03,br16,ldbf,addz,rsda,cb,waw,bs1,bd0,doxx,0
\f
!0042 m3503
; rc3503 microprogram.
; debug routine. get mem.
; transfer a word from l-mem to m.
024a e0ee 61f8 05fe 63fd getm: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi3
024b 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch module no from fi3-fi2
024c e0e7 6138 05fe a000 cont cs00,ar16,br07,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save module no in reg 7
024d e0ee 61f8 05fe 63fb cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi1
024e 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch offset addr from fi1-fi0
024f 1000 2138 05fe a22c js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbread
; ; read word from mem
0250 10f3 6138 05fe a23f js cs00,ar17,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,prbyt
; ; put right byte into fifo fi5
0251 3000 2138 05fe a241 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,plbyt
; ; put left byte into fifo fi4
; rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return
; debug routine. put mem.
; transfer a word from m to l-mem.
0252 e0ee 61f8 05fe 63ff putm: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
0253 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch module no from fifo fi5-fi4
0254 e0e7 6138 05fe a000 cont cs00,ar16,br07,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; module to reg 7
0255 e0ee 61f8 05fe 63fd cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi3
0256 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch offset addr from fifo fi3-fi2
0257 e0e4 6138 05fe a000 cont cs00,ar16,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save addr in reg 4
0258 e0ee 61f8 05fe 63fb cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi1
0259 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch data from fifo fi1-fi0
025a e0ef 6138 05fe a000 cont cs00,ar16,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; move data to reg 17
025b 304e 6138 05fe a232 jp cs00,ar04,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbwrite
; ; move addr to reg 16
; rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return
\f
!0043 m3503
; rc3503 microprogram.
; debug routine. get reg.
; transfer a word from l-reg to m.
025c e0ee 61f8 05fe 63fb getr: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi1
025d 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch w-reg addr from fifo fi1-fi0
025e 104e 2078 05fe a229 js cs00,ar04,br16,nonf,addz,rsab,cb,waw,bs5,bd0,doxx,rwreg
; ; read w-reg
025f 10f3 6138 05fe a23f js cs00,ar17,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,prbyt
; ; put right byte into fifo fi5
0260 3000 2138 05fe a241 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,plbyt
; ; put left byte into fifo fi4
; rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return
; debug routine. put reg.
; transfer a word from m to l-reg.
0261 e0ee 61f8 05fe 63fd putr: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi3
0262 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch w-reg addr from fifo fi3-fi2
0263 e0e4 6138 05fe a000 cont cs00,ar16,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save w-reg addr in reg 4
0264 e0ee 61f8 05fe 63fb cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi1
0265 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; fetch write data from fifo fi1-fi0
0266 e0ef 6138 05fe a000 cont cs00,ar16,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; move write data to reg 17
0267 304e 6138 05fe a226 jp cs00,ar04,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; w-reg addr to reg 16, write into w-reg
; rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return
0268 1000 2138 05fe a27c rdat: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,fifos
; ; circulate fifo
0269 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
\f
!0044 m3503
; rc3503 microprogram.
; debug routine. read data.
; w((ac2)+copy):= ac3; received byte.
; copy means start of the image of the microprocessor ram
; in the w-register array.
026a e0ee 61f8 05fe 63fb rdadr: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi1
026b 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; fetch lsb addr from fifo
026c e0f2 e138 05fe a000 cont cs00,ar17,br02,lblf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; shift addr one step left
026d e022 e078 05fe a000 cont cs00,ar02,br02,lblf,addz,rsab,cb,waw,bs5,bd0,doxx,0
; ; one step more
026e 10ee 6538 05fe a229 js cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; fetch data from fifo
026f e0f3 7178 05fe 60ff cont cs00,ar17,br03,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,377
; ; mask and save in reg 3
0270 e02e 7178 05fe 61f8 cont cs00,ar02,br16,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,770
; ; mask for max cells 3f
0271 e0ee 6178 05fe 6084 cont cs00,ar16,br16,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,4+128.
; ; add base+offset
0272 303f 6138 05fe a226 jp cs00,ar03,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; reg 3 to reg 17, write data into image
; rtn cs00,ar00,br00,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
\f
!0045 m3503
; rc3503 microprogram
; debug routine. get level.
; transfer current level to m.
0273 e013 6138 05fe b800 getl: cont cs00,ar01,br03,ldbf,addz,rsoa,cb,waw,bs5,bd6,doxx,0
; ; current level to cdo-reg
0274 a000 2138 05fe a000 rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return
; test the state of run/stop.
0275 3600 2138 0dfa a009 tsrun: cjp cs06,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,dupdat
0276 3000 2138 05fe a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,fetch
; routine to
; input level number and
; output register offset.
0277 1000 2138 05fe a238 gloff: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gbyte
; ; read wanted level from cdo-reg
0278 103e 6138 05fe a229 js cs00,ar03,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; fetch offset from table
0279 10f3 6138 05fe a23f js cs00,ar17,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,prbyt
; ; put right byte into fifo fi5
027a 1000 2138 05fe a241 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,plbyt
; ; put left byte into fifo fi4
027b 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
\f
!0046 m3503
; rc3503 microprogram.
; debug fifo administration.
; fi5 (top of fifo) - fi4 - fi3 - fi2 - fi1 - fi0 (input to fifo)
; when called:
; cdi->fi0->fi1->fi2->fi3->fi4->fi5->cdo
027c e0ee 61f8 05fe 63ff fifos: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
027d 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; "read fifo" result in reg 17
027e e0ff 2138 05fe b800 cont cs00,ar17,br17,nonf,addz,rsoa,cb,waw,bs5,bd6,doxx,0
; ; reg 17 to cdo-reg
027f e0ee 61f8 05fe 63fe cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi4
; ; fi4 addr to reg 16
0280 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; "read fifo" (fi4)
0281 10ee 6338 05fe a226 js cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; "write fifo" in fi5
0282 10ae 6678 05fe a229 js cs00,ar12,br16,ldbf,suno,rsab,cb,waw,bs5,bd0,doxx,rwreg
; ; "read fifo" (fi3)
0283 10ee 6338 05fe a226 js cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; "write fifo" in fi4
0284 10ae 6678 05fe a229 js cs00,ar12,br16,ldbf,suno,rsab,cb,waw,bs5,bd0,doxx,rwreg
; ; "read fifo" (fi2)
0285 10ee 6338 05fe a226 js cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; "write fifo" in fi3
0286 10ae 6678 05fe a229 js cs00,ar12,br16,ldbf,suno,rsab,cb,waw,bs5,bd0,doxx,rwreg
; ; "read fifo" (fi1)
0287 10ee 6338 05fe a226 js cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; "write fifo" in fi2
0288 10ae 6678 05fe a229 js cs00,ar12,br16,ldbf,suno,rsab,cb,waw,bs5,bd0,doxx,rwreg
; ; "read fifo" (fi0)
0289 10ee 6338 05fe a226 js cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; "write fifo" in fi1
028a e0ee 61f8 05fe 63fa cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi0
; ; fi0 addr to reg 16
028b 30ff 61f8 05fe c226 jp cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs6,bd0,doxx,wwreg
; ; "write fifo" cdi to fi0
; rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return
\f
!0047 m3503
; rc3503 microprogram.
; debug routine. set timer level.
; itr(w(copy)):=1;
028c e0ee 61f8 05fe 6084 sett: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,4+128.
; ; addr to rtc level (image)
028d 1000 2138 05fe a229 setl: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; read from image
028e e0fe 7178 05fe 607f cont cs00,ar17,br16,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,177
; ; mask for max 127 levels
028f 10ee 2138 05fe a05f js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,sitrn
; ; set level (reg 16)
0290 3044 2138 05fe e275 jp cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f , jump tsrun
0291 e0ee 61f8 05fe 608c seto: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,4+10+128.
; ; addr to tto level (image)
0292 3000 2138 05fe a28d jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,setl
; ; jump setl
0293 e0ee 61f8 05fe 6094 seti: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,4+20+128.
; ; addr to tti level (image)
0294 3000 2138 05fe a28d jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,setl
; ; jump setl
; set version number and cpu no.
0295 e0ee 61f8 05fe 63ff setver: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
0296 e0ff 61f8 05fe 603b cont cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,cpuve
; ; cpu-type and m-prog. ver to reg 17
0297 1000 2138 05fe a226 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write number to fi5
0298 3000 2138 05fe a2a4 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,lclear
; ; jump lclear
\f
!0048 m3503
; rc3503 microprogram.
; routine to move autoload from prom mem to ram
; starting from h.fe00.
; ac5=prom addr.; ac7=ram addr.
0299 e055 61f8 05fe 6004 auctl: cont cs00,ar05,br05,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,4
; ; 4 to reg 5 (rom start addr)
029a e077 61f8 05fe 61ff cont cs00,ar07,br07,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,aucon
; ; 8.777 to reg 7
029b e077 6938 05fe a000 cont cs00,ar07,br07,ldbf,subz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; 8.177000 to reg 7
029c e05e 6138 05fe 6c10 aurep: cont cs00,ar05,br16,ldbf,addz,rsoa,cb,waw,bs3,bd3,doxx,20
; ; reg 5 to reg 16, sel prom
029d 10ee 2138 05fe a20d js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wread
; ; read word (byte) from prom
029e e07e 6138 05fe 6c00 cont cs00,ar07,br16,ldbf,addz,rsoa,cb,waw,bs3,bd3,doxx,0
; ; reg 7 to reg 16, sel ram
029f 10ee 2138 05fe a17b js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,bwrite
; ; write byte into ram
02a0 e0a5 6078 05fe a000 cont cs00,ar12,br05,ldbf,addz,rsab,cb,waw,bs5,bd0,doxx,0
; ; incr. prom addr +2 - to reg 5
02a1 e077 6338 057e a000 cont cs00,ar07,br07,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
; ; incr. ram addr +1 - to reg 7
02a2 3800 2138 0dfa a29c cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,aurep
; ; jump to aurep if not finish with move
02a3 3000 2138 05ee a37c jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&sextend,pfetch
; ; jump to fetch
02a4 e0ee 61f8 05fe 6080 lclear: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,177+1
; ; 1f (level 31) to reg 16
; ; set interrupt level 31
02a5 e0ee 6538 057e a000 lcrep: cont cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
; ; decr. level (reg 16)
02a6 38ee 2138 05fa a2a9 cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,set32
; ; jump to set31 if level decremented to zero
02a7 10ee 2138 05fe a063 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,citrn
; ; clear level (level no in reg 16)
02a8 3000 2138 05fe 02a5 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs0,bd0,doxx,lcrep
; ; jump lcrep
02a9 e0ee 61f8 05fe 63eb set32: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fie
02aa 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
02ab e0ee 61f8 05fe 601f cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,37
02ac 10ee 21f8 05fe a05f js cs00,ar16,br16,nonf,addz,rsdo,cb,waw,bs5,bd0,doxx,sitrn
\f
!0049 m3503
; rc3503 micro program
; prepare level 1f to start in autoload code
; placed in area fe00 to ffff.
02ad e0ff 61f8 05fe 61ff set31: cont cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,aucon
; ; 8.777 to reg 17
02ae e0ff 6938 05fe a000 cont cs00,ar17,br17,ldbf,subz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; 8.177000 to reg 17
02af e0ee 61f8 05fe 617a cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,372+128.
; ; 8.572 to reg 16
02b0 1000 2138 05fe a226 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write hex fe00 into w2 level 1f
02b1 e0ff 61f8 05fe 6033 cont cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,63
; ; 8.63 to reg 17
02b2 e0ff 6938 05fe a000 cont cs00,ar17,br17,ldbf,subz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; 8.177714 to reg 17
02b3 e0ee 61f8 05fe 6178 cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,370+128.
; ; 8.570 to reg 16
02b4 1000 2138 05fe a226 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write hex ffcc into w0 on level 1f
02b5 e0ff 7138 05fe a000 cont cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
; ; zero to reg 17
02b6 e0ee 61f8 05fe 617b cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,373+128.
; ; 8.573 to reg 16
02b7 1000 2138 05fe a226 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write zero into w3 on level 1f
02b8 3000 2138 05fe a299 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,auctl
; ; jump to auctl
\f
!0050 m3503
; rc3503 microprogram
; generation of w-reg offset table
02b9 e044 61f8 05fe 6000 uptab: cont cs00,ar04,br04,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,0
; ; zero to reg 4
02ba e077 61f8 05fe 6080 cont cs00,ar07,br07,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,128.
; ; hex 80 to reg 7 (last addr)
02bb e055 61f8 05fe 6000 cont cs00,ar05,br05,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,0
; ; zero to reg 5
02bc e04e 6138 05fe a000 up20: cont cs00,ar04,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; reg 4 to reg 16 (addr)
02bd 107f 6138 05fe a226 js cs00,ar07,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; reg 7 to reg 17 (data) , write offset
02be e044 6338 05fe a000 cont cs00,ar04,br04,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,0
; ; incr reg 4
02bf e055 6338 05fe a000 cont cs00,ar05,br05,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,0
; ; incr reg 5
02c0 e077 6178 05fe 6008 cont cs00,ar07,br07,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,10
; ; incr. reg 7 with 8 (to next level)
02c1 e055 2778 057e 6080 cont cs00,ar05,br05,nonf,suno,rsda,cb,waw,bs3,bd0,doxx&alustat,128.
; ; is it last level ?
02c2 3800 2138 0dfa a2bc cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,up20
; ; no jump to up20
02c3 3000 2138 05fe a295 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,setver
; ; jump to setver
\f
!0051 m3503
; rc3503 microprogram.
; decoder for test command.
; =01 xmt 7.5 intr to 8085.
; =02 working register address test.
; =03 working register data test.
; =04 memory address test.
; =05 memory data test.
02c4 e0ee 61f8 05fe 63fa tscom: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi0
; ; addr fi0 to reg 16
02c5 1000 2138 05fe a229 js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; read fi0 result in reg 17
02c6 e0ff 7178 05fe 6007 cont cs00,ar17,br17,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,7
; ; and read value (test number) with 7
02c7 e0ff 3978 057e 6001 cont cs00,ar17,br17,nonf,exor,rsda,cb,waw,bs3,bd0,doxx&alustat,1
; ; exor with 1 - is it test 1 ?
02c8 3800 2138 05fa a2d2 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,tes01
; ; yes - jump to tes01
02c9 e0ff 3978 057e 6002 cont cs00,ar17,br17,nonf,exor,rsda,cb,waw,bs3,bd0,doxx&alustat,2
; ; exor with 2 - is it test 2 ?
02ca 3800 2138 05fa a2d4 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,tes02
; ; yes - jump to tes02
02cb e0ff 3978 057e 6003 cont cs00,ar17,br17,nonf,exor,rsda,cb,waw,bs3,bd0,doxx&alustat,3
; ; exor with 3 - is it test 3 ?
02cc 3800 2138 05fa a2f1 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,tes03
; ; yes - jump to tes03
02cd e0ff 3978 057e 6004 cont cs00,ar17,br17,nonf,exor,rsda,cb,waw,bs3,bd0,doxx&alustat,4
; ; exor with 4 - is it test 4 ?
02ce 3800 2138 05fa a306 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,tes04
; ; yes - jump to test 4
02cf e0ff 3978 057e 6005 cont cs00,ar17,br17,nonf,exor,rsda,cb,waw,bs3,bd0,doxx&alustat,5
; ; exor with 5 - is it test 5 ?
02d0 3800 2138 05fa a316 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&ccen,tes05
; ; yes - jump to tes05
02d1 3000 2138 05fe a009 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dupdat
; ; not used test number - jump to dupdat
\f
!0052 m3503
; rc3503 microprogram.
; tes01.xmit 7.5 intr to 8085.
02d2 e000 2138 05fe 7406 tes01: cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd5,doxx,6
; ; send itr to 8085 (rst 7.5)
02d3 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump to tsrun
; working address register test.
; (addr):=addr.
; if test=ok then (fi5)=0 else (fi5)<>0 and (fi3,fi4)=addr a
02d4 e0ee 61f8 05fe 63ff tes02: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
02d5 10ef 6138 05fe a226 ts020: js cs00,ar16,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write addr on addr
02d6 e0ee 6538 057e a000 cont cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
; ; decr. addr
02d7 38ee 2138 0dfa a2d5 cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts020
; ; jump if addr<>0 to ts020
02d8 10ef 6138 05fe a226 js cs00,ar16,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write in addr 0
02d9 10ee 2138 05fe a229 ts021: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; start check-read from addr 0
02da e0ef 2a78 057e a000 cont cs00,ar16,br17,nonf,subo,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; sub addr- read
02db 38ee 2138 0dfa a2e2 cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,te02
; ; jump if result <>0 to te02
02dc e0ee 6338 05fe a000 cont cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,0
; ; incr addr
02dd e0ee 2b78 057e 63ff cont cs00,ar16,br16,nonf,subo,rsda,cb,waw,bs3,bd0,doxx&alustat,fi5
; ; is it last addr ?
02de 38ee 2138 0dfa a2d9 cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts021
; ; jump if it isen't to ts021
02df e0ee 61f8 05fe 63ff cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
02e0 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; zero to fi5
02e1 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump to tsrun
\f
!0053 m3503
; rc3503 microprogram.
; working address register test. (cont.)
; (addr):=addr.
; if test=ok then (fi5)=0 else (fi5)<>0 and (fi3,fi4)=addr a
02e2 e0e3 6138 05fe a000 te02: cont cs00,ar16,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save addr in reg 3
02e3 e0f4 6138 05fe a000 cont cs00,ar17,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save read data in reg 4
02e4 e0ee 61f8 05fe 63ff cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
02e5 10ef 6138 05fe a226 js cs00,ar16,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write "addr" into fi5 a value <>0
02e6 e0ee 6538 05fe a000 cont cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; fi4 addr to reg 16
02e7 103f 6138 05fe a226 js cs00,ar03,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write addr 8:15 into fi4
02e8 e0ee 6538 05fe a000 cont cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; fi3 addr to reg 16
02e9 e033 2138 05fe a000 cont cs00,ar03,br03,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; load swap reg
02ea 10ff 61f8 05fe 2226 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,wwreg
; ; write addr 0:7 into fi3
02eb e0ee 6538 05fe a000 cont cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; fi2 addr to reg 16
02ec 104f 6138 05fe a226 js cs00,ar04,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write read 8:15 into fi2
02ed e0ee 6538 05fe a000 cont cs00,ar16,br16,ldbf,sunz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; fi1 addr to reg 16
02ee e044 2138 05fe a000 cont cs00,ar04,br04,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; load swap
02ef 10ff 61f8 05fe 2226 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,wwreg
; ; write read 0:7 into fi1
02f0 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
\f
!0054 m3503
; rc3503 microprogram.
; working register data test.
; when called: (fi1,fi2)= data constant.
; return:
; if test=ok then (fi5)=0 else (fi5)<>0
; and (fi3,fi4)=addr. and (fi1,fi2)=wanted data.
02f1 e0ee 61f8 05fe 63fc tes03: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi2
; ; fi2 addr to reg 16
02f2 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; read fi1 and fi2, result in reg 16 (testpat)
02f3 e0e7 6138 05fe a000 cont cs00,ar16,br07,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save pattern in reg 7
02f4 e0ee 7138 05fe a000 cont cs00,ar16,br16,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
; ; zero to reg 16 (addr)
02f5 e07f 6138 05fe a000 cont cs00,ar07,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; pattern to reg 17
02f6 10ee 2138 05fe a226 ts031: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write pattern
02f7 e0ff 6938 05fe a000 cont cs00,ar17,br17,ldbf,subz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; complement test pattern
02f8 e0ee 6338 05fe a000 cont cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,0
; ; incr. addr
02f9 e0ee 2b78 057e 6400 cont cs00,ar16,br16,nonf,subo,rsda,cb,waw,bs3,bd0,doxx&alustat,fi5+1
; ; compare with max addr
02fa 38ee 2138 0dfa a2f6 cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts031
; ; jump if not max to ts031
02fb e0ee 7138 05fe a000 cont cs00,ar16,br16,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
; ; zero to reg 16
\f
!0055 m3503
; rc3503 microprogram.
; working register data test. (cont.)
; when called: (fi1,fi2)= data constant.
; return:
; if test=ok then (fi5)=0 else (fi5)<>0
; and (fi3,fi4)=addr. and (fi1,fi2)=wanted data.
02fc 10ee 2138 05fe a229 ts032: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
; ; read value
02fd e07f 2a78 057e a000 cont cs00,ar07,br17,nonf,subo,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; is read = wanted ?
02fe 387f 6138 0dfa a2e2 cjp cs10,ar07,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,te02
; ; jump if it isen't to te02
02ff e077 6938 05fe a000 cont cs00,ar07,br07,ldbf,subz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; complement wanted value
0300 e0ee 6338 05fe a000 cont cs00,ar16,br16,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,0
; ; incr. addr
0301 e0ee 2b78 057e 6400 cont cs00,ar16,br16,nonf,subo,rsda,cb,waw,bs3,bd0,doxx&alustat,fi5+1
; ; compare with max addr
0302 38ee 2138 0dfa a2fc cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts032
; ; jump if not max to ts032
0303 e0ee 61f8 05fe 63ff cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
0304 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; zero to fi5 (test ok)
0305 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
\f
!0056 m3503
; rc3503 microprogram.
; memory address register test.
; call: (fi1,fi2)= modul no.
; if test=ok then (fi5)=0 else (fi5)<>0
; and (fi3,fi4)=addr and (fi1,fi2)=wanted data.
0306 e0ee 61f8 05fe 63fc tes04: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi2
; ; fi2 addr to reg 16
0307 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; read fi1 and fi2, result in reg17 (modul number)
0308 e0e7 6138 05fe a000 cont cs00,ar16,br07,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save modul number in reg 7
0309 e0ee 7138 05fe a000 cont cs00,ar16,br16,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
; ; zero to reg 16 (addr)
030a 10ef 6138 05fe a232 ts041: js cs00,ar16,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbwrite
; ; write addr on addr
030b e0ae 6078 05fe a000 cont cs00,ar12,br16,ldbf,addz,rsab,cb,waw,bs5,bd0,doxx,0
; ; incr. addr
030c e0ee 2138 057e a000 cont cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&alustat,0
; ; is offset = 0 (finish with module)
030d 3800 2138 0dfa a30a cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts041
; ; if not jump to ts041
030e 10ee 2138 05fe a22c ts042: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbread
; ; read from mem. starting in cell 0
030f e0ef 2a78 057e a000 cont cs00,ar16,br17,nonf,subo,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; is read = wanted ?
0310 38ee 2138 0dfa a2e2 cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,te02
; ; if not jump to te02 (error)
0311 e0ae 6078 057e a000 cont cs00,ar12,br16,ldbf,addz,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; incr. addr
0312 38ee 2138 0dfa a30e cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts042
; ; is offset = 0 (finish with module) if not jump to ts042
0313 e0ee 61f8 05fe 63ff cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
0314 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; write zero into fi5 (test ok)
0315 30ee 2138 05fe e275 jp cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump to tsrun
\f
!0057 m3503
; rc3503 microprogram.
; memory data test.
; call: (fi1,fi2)=modul no. and (fi3,fi4)=data constant.
; if test=ok then (fi5)=0 else (fi5)<>0
; and (fi3,fi4)=addr and (fi1,fi2)=wanted data.
0316 e0ee 61f8 05fe 63fc tes05: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi2
; ; fi2 addr to reg 16
0317 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; read fi1 and fi2, result in reg 16,(modul no.)
0318 e0e7 6138 05fe a000 cont cs00,ar16,br07,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save modul number in reg 7
0319 e0ee 61f8 05fe 63fe cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi4
; ; fi4 addr to reg 16
031a 10ee 2138 05fe a244 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gword
; ; read fi3 and fi4, result in reg 16, (testpattern)
031b e0ed 6138 05fe a000 cont cs00,ar16,br15,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; save test pattern in reg 15
031c e0ee 7138 05fe a000 cont cs00,ar16,br16,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
; ; zero to reg 16 (addr)
031d e0df 6138 05fe a000 cont cs00,ar15,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; test pattern to reg 17
031e 10ee 2138 05fe a232 ts051: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbwrite
; ; write pattern. (starting in cell 0)
031f e0ae 6078 057e a000 cont cs00,ar12,br16,ldbf,addz,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; incr. addr
0320 e0ff 6938 05fe a000 cont cs00,ar17,br17,ldbf,subz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; complement test pattern
0321 38ee 2138 0dfa a31e cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts051
; ; is offset =0, if not jump to ts051
0322 e0ee 7138 05fe a000 cont cs00,ar16,br16,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,0
; ; zero to reg 16 (addr)
\f
!0058 m3503
; rc3503 microprogram.
; memory data test. (cont.)
; call: (fi1,fi2)=modul no. and (fi3,fi4)=data constant.
; if test=ok then (fi5)=0 else (fi5)<>0
; and (fi3,fi4)=addr and (fi1,fi2)=wanted data.
0323 10ee 2138 05fe a22c ts052: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbread
; ; read mem
0324 e0fd 2a78 057e a000 cont cs00,ar17,br15,nonf,subo,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; is read = wanted ?
0325 38df 6138 0dfa a2e2 cjp cs10,ar15,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,te02
; ; if not move wanted to reg 17 and jump to te02
0326 e0dd 6938 05fe a000 cont cs00,ar15,br15,ldbf,subz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; complement test pattern
0327 e0ae 6078 057e a000 cont cs00,ar12,br16,ldbf,addz,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; is offset = 0?
0328 38ee 2138 0dfa a323 cjp cs10,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,ts052
; ; if not jump ts052
0329 e0ee 61f8 05fe 63ff cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
; ; fi5 addr to reg 16
032a 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; zero to fi5 (test ok)
032b 30ee 2138 05fe e275 jp cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
\f
!0059 m3503
; rc3503 microprogram.
; routine to test that the level in cdi exist.
; if level(cdi) exist then cdo<>0 else cdo=0
032c e0ee 61f8 05fe c000 tslev: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs6,bd0,doxx,0
; ; level under test to reg 16
032d e0ee 7178 05fe 607f cont cs00,ar16,br16,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,177
; ; mask for max 127 levels
032e 10e3 6138 05fe a05f js cs00,ar16,br03,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,sitrn
; ; set level, save level no in reg 3
032f e000 2138 05ee a000 tsl03: cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&sextend,0
; ; send sync-itr puls
0330 e000 2138 05fe 0000 cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs0,bd0,doxx,0
; ; dummy (delay)
0331 e0ee 61f8 05fe 0000 cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs0,bd0,doxx,0
; ; read inta answer to reg 16
0332 e0e4 7d38 05fe a000 cont cs00,ar16,br04,ldbf,xnor,rsoa,cb,waw,bs5,bd0,doxx,0
; ; >:reg16 to reg4
0333 e0e3 2a78 057e a000 cont cs00,ar16,br03,nonf,subo,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ; exist level ? (reg 16 = reg 3)
0334 3800 2138 0dfa a337 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,tsl02
; ; if not jump to tsl02
0335 e000 2138 05fe 78ff cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd6,doxx,377
; ; load cdo reg with *ff (level exist)
0336 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ;clear cr f/f, jump to tsrun
0337 e043 2078 057e a000 tsl02: cont cs00,ar04,br03,nonf,addz,rsab,cb,waw,bs5,bd0,doxx&alustat,0
; ;is it a higher level ?
0338 3b00 2138 0dfa a33b cjp cs13,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,tsl01
; ;if yes jump to tsl01
0339 e000 2138 05fe 7800 cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd6,doxx,0
; ; load cdo-reg with zero (level exist not)
033a 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump to tsrun
033b 10ee 2138 05fe a063 tsl01: js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,citrn
; ; clear the higher level
033c 30ee 2138 05fe a32f jp cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,tsl03
; ; jump tsl03
\f
!0060 m3503
; rc3503 microprogram.
; parity error routine.
; (fi4,5)= module no.
; (fi2,3)=address.
033d aae4 6138 0dfa a000 pxer1: crtn cs12,ar16,br04,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,0
033e e0ee 61f8 05fe 63ea cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fif
033f 10ee 2138 05fe a226 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
0340 e0ee 61f8 05fe 63eb cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fie
0341 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0342 e0ff 3078 057e a000 cont cs00,ar17,br17,nonf,ands,rsab,cb,waw,bs5,bd0,doxx&alustat,0
0343 3800 2138 0dfa a350 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,pxer2
0344 e0ee 61f8 05fe 63ee cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fib
; ; addr fi5 to reg 16
0345 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; zero to reg 17, write zero into fi5
0346 e0ee 61f8 05fe 63ef cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fia
; ; addr fi4 to reg 16
0347 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; zero to reg 17, write zero into fi4
0348 e0ee 61f8 05fe 63ec cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fid
; ; addr fi3 to reg 16
0349 104f 6138 05fe a226 js cs00,ar04,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
; ; mem addr 8:15 to reg 17, write it into fi3
034a e0ee 61f8 05fe 63ed cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fic
; ; addr fi2 to reg 16
034b e04f 6138 05fe a000 cont cs00,ar04,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; mem addr 0:7 to reg 17
034c 10ff 61f8 05fe 2226 js cs00,ar17,br17,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,wwreg
; ; swap reg 17, mem addr 0:7 into fi2
034d e0ee 61f8 05fe 63eb cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fie
034e 102f 6138 05fe a226 js cs00,ar02,br17,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
034f e000 2138 05fe 7406 cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs3,bd5,doxx,6
; ; send itr to 8085
0350 e0ee 61f8 05fe 63ea pxer2: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fif
0351 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0352 a04e 6138 05fe a000 rtn cs00,ar04,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
\f
!0061 m3503
; rc3503 microprogram.
; parity error routine.
; (fi4,5)= module no.
; (fi2,3)= address.
0353 e0ee 61f8 05fe 63ef wrreq: cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fia
0354 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0355 e0ee 61f8 05fe 63fe cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi4
0356 10ee 2138 05fe a226 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
0357 e0ee 61f8 05fe 63ee cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fib
0358 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0359 e0ee 61f8 05fe 63ff cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi5
035a 10ee 2138 05fe a226 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
035b e0ee 61f8 05fe 63ed cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fic
035c 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
035d e0ee 61f8 05fe 63fc cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi2
035e 10ee 2138 05fe a226 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
035f e0ee 61f8 05fe 63ec cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fid
0360 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0361 e0ee 61f8 05fe 63fd cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fi3
0362 10ee 2138 05fe a226 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wwreg
0363 e0ee 61f8 05fe 63eb cont cs00,ar16,br16,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,fie
0364 10ee 2138 05fe a229 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rwreg
0365 e0f2 6138 05fe a000 cont cs00,ar17,br02,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
0366 10ff 7138 05fe a226 js cs00,ar17,br17,ldbf,ands,rsoa,cb,waw,bs5,bd0,doxx,wwreg
0367 e022 e138 05fe a000 cont cs00,ar02,br02,lblf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; shift reg 2 < 1 parity error info
0368 e022 7178 05fe 6006 cont cs00,ar02,br02,ldbf,ands,rsda,cb,waw,bs3,bd0,doxx,6
; ; mask with 6
0369 e022 6178 05fe 6041 cont cs00,ar02,br02,ldbf,addz,rsda,cb,waw,bs3,bd0,doxx,perro
; ; add parity base command
036a e022 2138 05fe b800 cont cs00,ar02,br02,nonf,addz,rsoa,cb,waw,bs5,bd6,doxx,0
; ; load cdo reg with parity information
036b e000 2138 05fe e000 cont cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,0
; ; clear cr f/f
036c 3000 2138 05fe a009 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dupdat
; ; jump dupdat
\f
!0062 m3503
036d 3877 232a 0dfa a370 xrbb: cjp cs10,ar07,br07,nonf,addo,rsoa,cl,wax,bs5,bd0,(doxx+nccen),pupdat
036e e070 2778 057e 4000 cont cs00,ar07,br00,nonf,suno,rsda,cb,waw,bs2,bd0,(xdox&alustat),0
036f 3800 2138 0dfa a1f0 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx+nccen,bupdat
0370 101e 6138 05fe a05f pupdat: js cs00,ar01,br16,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,sitrn
0371 3000 2138 05fe a1f2 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,eupdat
0372 1000 2138 05fe a33d pxerf: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,pxer1
0373 3000 2138 05fe a024 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,fetrd
; instruction to transfer a word
; from memory with module select m(s) to memory module select m(d)
; before execution of this instruction the following working
; registers had to be set.
; ac1(0:7) source module select;ac1(8:15) destinatin module select.
; ac2 source address.
; ac3 destination address.
0374 e077 61fc 05fe 4001 msetc: cont cs00,ar07,br07,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
0375 e077 61f8 05fe 2000 cont cs00,ar07,br07,ldbf,addz,rsdo,cb,waw,bs1,bd0,doxx,0
0376 e0ee 61fc 05fe 4002 cont cs00,ar16,br16,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,2
0377 10ee 2138 05fe a22c js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbread
0378 e077 61fc 05fe 4001 cont cs00,ar07,br07,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,1
0379 e0ee 61fc 05fe 4003 cont cs00,ar16,br16,ldbf,addz,rsdo,cb,wap,bs2,bd0,xdox,3
037a 10ee 2138 05fe a232 js cs00,ar16,br16,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dbwrite
037b 3000 2138 05fe a1ed jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,nupdat
\f
!0063 m3503
; rc3503 microprogram.
; fetch routine .
037c e0dd 61f8 05fe 7d78 pfetch: cont cs00,ar15,br15,ldbf,addz,rsdo,cb,waw,bs3,bd7,doxx,128.+370
037d e011 61f8 05fe 601f cont cs00,ar01,br01,ldbf,addz,rsdo,cb,waw,bs3,bd0,doxx,37
037e e006 61f8 05fe 7404 cont cs00,ar00,br06,ldbf,addz,rsdo,cb,waw,bs3,bd5,doxx,4
037f 3000 2138 05ee a3ec jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx&sextend,fetch
\f
!0064 m3503
; rc3503 micro program
; condition vector map.
.floc 4*1600
0380 3000 42e4 05fe a1ed vec30: jp cs00,ar00,br00,ldba,addo,rsob,cr,wap,bs5,bd0,doxx,nupdat
0381 e000 202c 05fe d400 cont cs00,ar00,br00,nonf,addz,rsaq,cl,wap,bs6,bd5,doxx,0
0382 e006 61e4 05fe 7404 vec31: cont cs00,ar00,br06,ldbf,addz,rsdo,cr,wap,bs3,bd5,doxx,4
0383 3000 61e7 05fe 41ee jp cs00,ar00,br00,ldbf,addz,rsdo,cr,war,bs2,bd0,xdox,qupdat
0384 e006 61e4 05fe 7405 vec32: cont cs00,ar00,br06,ldbf,addz,rsdo,cr,wap,bs3,bd5,doxx,5
0385 3000 61e7 05fe 41ee jp cs00,ar00,br00,ldbf,addz,rsdo,cr,war,bs2,bd0,xdox,qupdat
0386 103e 6124 05fe a05f vec33: js cs00,ar03,br16,ldbf,addz,rsoa,cr,wap,bs5,bd0,doxx,sitrn
0387 3000 61e7 05fe 41ee jp cs00,ar00,br00,ldbf,addz,rsdo,cr,war,bs2,bd0,xdox,qupdat
0388 9077 a0e0 05be a388 vec40: rpct cs00,ar07,br07,lbrf,addz,rsob,cr,waw,bs5,bd0,doxx&ucarry,vec40
0389 3074 6128 05fe a9ed jp cs00,ar07,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
038a 9077 a0e0 05be a38a rr01: rpct cs00,ar07,br07,lbrf,addz,rsob,cr,waw,bs5,bd0,doxx&ucarry,rr01
038b 3074 6128 05fe a9ed jp cs00,ar07,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
038c 9077 a0e0 05fe a38c rr02: rpct cs00,ar07,br07,lbrf,addz,rsob,cr,waw,bs5,bd0,doxx,rr02
038d 3074 6128 05fe a9ed jp cs00,ar07,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
038e 9077 a0e0 05be a38e rr03: rpct cs00,ar07,br07,lbrf,addz,rsob,cr,waw,bs5,bd0,doxx&ucarry,rr03
038f 3074 6128 05fe a9ed jp cs00,ar07,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
\f
!0065 m3503
; rc3503 microprogram
; this routine controls the enable/disable interrupt
; flag in accordance to the value of ir(9:10).
; ir(9:10)= 00 do nothing
; ir(9:10)= 01 enable interrupt system
; ir(9:10)= 10 disable interrupt system
; ir(9:10)= 11 set level specified by q(11:15).
0390 3000 61e7 05fe 41ee upitr: jp cs00,ar00,br00,ldbf,addz,rsdo,cr,war,bs2,bd0,xdox,qupdat
; ; jump vec30
0391 3000 2138 05fe a382 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec31
; ; jump vec31
0392 3000 2138 05fe a384 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec32
; ; jump vec32
0393 3000 2138 05fe a386 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec33
; ; jump vec 33
; routine to shift right b01 the number of times
; specified in the n-counter (am2910).
; the specified operation is controlled by ir(9:10)
; ir(9:10)= 00 rotate right
; ir(9:10)= 01 logical shift right
; ir(9:10)= 10 no carry shift right
; ir(9:10)= 11 arithmetic shift right
0394 3000 2138 05fe a388 rright: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec40
; ; jump vec 40
0395 3000 2138 05fe a38a jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rr01
; ; jump rr01
0396 3000 2138 05fe a38c jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rr02
; ; jump rr02
0397 3000 2138 05fe a38e jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rr03
; ; jump rr03
\f
!0066 m3503
; rc3503 microprogram
; routine to shift left b01 the number of times
; specified in the n-counter.
; called by jump vector "rleft".
; the specified operation is controlled by ir(9:10).
; ir(9:10)= 00 rotate left.
; ir(9:10)= 01 logical shift left.
; ir(9:10)= 10 no carry shift left.
; ir(9:10)= 11 dummy.
0398 9077 e0e8 05be a398 vec21: rpct cs00,ar07,br07,lblf,addz,rsob,cl,waw,bs5,bd0,doxx&ucarry,vec21
; ; ir(9:10)=00. b07:=b07 shift left n-times.
0399 3074 6128 05fe a9ed jp cs00,ar07,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
; ; b07---> w(current level).
039a 9077 e0e8 05be a39a rl01: rpct cs00,ar07,br07,lblf,addz,rsob,cl,waw,bs5,bd0,doxx&ucarry,rl01
; ; ir(9:10)=01. b07:=b07 shift left n-times.
039b 3074 6128 05fe a9ed jp cs00,ar07,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
; ; b07---> w(current level).
039c 9077 e0e8 05fe a39c rl02: rpct cs00,ar07,br07,lblf,addz,rsob,cl,waw,bs5,bd0,doxx,rl02
; ; ir(9:10)=10. b07:=b07 shift left n-times.
039d 3074 6128 05fe a9ed jp cs00,ar07,br04,ldbf,addz,rsoa,cl,waw,bs5,bd2,xdox,nupdat
; ; b07---> w(current level).
039e 3000 20e4 05fe a202 updw0: jp cs00,ar00,br00,nonf,addz,rsob,cr,wap,bs5,bd0,doxx,vupdat
; ; ir(9:10)=11. b0---> w0(current level).
039f e0ff 3fff f5ff 03ff nop
03a0 3000 2138 05fe a398 rleft: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec21
; ; jump vec21
03a1 3000 2138 05fe a39a jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rl01
; ; jump rl01
03a2 3000 2138 05fe a39c jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rl02
; ; jump rl02
03a3 3000 2138 05fe a39e jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,updw0
; ; jump updw0
\f
!0067 m3503
; rc3503 microprogram.
; debug routine.
; condition vector map,depending upon cs(0:1).
; cs(0:1)= 11 goto grup3
; cs(0:1)= 10 goto grup2
; cs(0:1)= 01 goto grup1
; cs(0:1)= 00 goto grup0.
03a4 6500 2138 05fe a3c8 dmap: jv cs05,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,grup0
; ; jump grup0
03a5 6500 2138 05fe a3e0 jv cs05,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,grup1
; ; jump grup1
03a6 6500 2138 05fe a3bc jv cs05,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,grup2
; ; jump grup2
03a7 6500 2138 05fe a3b8 jv cs05,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,grup3
; ; jump grup3
\f
!0068 m3503
; rc3503 microprogram.
03a8 3000 2138 05fe e275 vec13: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
03a9 e0ff 3fff f5ff 03ff nop
03aa 1000 2138 05fe a24a vec14: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,getm
; ; load fifo with wanted word
03ab 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
03ac 1000 2138 05fe a273 vec15: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,getl
; ; load current level into cdo reg
03ad 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
03ae 1000 2138 05fe a25c vec16: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,getr
; ; load fifo with wanted w-reg contents
03af 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f, jump tsrun
03b0 1000 2138 05fe e26a vec17: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,rdadr
03b1 3000 2138 05fe a275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,tsrun
03b2 1000 2138 05fe a252 vec18: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,putm
; ; write into mem cell in question
03b3 3000 2138 05fe e009 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,dupdat
; ; clear cr f/f, jump dupdat
03b4 3000 2138 05fe e000 vec19: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,init
; ; clear cr f/f, jump init
03b5 e0ff 3fff f5ff 03ff nop
03b6 1000 2138 05fe a261 vec20: js cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,putr
; ; write into w-reg in question
03b7 3000 2138 05fe e009 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,dupdat
; ; clear cr f/f, jump dupdat
\f
!0069 m3503
; rc3503 microprogram
; grup3 vector jump (test af cs(2:3))
; cs(2:3)= 00
; cs(2:3)= 01 get memory (getm).
; cs(2:3)= 10 get level (getl).
; cs(2:3)= 11 get register (getr).
03b8 3000 2138 05fe a353 grup3: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,wrreq
; ; jump vec13
03b9 3000 2138 05fe a3aa jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec14
; ; jump vec14
03ba 3000 2138 05fe a3ac jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec15
; ; jump vec15
03bb 3000 2138 05fe a3ae jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec16
; ; jump vec16
; grup2 vector jump (test af cs(2:3)).
; cs(2:3)= 00 read address (rdadr).
; cs(2:3)= 01 put memory (putm).
; cs(2:3)= 10 autoload (init).
; cs(2:3)= 11 put register (putr).
03bc 3000 2138 05fe a3b0 grup2: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec17
; ; jump vec17
03bd 3000 2138 05fe a3b2 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec18
; ; jump vec18
03be 3000 2138 05fe a3b4 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec19
; ; jump vec19
03bf 3000 2138 05fe a3b6 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec20
; ; jump vec20
\f
!0070 m3503
; rc3503 microprogram.
03c0 3000 2138 05fe a268 vec05: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,rdat
; ; jump rdat
03c1 e0ff 3fff f5ff 03ff nop
03c2 3000 2138 05fe e00d vec06: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,fetcd
; ; clear cr f/f, jump fetcd
03c3 e0ff 3fff f5ff 03ff nop
03c4 3000 2138 05fe a277 vec07: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gloff
; ; jump gloff
03c5 e0ff 3fff f5ff 03ff nop
03c6 3000 2138 05fe e009 vec08: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,dupdat
; ; clear cr f/f, jump dupdat
03c7 e0ff 3fff f5ff 03ff nop
; grup0. vector jump (test af cs(2:3)).
; cs(2:3)= 00 read data (rdat).
; cs(2:3)= 01 exec next instruction (fetcd).
; cs(2:3)= 10 dummy
; cs(2:3)= 11 dummy
03c8 3000 2138 05fe a3c0 grup0: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec05
; ; jump vec05
03c9 3000 2138 05fe a3c2 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec06
; ; jump vec06
03ca 3000 2138 05fe a3c4 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec07
; ; jump vec07
03cb 3000 2138 05fe a3c6 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,vec08
; ; jump vec08
\f
!0071 m3503
; rc3503 microprogram
; map45. jump vector cs(4:5).
; cs(4:5)= 00 set timer and console level (settc).
; cs(4:5)= 01 set timer level (sett).
; cs(4:5)= 10 set console level (setc).
; cs(4:5)= 11 jump vector dmap.
03cc 3000 2138 05fe a293 map45: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,seti
; ; jump seti
03cd 3000 2138 05fe a28c jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,sett
; ; jump sett
03ce 3000 2138 05fe a291 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,seto
; ; jump seto
03cf 6400 2138 05fe a3a4 jv cs04,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,dmap
; ; jump dmap (debug map)
; parity error test for read byte.
; left parity is don't care
; 00 parity ok
; 01 error
; 10 parity ok
; 11 error
03d0 a000 2138 05fe a000 bypar: rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return no error
03d1 3000 2138 05fe a33d jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,pxer1
; ; jump to error routine
03d2 a000 2138 05fe a000 rtn cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
; ; return no error
03d3 3000 2138 05fe a33d jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,pxer1
; ; jump to error routine
\f
!0072 m3503
; rc3503 microprogram.
; vector table to test parity for bop format a.
; 00 odd+odd continue
; 01 even+odd branch
; 10 odd+even branch
; 11 even+even continue
03d4 30a0 6064 05ee abec xpeven: jp cs00,ar12,br00,ldbf,addz,rsab,cr,wap,bs5,bd2,xdox&sextend,fetch
03d5 3000 2138 05fe a16b jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,xbopa
03d6 3000 2138 05fe a16b jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,xbopa
03d7 30a0 6064 05ee abec jp cs00,ar12,br00,ldbf,addz,rsab,cr,wap,bs5,bd2,xdox&sextend,fetch
; rc3503 microprogram.
; vector table to test parity.
; 00 odd+odd --> even; continue.
; 01 even+odd --> odd ; branch.
; 10 odd+even --> odd ; branch.
; 11 even+even--> even; continue.
03d8 3000 2138 05fe a172 peven: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,bopc
; ; jump bopc
03d9 3000 2138 05fe a118 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,carg1
; ; jump carg1
03da 3000 2138 05fe a118 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,carg1
; ; jump carg1
03db 3000 2138 05fe a172 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,bopc
; ; jump bopc
; vector table to test cs(0:1).
; 00 jump gloff
; 01 jump tsrun
; 10 jump init
; 11 jump tsrun
03dc 3000 2138 05fe a277 xgl00: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,gloff
; ; jump gloff
03dd 3000 2138 05fe a275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,tsrun
; ; jump tsrun
03de 3000 2138 05fe a000 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,init
; ; jump init
03df 3000 2138 05fe a275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,tsrun
; ; jump tsrun
\f
!0073 m3503
; rc3503 microprogram
; vector table grup1. test of cs(2:3).
; cs(2:3)= 00 dummy (return to test run f/f)
; 01 dummy (return to test run f/f)
; 10 level exist test
; 11 tscom
03e0 3000 2138 05fe e275 grup1: jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f , jump tsrun
03e1 3000 2138 05fe e275 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs7,bd0,doxx,tsrun
; ; clear cr f/f , jump tsrun
03e2 3000 2138 05fe a32c jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,tslev
; ; jump tslev
03e3 3000 2138 05fe a2c4 jp cs00,ar00,br00,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,tscom
; ; jump tscom
; vector table to test parity.
; 00 ac2=ac2 no parity error
; 01 ac2=1 right parity error
; 10 ac2=2 left parity error
; 11 ac2=0 left/right parity error
03e4 20a0 6067 05fe a800 sparf: jmap cs00,ar12,br00,ldbf,addz,rsab,cr,war,bs5,bd2,xdox,0
; ; return no parity error
03e5 3022 6338 05fe a372 jp cs00,ar02,br02,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,pxerf
; ; 1 to reg 2
03e6 30a2 6138 05fe a372 jp cs00,ar12,br02,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,pxerf
; ; 2 to reg 2
03e7 30a2 6278 05fe a372 jp cs00,ar12,br02,ldbf,addo,rsab,cb,waw,bs5,bd0,doxx,pxerf
; ; 3 to reg 2
03e8 a022 2138 05fe a000 sparw: rtn cs00,ar02,br02,nonf,addz,rsoa,cb,waw,bs5,bd0,doxx,0
03e9 3022 6338 05fe a33d jp cs00,ar02,br02,ldbf,addo,rsoa,cb,waw,bs5,bd0,doxx,pxer1
03ea 30a2 6138 05fe a33d jp cs00,ar12,br02,ldbf,addz,rsoa,cb,waw,bs5,bd0,doxx,pxer1
03eb 30a2 6278 05fe a33d jp cs00,ar12,br02,ldbf,addo,rsab,cb,waw,bs5,bd0,doxx,pxer1
\f
!0074 m3503
; rc3503 microprogram.
03ec 3e6b 3078 0d7a 0008 fetch: cjp cs16,ar06,br13,nonf,ands,rsab,cb,waw,bs0,bd0,(doxx+nccen)&alustat,debug
03ed 3811 2b78 0d7a 03f2 fetca: cjp cs10,ar01,br01,nonf,subo,rsda,cb,waw,bs0,bd0,(doxx+nccen)&alustat,disab
03ee 3800 2138 05fa 03f2 cjp cs10,ar00,br00,nonf,addz,rsoa,cb,waw,bs0,bd0,doxx&ccen,disab
03ef e0c1 61f8 05fe 1c00 cont cs00,ar14,br01,ldbf,addz,rsdo,cb,waw,bs0,bd7,doxx,0
03f0 e0dd 61ff 05fe 4000 cont cs00,ar15,br15,ldbf,addz,rsdo,cb,war,bs2,bd0,xdox,0
03f1 e0dd 2138 05fe bc00 cont cs00,ar15,br15,nonf,addz,rsoa,cb,waw,bs5,bd7,doxx,0
03f2 e000 61ff 05be 4000 disab: cont cs00,ar00,br00,ldbf,addz,rsdo,cb,war,bs2,bd0,xdox&ucarry,0
03f3 e000 2118 05fe 64c0 cont cs00,ar00,br00,nonf,addz,rsoa,xcb,waw,bs3,bd1,doxx,300
03f4 e00e 6108 05fc b000 cont cs00,ar00,br16,ldbf,addz,rsoa,xcl,waw,bs5,bd4,doxx&forread,0
03f5 e0ff 01df 076e 8000 cont cs00,ar17,br17,ldqf,addz,rsdo,xcb,war,bs4,bd0,tack&alustat&sextend,0
03f6 6362 5138 05fe b7e4 jv cs03,ar06,br02,ldba,ands,rsoa,cb,waw,bs5,bd5,doxx,sparf
\f
!0075 m3503
.floc 4*4000
; table pro layout.
; ic23,25.
; address calculation jump table.escape=0.
0800 0000 0000 0000 0026 radr. fax0,24.
0818 0000 0000 0001 0098 adr. rxc ; read status/word.
0819 0000 0000 0001 0083 adr. wxcx0 ; write control/word.
081a 0000 0000 0000 0057 adr. ild ; interlevel load.
081b 0000 0000 0000 004f adr. ist ; interlevel store.
081c 0000 0000 0000 0010 adr. shiti ; shift/rotate,x=0.
081d 0000 0000 0001 00eb adr. update ; dummy.
081e 0000 0000 0000 0044 adr. bx001 ; format b,x=0,i=0.
081f 0000 0000 0000 0034 adr. cx001 ; format c,x=0,i=0.
0820 0000 0000 0000 0026 radr. fax0,24. ; format a,x=0.
0838 0000 0000 0001 009f adr. rbx ; read block of bytes/word.
0839 0000 0000 0001 0091 adr. wbxx ; write block of bytes/word.
083a 0000 0000 0000 0057 adr. ild ; interlevel load.
083b 0000 0000 0000 004f adr. ist ; interlevel store.
083c 0000 0000 0000 0010 adr. shiti ; shift/rotate,x=0.
083d 0000 0000 0001 00eb adr. update ; dummy.
083e 0000 0000 0000 0042 adr. bx0i1 ; format b,x=0,i=1.
083f 0000 0000 0000 0039 adr. cx0i1 ; format c,x=0,i=1.
0840 0000 0000 0000 0028 radr. faxn,24. ; format a,x<>0.
0858 0000 0000 0001 0098 adr. rxc ; read status/word.
0859 0000 0000 0001 008a adr. wxcxn ; write control/word,x<>0.
085a 0000 0000 0000 0057 adr. ild ; interlevel load.
085b 0000 0000 0000 004f adr. ist ; interlevel store.
085c 0000 0000 0000 0019 adr. shitx ; shift/rotate,x<>0.
085d 0000 0000 0001 00eb adr. update ; dummy.
085e 0000 0000 0000 003d adr. bxn01 ; format b,x<>0,i=0.
085f 0000 0000 0000 002b adr. cxn01 ; format c,x<>0,i=0.
0860 0000 0000 0000 0028 radr. faxn,24. ; format a,x<>0.
0878 0000 0000 0001 009f adr. rbx ; read block of bytes/word.
0879 0000 0000 0001 0091 adr. wbxx ; write block of bytes/word.
087a 0000 0000 0000 0057 adr. ild ; interlevel load.
087b 0000 0000 0000 004f adr. ist ; interlevel store.
087c 0000 0000 0000 0019 adr. shitx ; shift/rotate,x<>0.
087d 0000 0000 0001 00eb adr. update ; dummy.
087e 0000 0000 0000 0040 adr. bxni1 ; format b,x<>0,i=1.
087f 0000 0000 0000 0030 adr. cxni1 ; format c,x<>0,i=1.
\f
!0076 m3503
; address calculation map cont'd.
0880 0000 0000 0000 0028 radr. faxn,24. ; format a,x<>0.
0898 0000 0000 0001 0098 adr. rxc ; read status/word.
0899 0000 0000 0001 008a adr. wxcxn ; write control/word,x<>0.
089a 0000 0000 0000 0057 adr. ild ; interlevel load.
089b 0000 0000 0000 004f adr. ist ; interlevel store.
089c 0000 0000 0000 0019 adr. shitx ; shift/rotate,x<>0.
089d 0000 0000 0001 00eb adr. update ; dummy.
089e 0000 0000 0000 003d adr. bxn01 ; format b,x<>0,i=0.
089f 0000 0000 0000 002b adr. cxn01 ; format c,x<>0,i=0.
08a0 0000 0000 0000 0028 radr. faxn,24. ; format a,x<>0.
08b8 0000 0000 0001 009f adr. rbx ; read block of bytes/word.
08b9 0000 0000 0001 0091 adr. wbxx ; write block of bytes/word.
08ba 0000 0000 0000 0057 adr. ild ; interlevel load.
08bb 0000 0000 0000 004f adr. ist ; interlevel store.
08bc 0000 0000 0000 0019 adr. shitx ; shift/rotate,x<>0.
08bd 0000 0000 0001 00eb adr. update ; dummy.
08be 0000 0000 0000 0040 adr. bxni1 ; format b,x<>0,i=1.
08bf 0000 0000 0000 0030 adr. cxni1 ; format c,x<>0,i=1.
08c0 0000 0000 0000 0028 radr. faxn,24. ; format a,x<>0.
08d8 0000 0000 0001 0098 adr. rxc ; read status/word.
08d9 0000 0000 0001 008a adr. wxcxn ; write control/word,x<>0.
08da 0000 0000 0000 0057 adr. ild ; interlevel load.
08db 0000 0000 0000 004f adr. ist ; interlevel store.
08dc 0000 0000 0000 0019 adr. shitx ; shift/rotate,x<>0.
08dd 0000 0000 0001 00eb adr. update ; dummy.
08de 0000 0000 0000 003d adr. bxn01 ; format b,x<>0,i=0.
08df 0000 0000 0000 002b adr. cxn01 ; format c,x<>0,i=0.
08e0 0000 0000 0000 0028 radr. faxn,24. ; format a,x<>0.
08f8 0000 0000 0001 009f adr. rbx ; read block of bytes/word.
08f9 0000 0000 0001 0091 adr. wbxx ; write block of bytes/word.
08fa 0000 0000 0000 0057 adr. ild ; interlevel load.
08fb 0000 0000 0000 004f adr. ist ; interlevel store.
08fc 0000 0000 0000 0019 adr. shitx ; shift/rotate,x<>0.
08fd 0000 0000 0001 00eb adr. update ; dummy.
08fe 0000 0000 0000 0040 adr. bxni1 ; format b,x<>0,i=1.
08ff 0000 0000 0000 0030 adr. cxni1 ; format c,x<>0,i=1.
\f
!0077 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
0900 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
0901 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
0902 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
0903 0000 0000 0000 0089 adr. str1 ; str. store register.
0904 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
0905 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
0906 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
0907 0000 0000 0000 00c4 adr. stba ; stb. store byte.
0908 0000 0000 0000 00cf adr. adda ; add. add integer word.
0909 0000 0000 0000 00d9 adr. suba ; sub. subtract.
090a 0000 0000 0000 00e0 adr. anda ; and. logical and.
090b 0000 0000 0000 00e7 adr. lora ; logical or.
090c 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
090d 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
090e 0000 0000 0002 000b adr. mseta ; dummy.
090f 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
0910 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
0911 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
0912 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
0913 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
0914 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
0915 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
0916 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
0917 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
0918 0000 0000 0001 00eb radr. update,8.
\f
!0078 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
0920 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
0921 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
0922 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
0923 0000 0000 0000 0089 adr. str1 ; str. store register.
0924 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
0925 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
0926 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
0927 0000 0000 0000 00c4 adr. stba ; stb. store byte.
0928 0000 0000 0000 00cf adr. adda ; add. add integer word.
0929 0000 0000 0000 00d9 adr. suba ; sub. subtract.
092a 0000 0000 0000 00e0 adr. anda ; and. logical and.
092b 0000 0000 0000 00e7 adr. lora ; logical or.
092c 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
092d 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
092e 0000 0000 0002 000b adr. mseta ; dummy.
092f 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
0930 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
0931 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
0932 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
0933 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
0934 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
0935 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
0936 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
0937 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
0938 0000 0000 0001 00eb radr. update,8.
\f
!0079 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
0940 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
0941 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
0942 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
0943 0000 0000 0000 0089 adr. str1 ; str. store register.
0944 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
0945 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
0946 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
0947 0000 0000 0000 00c4 adr. stba ; stb. store byte.
0948 0000 0000 0000 00cf adr. adda ; add. add integer word.
0949 0000 0000 0000 00d9 adr. suba ; sub. subtract.
094a 0000 0000 0000 00e0 adr. anda ; and. logical and.
094b 0000 0000 0000 00e7 adr. lora ; logical or.
094c 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
094d 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
094e 0000 0000 0002 000b adr. mseta ; dummy.
094f 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
0950 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
0951 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
0952 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
0953 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
0954 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
0955 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
0956 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
0957 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
0958 0000 0000 0001 00eb radr. update,8.
\f
!0080 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
0960 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
0961 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
0962 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
0963 0000 0000 0000 0089 adr. str1 ; str. store register.
0964 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
0965 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
0966 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
0967 0000 0000 0000 00c4 adr. stba ; stb. store byte.
0968 0000 0000 0000 00cf adr. adda ; add. add integer word.
0969 0000 0000 0000 00d9 adr. suba ; sub. subtract.
096a 0000 0000 0000 00e0 adr. anda ; and. logical and.
096b 0000 0000 0000 00e7 adr. lora ; logical or.
096c 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
096d 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
096e 0000 0000 0002 000b adr. mseta ; dummy.
096f 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
0970 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
0971 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
0972 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
0973 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
0974 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
0975 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
0976 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
0977 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
0978 0000 0000 0001 00eb radr. update,8.
\f
!0081 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
0980 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
0981 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
0982 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
0983 0000 0000 0000 0089 adr. str1 ; str. store register.
0984 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
0985 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
0986 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
0987 0000 0000 0000 00c4 adr. stba ; stb. store byte.
0988 0000 0000 0000 00cf adr. adda ; add. add integer word.
0989 0000 0000 0000 00d9 adr. suba ; sub. subtract.
098a 0000 0000 0000 00e0 adr. anda ; and. logical and.
098b 0000 0000 0000 00e7 adr. lora ; logical or.
098c 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
098d 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
098e 0000 0000 0002 000b adr. mseta ; dummy.
098f 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
0990 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
0991 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
0992 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
0993 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
0994 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
0995 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
0996 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
0997 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
0998 0000 0000 0001 00eb radr. update,8.
\f
!0082 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
09a0 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
09a1 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
09a2 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
09a3 0000 0000 0000 0089 adr. str1 ; str. store register.
09a4 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
09a5 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
09a6 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
09a7 0000 0000 0000 00c4 adr. stba ; stb. store byte.
09a8 0000 0000 0000 00cf adr. adda ; add. add integer word.
09a9 0000 0000 0000 00d9 adr. suba ; sub. subtract.
09aa 0000 0000 0000 00e0 adr. anda ; and. logical and.
09ab 0000 0000 0000 00e7 adr. lora ; logical or.
09ac 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
09ad 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
09ae 0000 0000 0002 000b adr. mseta ; dummy.
09af 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
09b0 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
09b1 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
09b2 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
09b3 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
09b4 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
09b5 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
09b6 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
09b7 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
09b8 0000 0000 0001 00eb radr. update,8.
\f
!0083 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
09c0 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
09c1 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
09c2 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
09c3 0000 0000 0000 0089 adr. str1 ; str. store register.
09c4 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
09c5 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
09c6 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
09c7 0000 0000 0000 00c4 adr. stba ; stb. store byte.
09c8 0000 0000 0000 00cf adr. adda ; add. add integer word.
09c9 0000 0000 0000 00d9 adr. suba ; sub. subtract.
09ca 0000 0000 0000 00e0 adr. anda ; and. logical and.
09cb 0000 0000 0000 00e7 adr. lora ; logical or.
09cc 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
09cd 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
09ce 0000 0000 0002 000b adr. mseta ; dummy.
09cf 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
09d0 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
09d1 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
09d2 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
09d3 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
09d4 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
09d5 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
09d6 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
09d7 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
09d8 0000 0000 0001 00eb radr. update,8.
\f
!0084 m3503
; format a instruction jump map. escape=1.
; ic 23,25.
09e0 0000 0000 0000 0069 adr. ldr1 ; ldr. load register.
09e1 0000 0000 0000 0075 adr. ldc1 ; ldc. load complement.
09e2 0000 0000 0000 007f adr. ldi1 ; ldi. load indirect.
09e3 0000 0000 0000 0089 adr. str1 ; str. store register.
09e4 0000 0000 0000 0097 adr. sti1 ; sti. store indirect.
09e5 0000 0000 0000 00a2 adr. xsrai ; xsr. exchange store and register.
09e6 0000 0000 0000 00b2 adr. lba ; ldb. load byte.
09e7 0000 0000 0000 00c4 adr. stba ; stb. store byte.
09e8 0000 0000 0000 00cf adr. adda ; add. add integer word.
09e9 0000 0000 0000 00d9 adr. suba ; sub. subtract.
09ea 0000 0000 0000 00e0 adr. anda ; and. logical and.
09eb 0000 0000 0000 00e7 adr. lora ; logical or.
09ec 0000 0000 0000 00ee adr. xora ; xor. exlusive or.
09ed 0000 0000 0000 00f5 adr. lce1 ; lce. load clear enable.
09ee 0000 0000 0002 000b adr. mseta ; dummy.
09ef 0000 0000 0001 0002 adr. rsw1 ; rsw. read switches.
09f0 0000 0000 0001 001d adr. bgwa ; bgw. branch if greater.
09f1 0000 0000 0001 0027 adr. bewa ; bew. branch if equal.
09f2 0000 0000 0001 0034 adr. blwa ; blw. branch if less.
09f3 0000 0000 0001 0044 adr. bgba ; bgb. branch if greater byte.
09f4 0000 0000 0001 0052 adr. beba ; beb. branch if equal byte.
09f5 0000 0000 0001 005a adr. blba ; blb. branch if less byte.
09f6 0000 0000 0001 0062 adr. bsza ; bsz. branch if selected bits are zero.
09f7 0000 0000 0001 0068 adr. bopa ; bop. branch if selected bits has odd parity.
09f8 0000 0000 0001 00eb radr. update,8.
\f
!0085 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0a00 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0a01 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0a02 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0a03 0000 0000 0000 0092 adr. strix ; str. store register.
0a04 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0a05 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0a06 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0a07 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0a08 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0a09 0000 0000 0000 00dd adr. subb ; sub. subtract.
0a0a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0a0b 0000 0000 0000 00eb adr. lorb ; logical or.
0a0c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0a0d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0a0e 0000 0000 0002 000c adr. msetb ; dummy.
0a0f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0a10 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0a11 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0a12 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0a13 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0a14 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0a15 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0a16 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0a17 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0a18 0000 0000 0001 00eb adr. update
0a19 0000 0000 0001 00eb adr. update
0a1a 0000 0000 0002 0008 adr. ildc
0a1b 0000 0000 0002 0004 adr. istc
0a1c 0000 0000 0001 00eb radr. update,4.
\f
!0086 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0a20 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0a21 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0a22 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0a23 0000 0000 0000 0092 adr. strix ; str. store register.
0a24 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0a25 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0a26 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0a27 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0a28 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0a29 0000 0000 0000 00dd adr. subb ; sub. subtract.
0a2a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0a2b 0000 0000 0000 00eb adr. lorb ; logical or.
0a2c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0a2d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0a2e 0000 0000 0002 000c adr. msetb ; dummy.
0a2f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0a30 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0a31 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0a32 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0a33 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0a34 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0a35 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0a36 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0a37 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0a38 0000 0000 0001 00eb adr. update
0a39 0000 0000 0001 00eb adr. update
0a3a 0000 0000 0002 0008 adr. ildc
0a3b 0000 0000 0002 0004 adr. istc
0a3c 0000 0000 0001 00eb radr. update,4.
\f
!0087 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0a40 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0a41 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0a42 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0a43 0000 0000 0000 0092 adr. strix ; str. store register.
0a44 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0a45 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0a46 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0a47 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0a48 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0a49 0000 0000 0000 00dd adr. subb ; sub. subtract.
0a4a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0a4b 0000 0000 0000 00eb adr. lorb ; logical or.
0a4c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0a4d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0a4e 0000 0000 0002 000c adr. msetb ; dummy.
0a4f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0a50 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0a51 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0a52 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0a53 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0a54 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0a55 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0a56 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0a57 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0a58 0000 0000 0001 00eb adr. update
0a59 0000 0000 0001 00eb adr. update
0a5a 0000 0000 0002 0008 adr. ildc
0a5b 0000 0000 0002 0004 adr. istc
0a5c 0000 0000 0001 00eb radr. update,4.
\f
!0088 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0a60 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0a61 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0a62 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0a63 0000 0000 0000 0092 adr. strix ; str. store register.
0a64 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0a65 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0a66 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0a67 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0a68 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0a69 0000 0000 0000 00dd adr. subb ; sub. subtract.
0a6a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0a6b 0000 0000 0000 00eb adr. lorb ; logical or.
0a6c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0a6d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0a6e 0000 0000 0002 000c adr. msetb ; dummy.
0a6f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0a70 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0a71 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0a72 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0a73 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0a74 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0a75 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0a76 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0a77 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0a78 0000 0000 0001 00eb adr. update
0a79 0000 0000 0001 00eb adr. update
0a7a 0000 0000 0002 0008 adr. ildc
0a7b 0000 0000 0002 0004 adr. istc
0a7c 0000 0000 0001 00eb radr. update,4.
\f
!0089 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0a80 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0a81 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0a82 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0a83 0000 0000 0000 0092 adr. strix ; str. store register.
0a84 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0a85 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0a86 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0a87 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0a88 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0a89 0000 0000 0000 00dd adr. subb ; sub. subtract.
0a8a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0a8b 0000 0000 0000 00eb adr. lorb ; logical or.
0a8c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0a8d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0a8e 0000 0000 0002 000c adr. msetb ; dummy.
0a8f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0a90 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0a91 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0a92 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0a93 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0a94 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0a95 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0a96 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0a97 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0a98 0000 0000 0001 00eb adr. update
0a99 0000 0000 0001 00eb adr. update
0a9a 0000 0000 0002 0008 adr. ildc
0a9b 0000 0000 0002 0004 adr. istc
0a9c 0000 0000 0001 00eb radr. update,4.
\f
!0090 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0aa0 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0aa1 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0aa2 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0aa3 0000 0000 0000 0092 adr. strix ; str. store register.
0aa4 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0aa5 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0aa6 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0aa7 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0aa8 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0aa9 0000 0000 0000 00dd adr. subb ; sub. subtract.
0aaa 0000 0000 0000 00e4 adr. andb ; and. logical and.
0aab 0000 0000 0000 00eb adr. lorb ; logical or.
0aac 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0aad 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0aae 0000 0000 0002 000c adr. msetb ; dummy.
0aaf 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0ab0 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0ab1 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0ab2 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0ab3 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0ab4 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0ab5 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0ab6 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0ab7 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0ab8 0000 0000 0001 00eb adr. update
0ab9 0000 0000 0001 00eb adr. update
0aba 0000 0000 0002 0008 adr. ildc
0abb 0000 0000 0002 0004 adr. istc
0abc 0000 0000 0001 00eb radr. update,4.
\f
!0091 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0ac0 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0ac1 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0ac2 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0ac3 0000 0000 0000 0092 adr. strix ; str. store register.
0ac4 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0ac5 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0ac6 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0ac7 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0ac8 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0ac9 0000 0000 0000 00dd adr. subb ; sub. subtract.
0aca 0000 0000 0000 00e4 adr. andb ; and. logical and.
0acb 0000 0000 0000 00eb adr. lorb ; logical or.
0acc 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0acd 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0ace 0000 0000 0002 000c adr. msetb ; dummy.
0acf 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0ad0 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0ad1 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0ad2 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0ad3 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0ad4 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0ad5 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0ad6 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0ad7 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0ad8 0000 0000 0001 00eb adr. update
0ad9 0000 0000 0001 00eb adr. update
0ada 0000 0000 0002 0008 adr. ildc
0adb 0000 0000 0002 0004 adr. istc
0adc 0000 0000 0001 00eb radr. update,4.
\f
!0092 m3503
; format b instruction jump map. escape=0.
; ic 22,24.
0ae0 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0ae1 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0ae2 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0ae3 0000 0000 0000 0092 adr. strix ; str. store register.
0ae4 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0ae5 0000 0000 0000 00ac adr. xsrbx ; xsr. exchange store and register.
0ae6 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0ae7 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0ae8 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0ae9 0000 0000 0000 00dd adr. subb ; sub. subtract.
0aea 0000 0000 0000 00e4 adr. andb ; and. logical and.
0aeb 0000 0000 0000 00eb adr. lorb ; logical or.
0aec 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0aed 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0aee 0000 0000 0002 000c adr. msetb ; dummy.
0aef 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0af0 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0af1 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0af2 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0af3 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0af4 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0af5 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0af6 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0af7 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0af8 0000 0000 0001 00eb adr. update
0af9 0000 0000 0001 00eb adr. update
0afa 0000 0000 0002 0008 adr. ildc
0afb 0000 0000 0002 0004 adr. istc
0afc 0000 0000 0001 00eb radr. update,4.
\f
!0093 m3503
; format b instruction jump map. escape=1.
; ic 22,24.
0b00 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0b01 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0b02 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0b03 0000 0000 0000 008e adr. stri0 ; str. store register.
0b04 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0b05 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0b06 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0b07 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0b08 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0b09 0000 0000 0000 00dd adr. subb ; sub. subtract.
0b0a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0b0b 0000 0000 0000 00eb adr. lorb ; logical or.
0b0c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0b0d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0b0e 0000 0000 0002 000c adr. msetb ; dummy.
0b0f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0b10 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0b11 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0b12 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0b13 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0b14 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0b15 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0b16 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0b17 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0b18 0000 0000 0001 00eb adr. update
0b19 0000 0000 0001 00eb adr. update
0b1a 0000 0000 0002 0008 adr. ildc
0b1b 0000 0000 0002 0004 adr. istc
0b1c 0000 0000 0001 00eb radr. update,4.
\f
!0094 m3503
; format b instruction jump map. escape=1.
; ic 22,24.
0b20 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0b21 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0b22 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0b23 0000 0000 0000 008e adr. stri0 ; str. store register.
0b24 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0b25 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0b26 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0b27 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0b28 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0b29 0000 0000 0000 00dd adr. subb ; sub. subtract.
0b2a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0b2b 0000 0000 0000 00eb adr. lorb ; logical or.
0b2c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0b2d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0b2e 0000 0000 0002 000c adr. msetb ; dummy.
0b2f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0b30 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0b31 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0b32 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0b33 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0b34 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0b35 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0b36 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0b37 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0b38 0000 0000 0001 00eb adr. update
0b39 0000 0000 0001 00eb adr. update
0b3a 0000 0000 0002 0008 adr. ildc
0b3b 0000 0000 0002 0004 adr. istc
0b3c 0000 0000 0001 00eb radr. update,4.
\f
!0095 m3503
; format b instruction jump map. escape=1.
; ic 22,24.
0b40 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0b41 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0b42 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0b43 0000 0000 0000 008e adr. stri0 ; str. store register.
0b44 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0b45 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0b46 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0b47 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0b48 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0b49 0000 0000 0000 00dd adr. subb ; sub. subtract.
0b4a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0b4b 0000 0000 0000 00eb adr. lorb ; logical or.
0b4c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0b4d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0b4e 0000 0000 0002 000c adr. msetb ; dummy.
0b4f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0b50 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0b51 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0b52 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0b53 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0b54 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0b55 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0b56 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0b57 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0b58 0000 0000 0001 00eb adr. update
0b59 0000 0000 0001 00eb adr. update
0b5a 0000 0000 0002 0008 adr. ildc
0b5b 0000 0000 0002 0004 adr. istc
0b5c 0000 0000 0001 00eb radr. update,4.
\f
!0096 m3503
; format b instruction jump map. escape=1.
; ic 22,24.
0b60 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0b61 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0b62 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0b63 0000 0000 0000 008e adr. stri0 ; str. store register.
0b64 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0b65 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0b66 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0b67 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0b68 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0b69 0000 0000 0000 00dd adr. subb ; sub. subtract.
0b6a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0b6b 0000 0000 0000 00eb adr. lorb ; logical or.
0b6c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0b6d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0b6e 0000 0000 0002 000c adr. msetb ; dummy.
0b6f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0b70 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0b71 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0b72 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0b73 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0b74 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0b75 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0b76 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0b77 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0b78 0000 0000 0001 00eb adr. update
0b79 0000 0000 0001 00eb adr. update
0b7a 0000 0000 0002 0008 adr. ildc
0b7b 0000 0000 0002 0004 adr. istc
0b7c 0000 0000 0001 00eb radr. update,4.
\f
!0097 m3503
; format b instruction jump map. escape=1.
; ic 22,24.
0b80 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0b81 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0b82 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0b83 0000 0000 0000 008e adr. stri0 ; str. store register.
0b84 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0b85 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0b86 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0b87 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0b88 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0b89 0000 0000 0000 00dd adr. subb ; sub. subtract.
0b8a 0000 0000 0000 00e4 adr. andb ; and. logical and.
0b8b 0000 0000 0000 00eb adr. lorb ; logical or.
0b8c 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0b8d 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0b8e 0000 0000 0002 000c adr. msetb ; dummy.
0b8f 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0b90 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0b91 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0b92 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0b93 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0b94 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0b95 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0b96 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0b97 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0b98 0000 0000 0001 00eb adr. update
0b99 0000 0000 0001 00eb adr. update
0b9a 0000 0000 0002 0008 adr. ildc
0b9b 0000 0000 0002 0004 adr. istc
0b9c 0000 0000 0001 00eb radr. update,4.
\f
!0098 m3503
; format b instruction jump map. escape=1.
; ic 22,24.
0ba0 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0ba1 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0ba2 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0ba3 0000 0000 0000 008e adr. stri0 ; str. store register.
0ba4 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0ba5 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0ba6 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0ba7 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0ba8 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0ba9 0000 0000 0000 00dd adr. subb ; sub. subtract.
0baa 0000 0000 0000 00e4 adr. andb ; and. logical and.
0bab 0000 0000 0000 00eb adr. lorb ; logical or.
0bac 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0bad 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0bae 0000 0000 0002 000c adr. msetb ; dummy.
0baf 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0bb0 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0bb1 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0bb2 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0bb3 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0bb4 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0bb5 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0bb6 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0bb7 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0bb8 0000 0000 0001 00eb adr. update
0bb9 0000 0000 0001 00eb adr. update
0bba 0000 0000 0002 0008 adr. ildc
0bbb 0000 0000 0002 0004 adr. istc
0bbc 0000 0000 0001 00eb radr. update,4.
\f
!0099 m3503
; format b instruction jump map. escape=1.
; ic 22,24.
0bc0 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0bc1 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0bc2 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0bc3 0000 0000 0000 008e adr. stri0 ; str. store register.
0bc4 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0bc5 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0bc6 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0bc7 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0bc8 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0bc9 0000 0000 0000 00dd adr. subb ; sub. subtract.
0bca 0000 0000 0000 00e4 adr. andb ; and. logical and.
0bcb 0000 0000 0000 00eb adr. lorb ; logical or.
0bcc 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0bcd 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0bce 0000 0000 0002 000c adr. msetb ; dummy.
0bcf 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0bd0 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0bd1 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0bd2 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0bd3 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0bd4 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0bd5 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0bd6 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0bd7 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0bd8 0000 0000 0001 00eb adr. update
0bd9 0000 0000 0001 00eb adr. update
0bda 0000 0000 0002 0008 adr. ildc
0bdb 0000 0000 0002 0004 adr. istc
0bdc 0000 0000 0001 00eb radr. update,4.
\f
!0100 m3503
; format b instruction jump map. escape=1.
; ic 23,25.
0be0 0000 0000 0000 006e adr. ldr23 ; ldr. load register.
0be1 0000 0000 0000 007a adr. ldc23 ; ldc. load complement.
0be2 0000 0000 0000 0083 adr. ldi23 ; ldi. load indirect.
0be3 0000 0000 0000 008e adr. stri0 ; str. store register.
0be4 0000 0000 0000 009c adr. sti23 ; sti. store indirect.
0be5 0000 0000 0000 00a7 adr. xsrb0 ; xsr. exchange store and register.
0be6 0000 0000 0000 00bb adr. ldbb ; ldb. load byte.
0be7 0000 0000 0000 00c9 adr. stbb ; stb. store byte.
0be8 0000 0000 0000 00d3 adr. addb ; add. add integer word.
0be9 0000 0000 0000 00dd adr. subb ; sub. subtract.
0bea 0000 0000 0000 00e4 adr. andb ; and. logical and.
0beb 0000 0000 0000 00eb adr. lorb ; logical or.
0bec 0000 0000 0000 00f2 adr. xorb ; xor. exlusive or.
0bed 0000 0000 0000 00fd adr. lce23 ; lce. load clear enable.
0bee 0000 0000 0002 000c adr. msetb ; dummy.
0bef 0000 0000 0001 000b adr. rsw23 ; rsw. read switches.
0bf0 0000 0000 0001 000f adr. bgwb ; bgw. branch if greater.
0bf1 0000 0000 0001 002d adr. bewb ; bew. branch if equal.
0bf2 0000 0000 0001 003c adr. blwb ; blw. branch if less.
0bf3 0000 0000 0001 0048 adr. bgbb ; bgb. branch if greater byte.
0bf4 0000 0000 0001 0056 adr. bebb ; beb. branch if equal byte.
0bf5 0000 0000 0001 005e adr. blbb ; blb. branch if less byte.
0bf6 0000 0000 0001 0065 adr. bszb ; bsz. branch if selected bits are zero.
0bf7 0000 0000 0001 006f adr. bopb ; bop. branch if selected bits has odd parity.
0bf8 0000 0000 0001 00eb adr. update
0bf9 0000 0000 0001 00eb adr. update
0bfa 0000 0000 0002 0008 adr. ildc
0bfb 0000 0000 0002 0004 adr. istc
0bfc 0000 0000 0001 00eb radr. update,4.
\f
!0101 m3503
0000 source lines in error
\f
▶EOF◀