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Length: 7680 (0x1e00)
Types: TextFile
Names: »lmitxt030«
└─⟦2c55ea56f⟧ Bits:30001844 SW-save af projekt 1000, Alarm-system
└─⟦093e2ad1c⟧
└─⟦this⟧ »lmitxt030«
;;
;; begin lmitxt030
;;
;; input/output block instructions
;;
;; the i/o block instructions are highly integrated into fetch.
;; once these instructions are executed, they will dump the
;; registerset of the corresponding level. thereafter they will
;; set up pointers, counters, a.s.o. in the register set. they
;; will further set an indication in rd2 telling that the
;; registerset is in block i/o mode. ultimately reg and lev
;; will be changed to point to the registerset of level 0. when
;; a registerset is performing block input/output, then reg and
;; lev must never point to that registerset.
;;
;; each time an interrupt arrives for a registerset performing
;; input/output, fetch will recognize the indication in rd2.
;; fetch will thereafter set up pointers, counters, a.s.o. in
;; the slice registers. thereafter it will clear the interrupt
;; and jump (by "jmap not 8") to the secondary part of the i/o
;; block instruction. this part will perform the input/output
;; and terminate by jumping to fetch. lev and reg will not be
;; changed. when, however, the block input/output is finished,
;; then the registerset will be loaded; lev and reg will be
;; updated, and the registerset will thereafter be working in
;; normal (i.e. not block i/o) mode.
;;
;; if a driver is stopped during block i/o mode, then the
;; registerset will not be dumped, but the i/o block transfer
;; will be stopped. if the monitor later sets the time-out bit
;; in the dumped registerset and starts the driver, it will
;; repeat the i/o block instruction, which in turn will terminate
;; because of time-out. unless the parameters to the block
;; instruction have been modified by the monitor, the i/o block
;; instruction will tell that no data has been input/output.
.p ;
;; usage of the register set and the slice registers during
;; block i/o mode:
;;
;; zd0 top=last+1
;; zd1=zdw ps
;; zd2=zdx process base
;; w1= zd3=zd next address.disp - 1
;; w2= rd0 next address.base
;; rd1=rdw process disp
;; rd2=rdx 83xx, where xx=instruction code (which is <= 7f )
;; w5= rd3=rd count
;;
;; w0= level = device no
;; w3=0 intended for the data to be output
;; w4=0 intended for the function code
;; w6= int for this register set
;; w7= the register address
;
;; the above slice registers have been defined, when fetch performs
;; "jmap not 8". furthermore the following holds:
;; bf = level ior 200
;; the interrupt has been cleared.
.p ;
;; common entry into the block i/o instructions:
;
initiob: ;
reg-7,s, ;
q:=ioblev0e,, ;
w7:=w0,,cjp zro xept ; exception if level=0
w0:=2,, ;
,,cjs clearbits ; clear eoi
,,cjs dumpregs ;
w7:=w7 and 7f,, ;
83,,, ; w7 := 83xx, where xx=instr code
w7:=w7 ior swp,,cjs readlucq;
rd2:=w7,, ; 83xx
zd:=q--,,cjs readlucq ; zd := disp-1
rd0:=q,, ; rd0 := base
,,cjs readlucq ;
rd:=q,,cjs readlucq ; rd := count
zd0:=q,, ; zd0 := top
ra:=reg:=7,, ; set reg and lev to level0
lev:=swp,,cjp sfetch ;
.p ;
;; from block i/o mode back to normal mode:
;
iobeoi1: ;
w5:=w5++,h , ; count:=count+1
iobeoi: ;
q:=zdw,h ,cjs not st3 seteoi1; if eoi then ps.eoi:=1
c:w0--w0,s,cjp iobeoi2 ; cry:=false; b15:=true;
iobfin: ;
rdx,c:w0--w0,s, ; cry:=false; b15:=odd(instr code)
iobxept: ;; from iorbw/iowbw with cry=true; b15=true;
iobeoi2: ;
,,cjs b15 setlint ; if b15 then setinterrupt(w0);
;
iobto: ;; from fetch with cry=false in case of time out
w3:=zd0-w5,, ; w3 := top - count
reg:=w7,, ; update reg and lev
lev:=w6,, ;
w5:=rdw,, ;
w5:=w5+dumplm,, ;
w6:=zdx,,cjs cread1 ;
zd0:=w1,, ; zd0:=maxstack
w5:=w5+4,, ;
spb:=w6,,cjs cread21 ; spb:=fprocess base
slu:=w2-8,, ; slu:=old lastused - 8
rd0:=w1,, ; rd0 := local frame
w5:=w5+4,, ;
,,cjs cread21 ;
rd2:=sib:=w2,, ; rd2 := sib := instruction counter base
rd:=w1,sic:=w1++,,cjp not cry wrfetch; sic := old instruction counter disp + 1
;; exception:
slu:=slu+8,, ; reset rd
q:=ioibxe1,, ;
zd:=slu,,cjp xept ; exception(ioibxe1)
.p ;
;; the block i/o part of the block input/output instructions:
;
.instruction iorbb , initiob ;
.instruction iorbbc , initiob ;
,h ,cjs xmitword1 ;
zd:=w1++,h ,cjs waitrec ; update next addr.disp
w3:=bd,h w ,cjp not zro iobeoi; jump if eoi or hard-to
ir:=rdx,w5:=w5--,s,cjs writebnext; sync itr; count:=count-1; write the byte
iorbb1: ;; from iowbb
rd:=w5,,cjp zro iobfin ; update count; jump if count=0
ra:=reg,,cjp fetch ; reset ra; goto fetch
;
.instruction iowbb , initiob ;
.instruction iowbbc , initiob ;
w4:=40,, ;
ir:=rdx,,,cjs readb21next ; sync itr
bf:=w0,h ,cjs xmitword1 ; select io module
zd:=w1,w5:=w5--,s,cjp st3 iorbb1; update addr.disp; count:=count-1;
; jump to iorbb1 if no eoi
w5:=w5++,,cjp iobeoi ; count:=count+1; goto iobeoi
.p ;
.instruction iorbw , initiob ;
.instruction iorbwc , initiob ;
c:=1,w5:=w5--,s, ; count:=count-1; cry:=b15:=true;
,,cjp zro iobxept ; exception if count was one
ir:=rdx,,h ,cjs xmitword1 ; sync itr
,h ,cjs waitrec ;
w3:=bd,h w ,cjp not zro iobeoi1; jump if eoi or hard-to
rd:=w5:=w5--,,cjs writenext; rd:=count:=count-1
iorbw2: ;; from iowbw
w5 and 7fe,s, ;
zd:=w1,,cjp zro iobfin ; zd:=nextaddr.disp; jump if count <= 1
ra:=reg,,cjp fetch ; reset reg; goto fetch
;
.instruction iowbw , initiob ;
.instruction iowbwc , initiob ;
c:=1,w5:=w5--,s, ; count:=count-1; cry:=b15:=true;
ir:=rdx,w1:=w1++,,cjp zro iobxept; sync itr; disp:=disp+1; exception if count was one
rd:=w5:=w5--,,cjs reado12 ; rd:=count:=count-1
w4:=40,, ; function code
bf:=w0,w3:=q,h ,cjs xmitword1;
zd:=w1:=w1++,h ,cjp st3 iorbw2; zd:=disp:=disp+1; jump if eoi
w5:=w5++,h ,cjp iobeoi1 ; count:=count+1; goto iobeoi1
.p ;
;;
;; end of lmitxt030
;;
.p ;
▶EOF◀