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Length: 8448 (0x2100)
Types: TextFile
Names: »lmitxt090«
└─⟦2c55ea56f⟧ Bits:30001844 SW-save af projekt 1000, Alarm-system
└─⟦093e2ad1c⟧
└─⟦this⟧ »lmitxt090«
;;
;; selfdiagnostic test routines.
;;
;; file: lmitxt090
;;
;; the test routines are executed as responce to
;; commands recieved from the 8085 debug micro.
;; after each test has been executed, an answer
;; is returned to the debug micro. below is a
;; short description of test commands and answers:
;;
;;fifo: 0 1 2 3 4 5 description
;;*) w3.l w3.r w1.l w1.r w2.l w2.r
;;
;; c: 1 - - - - - xmit 7.5 intrp
;; a: 1 - - - - - to 8085.
;;-------------------------------------------------------------------
;; c: 2 - - - - - w-reg addr. test.
;; a: 2 - - - - 0 test ok.
;; a: 0 read data errorra error error found.
;;-------------------------------------------------------------------
;; c: 3 test pattern - - - w-reg data test.
;; a: 3 - - - - 0 test ok.
;; a: 0 read data error ra error error found.
;;-------------------------------------------------------------------
;; c: 4 module no - - - mem. addr. test.
;; a: 4 - - - - 0 test ok.
;; a: 0 read data error addr error error found.
;;-------------------------------------------------------------------
;; c: 5 module no test pattern - mem. data test.
;; a: 5 - - - - 0 test ok.
;; a: 0 read data error addr error error found.
;;-------------------------------------------------------------------
;;
;; error= +1: left parity, +2: right parity, +4: data error;
;;
;; *) the w-reg bytes refers to the shiftcom fifo:
;; input -> w3.l -> w3.r -> w1.l -> w1.r -> w2.l -> w2.r -> output
.p ;
;;
;; select test
;;
;; entry: w3,w1,w2= microcom fifo; swap= w3; w4= 0ff; w5= 0ff00;
;;
selftest: ;selftest:
w0:=swp,, ;
w3:=w3 and w4,, ;
w6:=w1 and 700,, ;
bus:=w3 ior w6,, ;
w7:=swp,, ; w7:= fifo(1) shift 8 + fifo(2);
w0:=w0 and 7,, ; test:= fifo(0) and 7;
w0:=w0--,s,ldct mrq10 ; goto case test of (
w0:=w0--,s,cjp zro selft100; 1: selftest1;
w0:=w0--,s,cjp zro selft200; 2: selftest2;
w0:=w0--,s,cjp zro selft300; 3: selftest3;
w0:=w0--,s,cjp zro selft400; 4: selftest4;
,,jrp zro selft500 ; 5: selftest5;)
; otherwise end session;
;;
;; at entry to test routine:
;; wo= fifo(0) = test no; w1= fifo(2,3); w2= fifo(4,5);
;; w3= fifo(1); w4= 000ff; w5= 0ff00;
;; w6= fifo(2) shift 8; w7= fifo(1,2);
;;
.p ;
;;
;; selftest 1: generate 7.5 interrupt to 8085.
;;
selft100: ;selftest1:
led:=6,,, ; set8085;
,,cjp mrq10 ; goto end-session;
;;
;; selftest 2: register address test.
;;
selft200: ;selftest2:
w5:=3ff,s, ;
selft210: ; for i:= 1023 step (-1)
ra:=w5,, ; until 0 do
rd:=w5,w5:=w5--,s,cjp not zro selft210; regs(i):= i;
ra:=w5:=w5-w5,,push 3ff ; for i:= 0 step 1
w4:=rd,, ; until 1023 do
w5 xor w4,s, ;
ra:=w5:=w5++,,twb not zro selftok; if regs(i)<>i then goto error;
;;
;; selftest error, deliver errormessage to 8085.
;;
;; entry: w5= addr, w4= read data, q= error;
;;
selfterr4: ;selftesterror4:
q:=4,, ; error:= data error;
selftderr: ;selftestdataerror:
w5:=w5--,, ; addr:= addr-1;
selfterr: ;selftesterror:
bus:=w6:=0ff,, ; w6:= rmask;
w7:=swp,, ; w7:= lmask;
bus:=w5 and w6,, ;
w2:=swp ior q,, ; w2:= addr shift 8 + error;
w5:=w5 and w7,, ;
w1:=w4 and 0ff,, ;
bus:=w5 ior w1,, ; w1:= addr shift (-8) +
w1:=swp,, ; data shift 8;
bus:=w4,, ; w3:= data shift (-8);
w3:=swp and w6,,cjp selftfin; goto selftestfin;
.p ;
;;
;; selftest 3 : register data test.
;;
selft300: ;selftest3:
w4:=w7,, ; d:= testpattern;
w0:=,,push 3ff ; for r:= 0 step 1 until 1023 do
ra:=w0,w0:=w0++,, ; begin
rd:=w4,w4:=--w4,,rfct ; regs(r):= d; d:= -,d;
; end;
w5:=w5-w5,,push 3ff ; for r:= 0 step 1 until 1023 do
ra:=w5,w5:=w5++,, ; begin
w4:=rd,, ; if regs(r)<>testpattern
w4 xor w7,s, ; then goto selftestdataerror;
w7:=--w7,,twb not zro selftok; testpattern:= -,testpattern;
,,cjp selftderr ; end; goto selftestok;
;;
;; selftest 4 : memory address test.
;;
selft400: ;selftest4:
w2:=w7 ior 0c0,, ; b:= modulebase;
w3:=,, ; for d:= 0 step 2 until -2 do
selft410: ;
w1:=w3--,,cjs writenext ; writenext(b,d-1,d);
w3:=w3+2,s, ;
w6:=w7,,cjp not zro selft410;
selft420: ; for d:= 0 step 2 until -2 do
w5:=w3--,,cjs readnext ; begin
w4:=bd,h w s, ; readnext(b,d-1); d1:= waitmem;;
,h , ;
bd,,h w ,cjp pty selft430 ; if pty then goto t4parity;
w4 xor w3,s, ;
w3:=w5++,s,cjp not zro selfterr4; if d1<>d then goto selftesterror4;
,,cjp not zro selft420 ; end;
selftok: ;selftestok:
w2:=,, ; result:= ok;
selftfin: ;selftestfin:
stopmodereg= radummy - 4 ;
ra:=stopmodereg,,, ; stopmode:= 0;
rd:=,,cjp mrq22a ; goto update-cyclic;
.p ;
selft430: ;t4parity:
q:=w0-w0,,cjv 3 selft435 ; error:= 0; case parity of
.loc ;
selft435: ;
,,cjp selft440 ; no pty error: goto testdata;
q:=q++,, ; r pty error: error:= error + 2;
q:=q++,,cjp selft440 ; l pty error: error:= error + 1; goto testdata;
q:=3,, ; lr pty error: error:= 3;
selft440: ;testdata:
w4 xor w3,s,ldct selfterr ; if dataerror then
w5:=w5--,,cjp zro selfterr ; error:= error + 4;
q:=q+4,,jrp zro ; goto selftesterror;
;;
;; selftest 5 : memory data test.
;;
selft500: ;selftest5:
w1:=w1 and w4,, ;
w2:=w2 and w5,, ;
bus:=w1 ior w2,, ; testpattern:=
w3:=swp,, ; fifo(3) shift 8 + fifo(4);
w2:=w7 ior 0c0,, ; b:= module no;
w1:=,, ; for d:= 0 step 2 until -2 do
selft510: ; begin
w1:=w1--,,cjs writenext ; writenext(b,d-1,testpattern);
w1:=w1+1,s, ; testpattern:= -,testpattern;
w3:=--w3,,cjp not zro selft510; end;
w6:=w7,, ;
selft520: ; for d:= 0 step 2 until -2 do
w5:=w1--,,cjs readnext ; begin
w4:=bd,h w s, ; readnext(b,d-1);
w1:=w1+2,h , ; t:= waitmem;
bd,w4 xor w3,h w s,cjp pty selft430; if pty then goto t4parity;
w1,s,cjp not zro selfterr4 ; if t<>testpattern then goto selfterror4;
w3:=--w3,,cjp not zro selft520; testpattern:= -,testpattern;
,,cjp selftok ; end; goto selftestok;
;;
;; end of lmitxt090: selfdiagnostic routines
;;
.p ;
▶EOF◀