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⟦aeadc8099⟧ TextFile

    Length: 3840 (0xf00)
    Types: TextFile
    Names: »tcgtest03«

Derivation

└─⟦667bb35d6⟧ Bits:30007480 RC8000 Dump tape fra HCØ.
    └─⟦4334b4c0b⟧ 
        └─⟦this⟧ »tcgtest03« 

TextFile

*load: m2903
*list: on
*test: bitoff

  ; defines entry in the hc 2901
  ; ----------------------------
*page:

*const: e01inp, 116                   ; entry get intr. with no prefetc
*const: e01ip,130                    ; entry in hc2901 instr. with prefetch.
                                    ; -            -- -   -
*const: e01gup,71                   ; entry in hc2901 get unproctected 
*page: 4
*const: e01pup,31                   ; entry in hc2901 put unprotected.
*const: e01gpr,78                 ; entry in hc2901 get protected.
*const: e01ppr,40                 ; entry in hc2901 put unprotected.
*const: e01gdp,90                 ; entry in hc2901 get double word proted.
*const: e01pdp,053                 ; entry in hc2901 put duuble word unprotected.
*const: e01p01,0137                 ; entry in hc2901 general put;
*const: e01g01,0205                 ; entry in hc2901 general get;
*const: e01p13,189                  ; gp(lmem)
*const: e01p14,193                  ; gp(lwco)
*const: e01g14,233                  ; gg(lwco)
*const: e01twr,10                  ; write data in test reg.
*const: e01trw,14                  ; wait and read test reg


*origo:0
       cont nothm,csmy                 ;

       jmp(init)                       ;


    ; subroutine read memory.
    ; call: address in r9
    ; answ: data in r10

rdme:  inimm(hc2901,140) set(0)         ;
rdm1:  cjmp(re2901,rdm1) set(26)       ; wait hc2901
       inv(hc2901,r9) clear(0)         ; start hc2901 with address
rdm2:  cjmp(re2901,rdm2) inv(r10,hc2901) ; wait hc2901, r10:=data
       rtn                             ; return from subroutine



    ; Subroutine write memory.
    ; call: address in r9, data in r11
wrme:  inimm(hc2901,116) set(0)          ; start hc2901 in addr. 39
wrm1:  cjmp(re2901,wrm1) set(26)         ; wait hc2901
       inv(hc2901,r9) clear(0)          ; hc2901:=address
wrm2:  cjmp(re2901,wrm2) set(26)         ; wait hc2901
       inv(hc2901,r11) clear(0)         ;
wrm3:  cjmp(re2901,wrm3) set(26)           
       rtn                              ;


    ;Subroutine read testregister.
    ; answ: data in r12.
tstr:  inimm(hc2901,70) set(0)          ; start hc2901 in addr.70
tsr1:  cjmp(re2901,tsr1) inv(r12,hc2901); wait hc2901, r12:=tstreg
       rtn


    ; Subroutine write testregister
    ; call: data in r13
tstw:   inimm(hc2901,e01twr) set(0)          ; start hc2901 in addr. 72
tsw1:  cjmp(re2901,tsw1) set(26)         ; wait hc2901
       inv(hc2901,wrk1) clear(0)         ; hc2901:=data
tsw2:  cjmp(re2901,tsw2) set(26)         ; wait hc2901
       rtn                              ; return from subroutine


    ; Subroutine wait and read testregister.
    ; answ: data in r12
trdy: inimm(hc2901,e01trw) set(0)          ;
trd1:  cjmp(re2901,trd1) inv(wrk2,hc2901);
       rtn


trdn: inimm(hc2901,80) set(0)          ;
trd2: cjmp(re2901,trd2) inv(r12,hc2901)   ;
     rtn
trap: jsb(tstw)
      jsb(trdn)
      jsb(trdy)
      rtn
*test: biton
*test: labbit
      smove(q,windex)
init: cont nothm csmy shinz
      mzero(wrk1)

      move(wrk1,5)

      move(q,wrk1)
      cjmp(neg,init)  rgtqil
      add(q,'regge1) 
      ldctre(q)
      cjmrd(neg,init)
regge1: jmp(init)
         jmp(init)
         jmp(init)
         jmp(init)
         jmp(init)
         jmp(init)
         jmp(init)
         jmp(init)
     
*end:
▶EOF◀