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⟦bf425dcd4⟧ TextFile

    Length: 7680 (0x1e00)
    Types: TextFile
    Names: »hcintrinit«

Derivation

└─⟦621cfb9a2⟧ Bits:30002817 RC8000 Dump tape fra HCØ.  Detaljer om "HC8000" projekt.
    └─⟦0364f57e3⟧ 
        └─⟦this⟧ »hcintrinit« 

TextFile

     ;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
     ;; init of hc8000 interupt controler.
     ;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
     ;; init of amd9519 interupt controler.
     ;; writen by: carsten gyrn, sept. 1982.
     ;; entry address: g18.
     ;; call: 
     ;;       w0 = not used.
     ;;       w1 = address of value of level 0 in interupt
     ;;            controler.
     ;;            (evry level is initialized to
     ;;             C(x1  + 2*level no)).
     ;;       w2 = device address of control port of 
     ;;            interupt controler.
     ;;       w3 = return address.
     ;; destroyed = w0 w1 w2 w3.
     ;; the amd9519 interupt controler is initialised
     ;; to auto clear for all interupt and to
     ;; fixed priority.
     ;; see: advancded micro devices 9519  universal
     ;;      interupt controler documentation for 
     ;;      detailed and complete description,
     ;;      and for other possibilities.
     ;;
     ;;
     ;; note: acknovlege of interupt is made by
     ;;       the privilegd instruction: gg wX 94.
     ;;
     ;; for all amd9519 interupt controler:
     ;; device address     = data address
     ;; device address + 1 = control address.
     ;;
     ;; function: initialize the interupt amd9519 interupt controler
     ;;           no masked interupt, autoclear for all,
     ;;           fixed priority ( = lower interupt before higher)
     ;;           no polling.
     ;;           and arm ( enable ) interupt controler.
g18:b.c8, b0 w.
     ls  w2     3      ; shift data address 3 left.
     lo. w2     c1.    ; mask device base into data address.
g19: ;; entry when device data address already is complete.
     rs. w3     c0.    ; save return address.
     al  w3  x2+8      ; calculate device control address.
     ds. w3     c3.    ; save device control and data address.
     al  w0     0      ; set master reset control byte.
     do  w0  x3        ; send master reset to device.
     al  w3     0      ; level counter := 0;
     rl. w2     c4.    ; load control byte preselecting response 
                       ; memory for writing.
b0:  al  w0  x2        ; get preselect mask
     do. w0  (  c3.    ; send preselect response memory for writing,
                       ; to interupt controler.
     rl  w0  x1        ; get logical interupt level.
     do. w0  (  c2.    ; send logical level to interupt controler.
     al  w1  x1+2      ; next logical interupt level.
     al  w2  x2+1      ; next physical interupt level in this
                       ; interupt controler, (last 3 bit of control
                       ; byte for preselecting response memory for
                       ; writing).
     al  w3  x3+1      ; next level counter.
     se  w3     8      ; if not last level then
     jl.        b0.    ; goto repeat.
     rl. w0     c5.    ; get control byte for preselect 
                       ; autoclear mask register in interupt controler 
                       ; for writing.
     do. w0  (  c3.    ; send control byte to interupt controler
     rl. w0     c6.    ; get auto clear mask, ( clear all interupts).
     do. w0  (  c2.    ; send auto clear mask to interupt controler.
     rl. w0     c7.    ; get clear interupt and request bit mask.
     do. w0  (  c3.    ; send clear interupt and request bit mask to
                       ; interupt controler.
     rl. w0     c8.    ; get mask for arm interupt controler and 
                       ; preselect interupt request register for reading.
     do. w0  (  c3.    ; send arm comand and preselect for reading
                       ; to interupt controler.
     jl.     (  c0.    ; return.
c0:  0                 ; saved return address.
c1:  1<23+0<3+2.100    ; charakter device no.: 0
                       ; (base for all charakter devices).
c2:  0                 ; device address for data to intrupt controler.
c3:  0                 ; device address for control of interupt 
                       ; controler.
c4:  2.11100000        ; control byte for preselect response
                       ; memory for writing.
c5:  2.11000000        ; control byte for preselect auto clear
                       ; register for writing.
c6:  2.11111111        ; data byte to auto clear register, 
                       ; 255 = auto clear on all interupts.
c7:  2.00010000        ; control byte for clear interupt mask
                       ; ( all interupt active) 
c8:  2.10101001        ; control byte for preselecting interupt
                       ; request register for reading and arm
                       ; ( arm = special word for enable) interupt
                       ; controler.
     ;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
e.   ;; end of code to standard initialiation of interupt controler.
     ;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++


     ;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
     ;; read interupt controler status.
     ;; ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
     ;; entry address: g16
     ;; call: w0 = not used.
     ;;         w1 = not used.
     ;;         w2 = device address.
     ;;         w3 = return address.
     ;; return: w0 = complete status word.
     ;;         w1 = not used.
     ;;         w2 = complete device address.
     ;;         w3 = return address.
     ;; 
     ;; function: reads the status word from the amd9519
     ;;           interupt controler.
     ;;
     ;; not: the status words contents is the following:
     ;;      bit 0 1 2 = binary vector indicating the number of 
     ;;                  highest priority unmasked bit set in the 
     ;;                  interupt request register. valid only
     ;;                  when bit 7 in the status register = 0.
     ;;      bit 3     = set interupt controler armed.
     ;;                  not set interupt controler disarmed.
     ;;      bit 4     = set interupt mode is polled.
     ;;                  not interupt mode is interupt.
     ;;      bit 5     = set priority mode is rotating.
     ;;                  not set priority mode is fixed.
     ;;      bit 6     = set input enabled.
     ;;                  not set input disabled.
     ;;      bit 7     = set not unmasked interupt in irr
     ;;                  not set at least one interupt in irr.
     ;;
g16: ;; entry
b. f0 w.
     ls  w2    3      ; shift device control address 3 left
                      ; so it fits into charakter device base word.
     lo. w2    f0.    ; mask device base word into device control address.
g17: ;; entry if device control address already is complete.
     di  w0 x2+8      ; read status register from interupt controler.
     jl     x3        ; return from subroutine.

f0: 1<23+0<3+2.100    ; charakter device base.
e.   ;; end of read interupt controler status.
     ;; ++++++++++++++++++++++++++++++++++++++
▶EOF◀