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Names: »kkmonret3«
└─⟦667bb35d6⟧ Bits:30007480 RC8000 Dump tape fra HCØ.
└─⟦4334b4c0b⟧
└─⟦b8ddea98b⟧ »kkmon3filer«
└─⟦this⟧
(
message monchange release 7.0 to 7.13
clear temp mondef moncentral monprocs mondisc monfpaline monhost monfpasub,
montabinit monprocfnc1 monprocfnc2 mons1 mons2 moncatinit,
mdef mcentral mprocs mdisc mfpaline mhost mfpasub,
mtabinit mprocfnc1 mprocfnc2 ms1 ms2 mcatinit
contract entry.kkmon3filer mondef moncentral monprocs mondisc monfpaline,
monhost monfpasub montabinit monprocfnc1 monprocfnc2 mons1 mons2 moncatinit
skip 36.1
c=copy mess.no 1
mdef=set 1 disc3
mdef=edit mondef
skip 36.1
c=copy mess.no 1
mcentral=set 1 disc3
mcentral=edit moncentral
skip 36.1
c=copy mess.no 1
mprocs=set 1 disc3
mprocs=edit monprocs
skip 36.1
c=copy mess.no 1
mdisc=assign mondisc
skip 36.1
c=copy mess.no 1
mfpaline=assign monfpaline
skip 36.1
c=copy mess.no 1
mhost=assign monhost
skip 36.1
c=copy mess.no 1
mfpasub=assign monfpasub
skip 36.1
c=copy mess.no 1
mtabinit=set 1 disc3
mtabinit=edit montabinit
skip 36.1
c=copy mess.no 1
mprocfnc1=assign monprocfnc1
skip 36.1
c=copy mess.no 1
mprocfnc2=set 1 disc3
mprocfnc2=edit monprocfnc2
skip 36.1
c=copy mess.no 1
ms1=assign mons1
skip 36.1
c=copy mess.no 1
ms2=assign mons2
skip 36.1
c=copy mess.no 1
mcatinit=assign moncatinit
head cpu
finisb
end)
$def
;********************
l./a48=-4/,i/
a200= -14 ; first of internal process description
a194= -14 ; process descr addr(other comp) if type>2
a192= -12 ; process type 0 useal internal process
; 2 master process (this computer)
; 3 master mirror process
; 5 mirror process
a190= -10 ; process description addr of master process
a188= -8,a189= -7 ; computer number<12 + internal claim (other computer)
a186= -6, a187= -5 ; cpu running mask,allowed cpu mask
/,l./-a48/,r/a48/a200/,l./a48=first/,g 2/a48/a200/,
l./a104=/,l1,i/
a94 = 2.11111000 ; waiting for external interrupt
/,l./a139=-2/,i/
a158=-10 ; message buffer addr (other computer) or result
a156=-8 ; reciever <12 + sender (computer numbers)
a155=-6 ; process descr addr receiver (other computer)
a154=-4 ; process descr addr sender (other computer)
/,l./a6=/,r/a139/a158/,
f
$central
;********************
l./,f20,e/,r/f20/f23/,r/e62/e63/,
l./b76:/,l1,i/
b39: b39 ; queue head: dma transfer
b39 ;
/,l./b26=b5/,l1,i/
0,r.(:66<1 -k +2:) > 1 ;
b56: 0,r.a350 ; current process (cpu(i)) i=1,...,last cpu
/,l./c0:/,r/c0:/c0:
jl w3 d35 ; stop cpu(i), i=1, ,last cpu;
/,l./c99:/,l1,i/
jl w3 d36 ; start cpu(i), i=1,...,last cpu;
/,l./h0:/,l1,i/
h1: d140 ; addr(dump core procedure)
/,l1,l./d140/,r/d140./(h1) /,r/./ /,r/);/) ;/,
l1,i/
jl w3 d37 ; init cpu1
/,l./c50:/,r/:/: jl w3 d35 ; stop(i), i=1,2,3,...,last cpu
/,l./d104:/,l2,r/ /d114:/,
l./d10:/,l./i3:/,l./(x1-a16+a301)/,r/x1-a16+a301/i6/,l./i5:/,l2,i/
i6: a249+1 ; max number for priority except for a dummy process
/,l./e./,l1,i/
; bitpatterns:
g48: 3 ; constant 3 (= number of chars per word)
g50: 8.7777 7776 ; first 23 bits
g51: 8.7777 0000 ; first 12 bits
g52: 8.0000 7777 ; last 12 bits
g53: 8.0000 0377 ; last 8 bits
g49: 1<23 ; bit 0
g62: 1<18 ; bit 5
g65: 8.3777 7777 ; last 23 bits
g63: 1 ; bit 23
/,l./b52:/,l./comment:the/,
l./g34:/,l./i0/,r/s /s./,r/0 /0./,
l./i0)/,r/l /l./,r/) /.)/,l1,l./i0)/,r/l /l./,r/) /.)/,
l1,r/l /l./,r/0 /0./,
l./d74:/,r/s /s./,r/i3 /i3./,
l./i3)/,r/l /l./,r/3) /3.)/,l./;bit/,d./g63:/,i/
d35: jl. (2),d25 ;
d36: jl. (2),d26 ;
d37: jl. (2),d27 ;
b55: 0 ; interrupt addr for cpu1
b57: 0 ; cur proc(cpu0) (when b1 is cur proc(cpu1))
b58: 0 ; relative addr of curr proc at cpu1
f23: 1<23 +20 < 3 + 0 ; device addr for device 20 (cpu1)
b9: 0 ; only used for testoutput
b105: 0 ; master process description addr
b106: 0 ; proc descr addr(hcrhcom)
b109: 0 ; computer number (this computer)
/,f
$procs
;********************
l./b16:/,l./;30:(type/,d2,i/
e15 ; 30: set cpu mask (or lookup cpu mask) 'cpumask'
e16 ; 32: select or remove master process 'systemaddr'
e17 ; 34: move-buff 'sendfurther'
/,l./e62;124/,l1,i/
e63 ; 126 : wait external interrupt
/,l./d15:/,l./x1+a250/,l1,i/
rl w3 x1+a192 ; process type
sl w3 3 ; if mirror proc then
rl w1 x1+a190 ; calling proc:=master proc
/,l./d16:/,l./x1+a250/,l1,i/
rl w0 x1+a192 ; process type
sl w0 3 ; if mirror proc then
rl w1 x1+a190 ; calling proc:=master proc
/,l./e0:/,l-20,l./i40:/,l./e./,l1,i/
;
; procedure test other computers
; if current proces has performed a call of
; create internal process (other computers)
; start internal process (other computers)
; stop internal process (other computers)
; modify internal process (other computers)
; remove internal process (other computers or own computer)
; then there is selected and initialized a message buffer
;
; - 10 0
; - 8 -1
- 6 0
; - 4 -1
; - 2 0
; buf + 0 next buf
; + 2 prev buff
; + 4 receiver (=master process)
; + 6 sender (=calling process)
; + 8 1<22 + monitor procedure number (56,58,60,62 or 64)
; +10 saved w0 (from calling process)
; +12 - w1 -
; +14 - w2 -
; +16 - w3 -
;
; and the buffer is linked to the master process (this computer)
;
; call w2=curr+a16 w3 =return
; return: w2 is unchanged
;
b. h10,i10 w.
;
d40:
rl w1 b105 ; w1:= master
sn w1 0 ; if master not present then
jl x3 ; return
sn w1 x2-a16 ; if calling proc =master proc then
jl x3 ; return
rl w1 x2-a16+a33; w1:=ic.cur
bz w1 x1-1 ; w1:= monitor procedure number
sh w1 64 ; if munber > 64 or
sh w1 55 ; number <56 then
jl x3 ; return
rs. w1 h1. ; save monitor procedure number
ds. w3 h3. ; save(w2,w3)
sn w1 64 ; if remove process then
jl. i2. ; goto set up buff
se w1 56 ; if not create internal process then
jl. i0. ; goto search name
rl w1 x2-a16+a29; w1:=saved w1
rl w1 x1+8 ; w1:=mode
sl w1 0 ; if mode>0 then
jl x3 ; return
jl. i2. ; else goto select buff
i0: rl w2 x2-a16+a31; w2:=saved w3
jl w3 d11 ; search name
jl. i5. ; if not found then return
rl w3 x3 ; else w3:=proc
rl w0 x3 ; w0:=kind
se w0 0 ; if not internal proc then
jl. i5. ; return
rl w0 x3+a192 ; w0:=proc type
sh w0 2 ; if not mirror process then
jl. i5. ; return
i2: rl w1 b105 ; w1:=master proc
bz w0 x1+a19 ;
bs. w0 1 ; decrease buffer claim
hs w0 x1+a19 ;
rl w2 (b8) ; w2:=next buff
al w0 0 ; set up message buff
rs w0 x2+a158 ;
rs w0 x2+a139 ; buf - 2 :=0
al w0 -1 ;
rs w0 x2+a156 ; - 6 :=-1
rs w0 x2+a154 ; - 4 :=-1
rl. w3 h2. ;
al w3 x3-a16 ;
rs w3 x2+a142 ; + 6 :=sender
rl. w0 h0. ;
wa. w0 h1. ;
rs w0 x2+a145 ; + 8 := 1<22 + monitor procedure no
dl w1 x3+a29 ; +10 := w0.sender
ds w1 x2+a145+4 ; +12 := w1.sender
dl w1 x3+a31 ; +14 := w2.sender
ds w1 x2+a145+8 ; +16 := w3.sender
jl w3 d5 ; remove buf
al w3 c99 ;
jl. d16. ; deliver message and goto interrupt return
i5: dl. w3 h3. ;
jl x3 ; return
h0: 1<22
h1: 0
h2: 0
h3: 0
e.
/,l./e10:/,l-1,r/i8/i20/,l./e11:/,l./jl.d15./,d-1,i/
rl w0 x2+a158 ; w0:=result;
sh w0 0 ; if result = monitor result then
jl. i15. ;
rl w1 x2+a142 ; w1:=sender
ds. w1 i11. ; save switch,sender
ld w0 -100 ;
ds w0 x2+a156 ; clear buff(other comp),receiver-sender,
rs w0 x2+a154 ; proc descr addr
dl w0 x2+12 ; move saved w0-w1 to
ds w0 x1+a29 ; sender
dl w0 x2+16 ; move saved w2-w3 to
ds w0 x1+a31 ; sender
jl w3 d106 ; remove buff
dl. w1 i11. ; restore switch,sender
am (0) ; case switch of
jl. 2 ;
i12: jl. i12. ; not possible
jl. i13. ;
jl. i14. ;
jl. i15. ;
i13: rl w1 (b6) ;
jl. e1. ;
i14: jl. e57. ; link cur to procfunc
i15: al w3 c99 ; deliver message
jl. d15. ; and return interrupt
i10: 0
i11: 0
/,l./e57:/,l./rlw1(b6)/,i/
jl. w3 d40. ; check mirror process
/,l./e35:/,l./jlr3/,l1,i/
rl w3 x2+4 ; w3:=sender
rl w0 x3+a192 ;
sl w0 3 ; if sender is a mirror process then
jl. i14. ; goto moveoto master
/,l./i3./,l1,i/
; w1 = cur
; w2 = buf
; w3 = sender
i14: ; move buf to master
rl w3 x3+190 ; w3:=master
rl w0 x3+a19 ;
bs. w0 1 ;
rs w0 x3+a19 ; decrese bufferclaim.master
al w0 x3 ; save master
jl w3 d5 ; remove buf
bz w3 x1+a19 ;
al w3 x3+1 ; increase bufferclaim.cur
hs w3 x1+a19 ;
rl w1 0 ; w1:=master
al w1 x1+a15 ;
jl w3 d6 ; link buf
al w1 x1-a15 ;
am b1 ;
rl w0 a29 ; w0:=first addr
rl w3 b109 ; w3:=computer number
ds w3 x2+a153+2 ;
rl w0 x1+a13 ; w0:=state
so w0 2.11001111; if waiting for event og for interrupt then
jl w3 d10 ; link proc and
jl c99 ; and return
/,l./e47:/,l-6,i/
; set cpu mask
; saved w0 new cpu mask result=if new cpu mask=0 then old cpu mask else
; new cpu mask
; saved w1
; saved w2
; saved w3
b. w.
e15: rl w2 x1+a28 ; w2:=new cpu mask
se w2 0 ; if new cpu mask<>0 then
hs w2 x1+a187 ; set new cpu mask
bz w2 x1+a187 ; load result
rs w2 x1+a28 ;
jl c99 ; return
e.
;
; procedure select or remove master proc
; saved w0=0 for remove
; 2 for select
; 4 for select hcrhcom process addr
; (4 for set systrm addr)
; (6 for set sysrec addr)
; (8 for set sysdma addr)
; saved w3= proc addr (in the 3 last cases)
b. i5 w.
e16: rl w2 x1+a28 ; w2:=saved w0
sl w2 3 ; if set proc addr then
jl. i0. ; goto i0
rs w2 x1+a192 ; select or remove master
se w2 0 ; if select then
al w2 x1 ; set current master
rs w2 b105 ; else remove current master
jl c99 ; return interrupt
i0: rl w0 x1+a31 ; saved w3
rs w0 b106 ; set proc addr
jl c99 ; return interrupt
e.
;
; procedure move buff(sender,receiver);
; saved w0 return: =0 buffer claim execeeded (receiver)
; =1 buffer moved
; saved w1
; saved w2 buf
; saved w3 receiver
;
b. h5,i5 w.
e17: jl w3 d101 ; check and search name
jl r3 ; if process do not exist then result 3
rs. w3 h0. ; save receiver
jl w3 d12 ; check buf
rl. w3 (h0.) ; w3:=receiver
rl w0 x3+a19 ;
sh w0 0 ;
jl. i0. ;
bs. w0 1 ;
rs w0 x3+a19 ;
jl w3 d5 ; remove buf
al w0 1 ;
rs w0 x1+a28 ; set result
ba w0 x1+a19 ; increase buffer claim(sender)
hs w0 x1+a19 ;
rl. w1 (h0.) ; w1:=reciever
al w1 x1+a15 ;
jl w3 d6 ; link buf
al w1 x1-a15 ;
rl w0 x1+a13 ; w0:=state
so w0 2.11001111; if waiting for event og for interrupt then
jl w3 d10 ; link proc and
jl c99 ; return from interrupt
i0: al w0 0 ;
hs w0 x3+a28 ; set result
jl c99 ; and return
h0: 0
e.
/,l./e50:/,l./i55:/,l./end of start i/,l1,i?
;
;
; procedure wait exeternal interrupt
; delay the calling process until an external interrupt or a timeout
; occours on the specified device
;
; saved w0
; saved w1
; saved w2 wait buffer address
; saved w3
;
b. w.
e63:
rl w2 x1+a30 ; saved w2
al w1 b39 ; head of wait buffer quque
jl w3 d6 ; link(head,buff)
al w0 a94 ; set state
jl d114 ; remove proc
e.
;
;
;
m. start of cpu(i) service
;
;
; the following procedures are all used to service other cpu's
; than the commen cpu (cpu0)
b. i20,h20 w.
; data-out instruction at cpu(i);
;
; interrupt cpu1 1<23 + 20<3 + 0<1
; reset cpu1 1<23 + 20<3 + 1<1
; stop cpu1 1<23 + 20<3 + 2<1
; start cpu1 1<23 + 20<3 + 3<1
;
; call: w2=relative addr of cpu(i), w1=return
; return: w2,w3 are unchanged, w0 are changed
; if cpu(i) is started then w1<h9 else w1=h9
h9=2
d21: am 3<1 ; start cpu(i)
d22: am -2<1 ; interrupt cpu(i)
d20: al w0 2<1 ; stop cpu(i)
wa w0 x2+f23 ; interrupt address(cpu(i))
rs. w1 h1. ;
ds. w3 h3. ;
al w1 0 ; do_count:=0;
i0: do w3 (0) ; data_out(cpu(i))
sx 2.111 ; if buserror then
jl. i2. ; goto count;
i1: dl. w3 h3. ;
jl. (h1.) ; return;
i2: al w1 x1+1 ; do_count:=do_count+1;
se w1 h9 ; if do_count<h9 then
jl. i0. ; goto repeat data_out instruction else
ls w2 -1 ; set cpu(x2) as not able to use;
al w3 2.10 ; w3=mask for cpu(1)
ls w3 x2 ; w3=2**(x2//2) ; mask for cpu(i)
ac w3 x3+1 ;
la. w3 b59. ; remove bit for cpu(i)
rs. w3 b59. ;
jl. i1. ; return
h1: 0
h2: 0
h3: 0
b59: 2.000 000 000 011 ; mask for cpu's in use
b51: 0,r.a350 ; b51+2*i = 0 cpu(i) is not initialisized
; = 1 a interrupt is send to cpu0, but
; not recieved.
; (special meaning at init cpu(i))
; = 2 cpu(i) is ready for start
; = 4 cpu(i) is running or stopped
; without reg. dump
;
h13: 0,r.a350 ; last started proc at cpu(i)
;
;
; stop cpu(i) i=1,...,last cpu
; call: w3=return
; return: all reg unchanged
d25: ds. w1 h5. ;
ds. w3 h7. ;
al w2 -2 ;
i5: al w2 x2+2 ; next cpu
sl w2 a351+1 ; if all cpu's is stopped then
jl. i6. ; return
rl w1 x2+b56 ;
sn w1 0 ; if no proc then
jl. i5. ; goto next proc
al w0 0 ;
hs w0 x1+a186 ; clear cpu running mask
jl. w1 d20. ; stop cpu(i)
jl. i5. ; next cpu;
i6: dl. w1 h5. ;
dl. w3 h7. ;
jl x3 ; return
; start cpu(i) i=1,...,last cpu
; call: w1=curr int proc at cpu0 before interrupt, w3=return
; return: all reg. are changed
d26: rs. w3 h7. ;
rl w0 b57 ; w0:=cur proc(cpu0)
sl w0 1 ; if current proc at cpu0 is not restored then
rs w0 b1 ; restore cur proc(cpu0)
al w2 -2 ;
rs w2 b57 ; no proc to restore before a new interrupt at cpu(i)
al w3 1 ; w3:=mask(cpu0);
i10: ls w3 1 ; w3:=mask(next cpu);
al w2 x2+2 ; w2:=addr(next cpu);
sl w2 a351+1 ; if all cpu is started then
jl. i13. ; goto test first proc
al w0 a353 ; w0:=mask for allowed cpu;
rl. w1 b59. ; w1:=mask for cpu in use;
sz w1 x3 ; if the cpu can not be used or
so w0 x3 ; the cpu is not allowed then
jl. i10. ; goto next cpu else
rl. w0 x2+b51. ;
sh w0 1 ; if cpu(x2) is waiting for cpu0-interrupt then
jl. i10. ; goto next cpu
al w1 b2 ; w1:=chain head
i11: rl w1 x1 ; w1:=next proc in time slice queue;
al w0 x1-a16 ; process addr
rs w0 x2+b56 ;
rl w0 x1-a16+a186; w0:=mask for allowed cpu;
sh w0 2047 ; if cpu(x2) is started or
so w0 x3 ; this cpu can not be used then
jl. i11. ; goto next proc;
jl. w1 d21. ; start cpu(x2) with the old proc
sl w1 h9 ; if the cpu can not be started then
jl. i10. ; goto next cpu
i12: rl w1 x2+b56 ; else
hs w3 x1+a186 ; set cpu running mask;
rx. w1 x2+h13. ; w1:=last started proc at cpu(i)
rl. w0 x2+b51. ;
se w0 4 ; if cpu(i) already is interrupted then
jl. i14. ; goto set start start signal
se. w1 (x2+h13.) ; if last started <> new proc then
jl. w1 d22. ; start new proc at cpu(x2)
i14: al w0 4 ;
rs. w0 x2+b51. ; set start signal
jl. i10. ; goto next cpu
i13: al w2 b2 ;
i16: rl w2 x2 ; w2:= next proc
rl w0 x2-a16+a186; w0:=cpu-mask
so w0 2.1 ; if cpu0 is not allowed then
jl. i16. ; goto next proc else
sl w0 2047 ; if proc is started then
jl. i16. ; goto next proc else
sn w2 (b2) ; if proc already is in front then
jl. (h7.) ; return
jl w3 d5 ; else remove proc
rl w1 b2 ; and
jl w3 d6 ; link proc in front
jl. (h7.) ; return
; init cpu1
d27: rs. w3 h7. ;
rl w3 b65 ; w3:=base of controller descr table;
al. w1 c26. ; w1:=power up entry for cpu1;
rs w1 x3+20<3+a310;
al w2 0 ; select cpu1
jl. w1 d22. ; start cpu(i)
sl w1 h9 ; if cpu1 is not ready then
jl. i17. ; return
i15: rl. w0 b51. ; wait for ready signal
sh w0 0 ; from cpu1
jl. i15. ;
al w0 2 ;
rs. w0 b51.+0;
jl. w1 d20. ; stop cpu1
i17: jl. (h7.) ;
h4: 0
h5: 0
h6: 0
h7: 0
e.
;
b. h10,i10 w.
c15: ; interrupt at cpu1
al w1 0 ;
rx w1 b56 ; w1:=current process cpu1
rx w1 b1 ; b1:=current process cpu1
rs w1 b57 ; save(current process)
al w1 2 ;
rs. w1 b51.+0 ; set after intterupt
dl. w2 h7. ; w1:=top reg dump; w2:= 2*interrupt number
jl (b55) ; goto interrupt service for cpu1-process
0 ; w1 = top reg. dump
h7: 0 ; w2 = 2*interrupt number
;
c26: al. w3 h0. ;#1 init cpu1
gp w3 b91 ;#1 set inf register addr;
rl w3 b65 ;#1 base of controller descr addr
al. w1 c27. ;#1
rs w1 x3+20<3+a310;#1 set start addr
ri a179 ;#1 return interrupt;
c27: ;#1
al w3 1 ;#1
rs. w3 b51.+0 ;#1
h8:
rl. w2 b51.+0 ;#1
se w2 4 ;#1 if cpu0 is not ready then
jl. h8. ;#1 goto test and wait else
c28: gg w1 b91 ;#1 w1:=inf reg(cpu1)
rl w2 b56 ;#1 w2:=proc addr(cpu1)
dl w0 x2+a170 ;#1 set user exception addr and
ds w0 x1+a325+a328;#1 user escape addr
al w0 x2+a28 ;#1
rs w0 x1+a325+a326;#1 set register dump addr;
ri a179 ;#1 return interrupt;
;#1 system table: monitor mode
0 ; -5 monitor call service addr
h6 ; -3 interrupt service addr
1<23+0 ; -1 status interrupt limit
h0=k-13
h1=k-1 ; inf addr: monitor mode
h2=k+11 ; inf addr: user mode
h3 ; +1 register dump addr
0 ; +3 exception service addr
0 ; +5 escape service addr
;#1 system table: user mode
h4 ; -5 monitor call service addr
h5 ; -3 interrupt - -
1<23 + 6 ; -1 status < 12 + interrupt limit
0 ; +1 register dump addr
0 ; +3 exception service addr
0 ; +5 escape service addr
;#1 monitor register dump addr
h3: 0 ; w0
0 ; w1
0 ; w2
0 ; w3
1<23 ; status monitor mode
c27 ; ic start cpu1 process
0 ; cause
0 ; sb
0 ; cpa
0 ; base
8 ; lower write limit
8.3777 7777 ; upper write limit
0<12 + 6 ; interrupt limits
;#1 interrupt service cpu1
;#1 interrupt level = 14 timer interrupt (or interrupt from cpu0)
;#1 = 16 channel input finis
;#1 = 18 channel input start
;#1 = 20 channel output finis
;#1 = 22 character device interrupt
;#1
;#1
h4: am c0-c1 ;#1 internal interrupt w3:=monitor call service addr
;#1 external interrupt
h5: am c1-c8 ;#1 w3:=interrupt service addr (level 1)
h6: al w3 c8 ;#1 w3:=interrupt service addr (level 2)
ds. w2 h7. ;#1 save (w1,w2)
sn w3 c0 ;#1 if internal interrupt then
jl. i6. ;#1 goto i6
sn w2 14 ;#1 if cpu(i) is interrupted from cpu0 then
jl. h8. ;#1 goto start
sl w2 14 ;#1 if interruptlevel > 7 then
jl. c20. ;#1 go interruptservice for other computers
i6:
rs w3 b55 ;#1 set interrupt service addr
al w0 1 ;#1
rs. w0 b51.+0 ;#1
rl w1 b56 ;#1 adrr of curr.cpu1
al w0 0 ;#1
hs w0 x1+a186 ;#1 clear cpu user bit
am -3<3 ;#1 level20
i8: al w3 23<3 ;#1 level23
wa w3 b65 ;#1 base of controller table
i7: rl w1 x3+a313 ;#1 w1:=interrupt level
do w1 (x3+a312) ;#1 interrupt(cpu0)
sx 2.111 ;#1 if buserror then
jl. i7. ;#1 repeat data out;
jl. c27. ;#1 goto wait for interrupt
; interrupt service for interrupt caused of data out instructions on
; other computers (HC8000's)
;
; do wreg addr
; wa 1<23+level<3+ 2.001 send data transfer request
; wa>= 0 contents irr
; request to send data specified by level location
; wa =1<23 + message
;
;
;
; di wreg addr
; wb 1<23+level<3+ 2.001 start input
; wb >=0 input to addr specified in level location
; wb = 1<23 + message
;
; level location (8) + level < 3
; *----------*----------*----------*----------*
; ! number of! input or ! interrupt! !
; ! bytes to ! output ! address ! level !
; ! transfer ! address ! ! !
; *----------*----------*----------*----------*
;
c20:
; interrupt 16 channel input finis
; interrupt 18 channnel input start (input request)
; interrupt 20 channel output finis
; interrupt 22 character device interrupt
rl w1 b106 ; w1:=addr(hcrhcom)
sn w1 0 ; if no proc then
jl. c28. ; ri(cpu1)
bz w0 x1+a13 ; w0:=state
se w0 a94 ; if the proc is waiting for external interrupt or
sn w0 a104 ; waiting for event then
jl. i9. ; goto start proc
jl. c28. ; else goto ri(cpu1)
i9: rs w2 x1+a28 ; saved w0:=interrupt level
jl. i8. ; goto interrupt cpu0
;
;
;
c21: ; interrupt received at cpu(0) level23
al w0 a95 ; state running
al w3 c99 ; insert proc and return to start
jl d10 ;
e.
m. end of service for cpu(i)
?,l./b087:/,l1,i/
jl. 0 ; wait forever
c.-1
/,l./b.e10/,i/
z.
/,
f
$disc
;********************
$fpaline
;********************
$host
;********************
$fpasub
;********************
$tabinit
;********************
l./f5=k/,i/
2.000 000 000 001 ; cpu mask: only cpu(0) allowed
0,r.(:a16-a48:)>1
/,l./b2,b2/,r/b2,b2/f22,b2/,
l./h2=k/,l1,i/
m. dummy internal process(cpu1):
2.000 000 000 010 ; cpu mask: only cpu(1) allowed
0,r.(:a16-a48:)>1
f22=k
f21=k-a16 ; start of dummy process(cpu1)
b2, f5+a16 ; timer q links: initially single in queue
r.(:a17-a16-2:)>1
f21-6, h12 ; first, top of process
r.(:a19-a18:)>1
0<12+0 ; claims
0<12+0 ;
r.(:a301-a21:)>1
1<23 - 2 ; priority = almost greatest integer
r.(:a27-a301:)>1
h11 ; interrupt address
r.(:a170-a27:)>1
h11 ; escape address
0 ; all params
r.(:a28-a171:)>1
c. -1 ; must be used later
rl w3 132 ; dummy loop
rs w3 x3 ;
jl 0 ;
0 ; w3
z.
0,0,0,0
r.(:a32-a31:)>1
1<23 ; status
r.(:a33-a32:)>1
h13 ; ic
r.(:a181-a33:)>1
8 ; cpa
0 ; base
8 ; lower write limit
8388607 ; upper write limit
b54 ;+0<12 ; interrupt levels
r.(:a302-a185:)>1
0 ; save area address
r.(:a303-a302:)>1 ; (fill up for save area, used during upstart)
m. dummy internal reg dump(cpu1)
b. i9 w.
h11: ; register dump
0,r.a180>1 ;
h13:
rl. w1 f21.-2
al w1 x1+2
rs. w1 f21.-2 ;
rl w1 112 ; last sensed clock value
rs. w1 f21.+6 ;
jl. h13. ;
e.
w.
h12=k ; top addr of dummy proc(cpu1)
b. i10 w.
d29:
ds. w1 i1. ;
ds. w3 i3. ;
rl w0 100
sn w0 0
jl. i6.
rl. w0 i0. ;
am. (i5.)
ds w1 2
am. (i5.)
ds w3 6
rl. w3 i5. ;
al w3 x3+8
rl w2 b6 ; first proc
rl w1 x2 ;
i4: rl w0 x1+a16 ;
ds w1 x3+2 ;
rl w0 x1+a13;
rs w0 x3+4
rl w0 x1+a176;
rs w0 x3+6 ;
al w3 x3+8
i8: al w2 x2+2 ; next proc
sl w2 (b7)
jl. i7.
rl w1 x2
rl w0 x1+2
se w0 0
jl. i4.
jl. i8.
i7: rs. w3 i5.
rs w3 1198
i6: dl. w1 i1.
dl. w3 i3.
jl x3
i0:0,i1:0,i2:0,i3:0
i5: 256<10 ; clear core start
e.
c. -1
rx. w0 i7. ; save return
rs. w3 i1. ;
i3: se. w0 (i2.) ; if procedure is in use then
jl. i3. ; wait
rx. w0 i7. ;
rs. w3 i1. ; else start
jl. i4. ; goto start
d28: rx. w0 i8. ;
rs. w3 i2. ;
i6: se. w0 (i1.) ;
jl. i6. ;
rx. w0 i8. ;
rs. w3 i2. ;
i4: am. (i0.) ;
ds w1 2 ;
am. (i0.) ;
ds w3 6 ; save(w0,w1,w2,w3)
al w1 8 ;
i5: dl w0 x1+2 ;
am. (i0.) ;
ds w0 x1+2 ;
al w1 x1+4 ;
sh w1 199 ;
jl. i5. ;
wa. w1 i0. ;
rs. w1 i0. ;
ld w3 -100 ;
ds. w3 i2. ;
dl w3 x1-194 ;
dl w1 x1-198 ;
jl x3 ; return
i0: 38000 ;
i1: 0
i2: 0
i7:0
i8:0
e.
z.
/,l./segment5:i/,l./g5:/,l1,i/
rs. w2 g17. ;
al w2 a352 ;
rs w2 x3+a186 ; set cpu mask;
rl. w2 g17. ;
/,l./g8:/,l-2,i/
rl. w2 g18.,rs w2 b9; only for test
/,l./g13:/,l1,i/
g17: 0 ; name table entry
g18: d29
/,
l./g10:/,l./b2+2/,r/f5+a16 /f21+a16/,
f
$procfnc1
;********************
$procfnc2
;********************
l./m151:/,l./a27/,d,i/
al w1 x2+a200 ; index:=first of internal proc
/,l./a4-4/,r/-4;/+a200;/,i/
sn w1 x2 ; if index = internal.kind then
al w1 x2+a27 ; index:=internal.interrupt_addr
/,l./d1./,i/
al w0 1 ;
rs w0 x2+a186 ; allowed cpu := cpu0
/,l./a4-4/,r/-4 /+a200/,
f
$s1
;********************
$s2
;********************
$catinit
;********************
▶EOF◀