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Presents historical artifacts from the history of:

Rational R1000/400 DFS Tapes

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artifacts from Datamuseum.dk's BitArchive.

See our Wiki for more about Rational R1000/400 DFS Tapes

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⟦3c7b80cdb⟧ ERRMESS, TextFile

    Length: 5120 (0x1400)
    Types: ERRMESS, TextFile
    Names: »P2IOC.ERRMESS«

Derivation

└─⟦b4205821b⟧ Bits:30000743 8mm tape, Rational 1000, DFS, D_12_7_3 SEQ288
    └─ ⟦this⟧ »P2IOC.ERRMESS« 
└─⟦b434774df⟧ Bits:30000528 8mm tape, Rational 1000, DFS, D_12_6_5
    └─ ⟦this⟧ »P2IOC.ERRMESS« 
└─⟦bc1274df5⟧ Bits:30000750 8mm tape, Rational 1000, DFS backup from PAM's R1000
    └─ ⟦this⟧ »P2IOC.ERRMESS« 

TextFile

0	No errors were found during Phase II testing of the IOC board.
1	The IOC WCS data bits do not function properly.
2	The IOC WCS address bits do not function properly.
3	The IOC WCS ram bits do not function properly.
4	The IOC trace data bits do not function properly.
5	The IOC trace address bits do not function properly.
6	The IOC trace ram bits do not function properly.
7	The IOC address bus enable wires are incorrect when the FIU board is
	supposed to drive the address bus.
8	The IOC address bus enable wires are incorrect when the VAL board is
	supposed to drive the address bus.
9	The IOC address bus enable wires are incorrect when the TYP board is
	supposed to drive the address bus.
10	The IOC address bus enable wires are incorrect when the SEQ board is
	supposed to drive the address bus.
11	The IOC FIU bus enable wires are incorrect when the FIU board is
	supposed to drive the FIU bus.
12	The IOC FIU bus enable wires are incorrect when the VAL board is
	supposed to drive the FIU bus.
13	The IOC FIU bus enable wires are incorrect when the TYP board is
	supposed to drive the FIU bus.
14	The IOC FIU bus enable wires are incorrect when the SEQ board is
	supposed to drive the FIU bus.
15	The IOC type and value bus enable wires are incorrect when the
	encoded value is TYP drive TYP and VAL drive VAL. (encoding => 0)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
16	The IOC type and value bus enable wires are incorrect when the
	encoded value is TYP drive TYP and FIU drive VAL. (encoding => 1)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
17	The IOC type and value bus enable wires are incorrect when the
	encoded value is FIU drive TYP and VAL drive VAL. (encoding => 2)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
18	The IOC type and value bus enable wires are incorrect when the
	encoded value is FIU drive TYP and FIU drive VAL. (encoding => 3)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
19	The IOC type and value bus enable wires are incorrect when the
	encoded value is IOC drive TYP and IOC drive VAL. (encoding => 4)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
20	The IOC type and value bus enable wires are incorrect when the
	encoded value is SEQ drive TYP and SEQ drive VAL. (encoding => 5)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
21	The IOC type and value bus enable wires are incorrect when the
	encoded value specifies no board is to drive either bus. (spare 6)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
22	The IOC type and value bus enable wires are incorrect when the
	encoded value specifies no board is to drive either bus. (spare 7)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
23	The IOC type and value bus enable wires are incorrect when the
	encoded value is TYP drive TYP and MEM drive VAL. (encoding => 8)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
24	The IOC type and value bus enable wires are incorrect when the
	encoded value is TYP drive TYP and MEM drive VAL. (encoding => 9)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
25	The IOC type and value bus enable wires are incorrect when the
	encoded value is FIU drive TYP and MEM drive VAL. (encoding => A)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
26	The IOC type and value bus enable wires are incorrect when the
	encoded value is FIU drive TYP and MEM drive VAL. (encoding => B)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
27	The IOC type and value bus enable wires are incorrect when the
	encoded value is RDR drive TYP and RDR drive VAL. (encoding => C)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
28	The IOC type and value bus enable wires are incorrect when the
	encoded value is RDR drive TYP and RDR drive VAL. (encoding => D)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
29	The IOC type and value bus enable wires are incorrect when the
	encoded value is RDR drive TYP and RDR drive VAL. (encoding => E)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
30	The IOC type and value bus enable wires are incorrect when the
	encoded value is RDR drive TYP and RDR drive VAL. (encoding => F)
	DUMMY_EN is %1%.  CSA_HIT is %2%.
31	The IOC boards timers can not be loaded or read correctly.
32	The R1000s interface to IOP memory does not work.
33	The IOCs memory ECC logic is not functioning properly.
34	The IOCs checkbit data path does not work.
35	The MULTIBIT_ERROR condition does not work.
36	The IOCs syndrome transceiver does not work.
37	The SLICE timer macro event does not work.
38	The DELAY timer macro event does not work.
39	The IO macro event does not work.
40	The IOC EXIT micro event does not work.
41	The ECC micro event does not work.
42	The IOCs clockstop wire does not work.
43	IOC request queue data error.
44	IOC request queue addressing error.
45	IOC response queue data error.
46	IOC response queue addressing error.«nul»