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Length: 22528 (0x5800)
Types: Ada Source
Notes: 03_class, FILE, R1k_Segment, e3_tag, package body Bus, package body Init, seg_00f4d4
└─⟦8527c1e9b⟧ Bits:30000544 8mm tape, Rational 1000, Arrival backup of disks in PAM's R1000
└─⟦5a81ac88f⟧ »Space Info Vol 1«
└─⟦this⟧
with Z80_Defs;
with Z80;
with Memoire;
with Text_Io;
with Adresse;
with Mot;
with Octet;
with Z_Debug;
use Z_Debug;
package body Bus is
-- CONSTANTES -----------------------------------------------------------
Taille_Bloc_Mem : constant Positive := 2048;
Nb_De_Blocs : constant Natural := 32;
Nb_Periph_Max : constant Integer := 20;
-- TYPES -----------------------------------------------------------------
type T_It_Connectee is (Int, Nmi, Busrq, Rien);
type T_Descripteur_Periph is
record
Ad_Debut : Adresse.T_Adresse;
Ad_Fin : Adresse.T_Adresse;
Id_Periph : Integer;
It_Connectee : T_It_Connectee;
It_Demandee : Boolean;
end record;
type T_Mem is (Rien, Ram, Rom);
subtype Num_Bloc is Natural range 0 .. (Nb_De_Blocs - 1);
type T_Descripteur_Memoire is
record
Bloc_Physique : Num_Bloc := 0;
Type_De_Mem : T_Mem := Rien;
end record;
-- VARIABLES -------------------------------------------------------------
Adresse_Donnee : Adresse.T_Adresse;
Donnee : Octet.T_Octet;
Operation : Z80.T_Operation;
Descr_Memoire : array (Num_Bloc) of T_Descripteur_Memoire;
Descr_Periph : array (1 .. Nb_Periph_Max) of T_Descripteur_Periph;
La_Fin : Boolean := False;
-- PAQUETAGES ------------------------------------------------------------
package Init is
procedure Initialisation (Nom_De_Fichier : String);
end Init;
package body Init is separate;
-- PROCEDURES ------------------------------------------------------------
procedure Lecture_Donnee (Ad : Adresse.T_Adresse;
Un_Octet : in out Octet.T_Octet);
procedure Ecriture_Donnee (Ad : Adresse.T_Adresse; Donnee : Octet.T_Octet);
-- TACHES ----------------------------------------------------------------
task body T_Bus is
use Z80;
begin
while (not La_Fin) loop
select
---------------------------------
accept Reset do
Init.Initialisation ("Toto");
end Reset;
---------------------------------
or
accept Afficher do
[statement]
end Afficher;
---------------------------------
or
accept Acces_Octet (Quelle_Operation : T_Operation;
Ad : Adresse.T_Adresse;
Donnee : in out Octet.T_Octet) do
Operation := Quelle_Operation;
case Quelle_Operation is
when Fetch | Memory_Read =>
--Text_Io.Put_Line
-- ("debut acces_octet en lecture de bus");
-- Tache_Memoire.Acces_Octet
-- (Memoire.Lire, Ad, Donnee);
Lecture_Donnee (Ad, Donnee); -- MY
-- Text_Io.Put_Line
-- ("fin acces_octet en lecture de bus");
when Memory_Write =>
-- Text_Io.Put_Line
-- ("debut acces_octet en ecriture de bus");
-- Tache_Memoire.Acces_Octet
-- (Memoire.Ecrire, Ad, Donnee);
Ecriture_Donnee (Ad, Donnee); -- MY
-- Text_Io.Put_Line
-- ("fin acces_octet en ecriture de bus");
when Io_Read =>
[statement]
when Io_Write =>
[statement]
end case;
end Acces_Octet;
---------------------------------
or
accept Acces_Mot (Quelle_Operation : Z80.T_Operation;
Ad : Adresse.T_Adresse;
Donnee : in out Mot.T_Mot) do
Operation := Quelle_Operation;
case Quelle_Operation is
when Fetch | Memory_Read =>
Text_Io.Put_Line
("debut acces_mot en lecture de bus");
Tache_Memoire.Acces_Mot (Memoire.Lire, Ad, Donnee);
Text_Io.Put_Line
("fin acces_mot en lecture de bus");
when Memory_Write =>
Text_Io.Put_Line
("debut acces_mot en ecriture de bus");
Tache_Memoire.Acces_Mot
(Memoire.Ecrire, Ad, Donnee);
Text_Io.Put_Line
("fin acces_mot en ecriture de bus");
when Io_Read =>
[statement]
when Io_Write =>
[statement]
end case;
end Acces_Mot;
---------------------------------
or
accept Signal_Periph (Periph_Id : Integer;
Signal : Z80_Defs.Signaux_Periph) do
[statement]
end Signal_Periph;
---------------------------------
or
accept Signal_Z80 (Signal : Z80_Defs.Signaux_Z80) do
[statement]
end Signal_Z80;
---------------------------------
or
accept
Deposer_Vecteur_It (Vecteur : Octet.T_Octet) do
[statement]
end Deposer_Vecteur_It;
---------------------------------
or
accept Lire_Vecteur_It (Vecteur : in out Octet.T_Octet) do
[statement]
end Lire_Vecteur_It;
---------------------------------
or
accept Fin do
La_Fin := True;
end Fin;
end select;
end loop;
end T_Bus;
-- PROCEDURES ---------------------------------------------
-- PROCEDURES POUR LECTURE ECRITURE MEMOIRE ---------------
procedure Decode_Adresse (Ad : in out Adresse.T_Adresse; Mem : out T_Mem) is
Bloc_Log, Bloc_Phy : Num_Bloc := 0;
Offset : Adresse.T_Adresse := 0;
begin
Bloc_Log := Ad / Taille_Bloc_Mem;
Bloc_Phy := Descr_Memoire (Bloc_Log).Bloc_Physique;
Mem := Descr_Memoire (Bloc_Phy).Type_De_Mem;
Offset := Ad mod Taille_Bloc_Mem;
Ad := Bloc_Phy * Taille_Bloc_Mem + Offset;
end Decode_Adresse;
-----------------------------------------------------------
procedure Lecture_Donnee (Ad : Adresse.T_Adresse;
Un_Octet : in out Octet.T_Octet) is
Ad_Donnee : Adresse.T_Adresse := Ad;
Mem : T_Mem := Rien;
begin
Decode_Adresse (Ad_Donnee, Mem);
case Mem is
when Ram | Rom =>
Tache_Memoire.Acces_Octet (Memoire.Lire, Ad_Donnee, Un_Octet);
when Rien =>
Un_Octet := 255;
-- Lecture a un emplacement vide !!!!
Text_Io.Put_Line ("LECTURE A UN EMPLACEMENT NON DECLARE");
end case;
end Lecture_Donnee;
-----------------------------------------------------------
procedure Ecriture_Donnee (Ad : Adresse.T_Adresse;
Donnee : Octet.T_Octet) is
Un_Octet : Octet.T_Octet := Donnee;
Ad_Donnee : Adresse.T_Adresse := Ad;
Mem : T_Mem := Rien;
begin
Decode_Adresse (Ad_Donnee, Mem);
case Mem is
when Ram =>
Tache_Memoire.Acces_Octet (Memoire.Ecrire, Ad_Donnee, Un_Octet);
when Rom =>
-- Ecriture en ROM !!!
Text_Io.Put_Line (" ECRITURE EN ROM !!!!");
null;
when Rien =>
-- Ecriture a un emplacement vide !!!!
Text_Io.Put_Line ("ECRITURE A UN EMPLACEMENT VIDE");
null;
end case;
end Ecriture_Donnee;
end Bus;
nblk1=15
nid=6
hdr6=14
[0x00] rec0=2d rec1=00 rec2=01 rec3=032
[0x01] rec0=20 rec1=00 rec2=0a rec3=03a
[0x02] rec0=23 rec1=00 rec2=05 rec3=05c
[0x03] rec0=19 rec1=00 rec2=09 rec3=026
[0x04] rec0=11 rec1=00 rec2=08 rec3=050
[0x05] rec0=18 rec1=00 rec2=02 rec3=074
[0x06] rec0=20 rec1=00 rec2=0c rec3=008
[0x07] rec0=25 rec1=00 rec2=03 rec3=03c
[0x08] rec0=1d rec1=00 rec2=0b rec3=05c
[0x09] rec0=0a rec1=00 rec2=04 rec3=000
[0x0a] rec0=0a rec1=00 rec2=04 rec3=000
[0x0b] rec0=18 rec1=00 rec2=08 rec3=056
[0x0c] rec0=1a rec1=00 rec2=05 rec3=024
[0x0d] rec0=01 rec1=00 rec2=06 rec3=050
[0x0e] rec0=18 rec1=00 rec2=02 rec3=074
[0x0f] rec0=20 rec1=00 rec2=03 rec3=008
[0x10] rec0=27 rec1=00 rec2=0c rec3=038
[0x11] rec0=1e rec1=00 rec2=0b rec3=05c
[0x12] rec0=06 rec1=00 rec2=04 rec3=000
[0x13] rec0=00 rec1=00 rec2=00 rec3=000
[0x14] rec0=00 rec1=00 rec2=00 rec3=000
tail 0x2150b562a822b4fe40540 0x42a00088462060003
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