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⟦b61179e67⟧ Ada Source

    Length: 5120 (0x1400)
    Types: Ada Source
    Notes: 03_class, FILE, R1k_Segment, e3_tag, package V_I_Cifo, seg_04ce02

Derivation

└─⟦8527c1e9b⟧ Bits:30000544 8mm tape, Rational 1000, Arrival backup of disks in PAM's R1000
    └─ ⟦cfc2e13cd⟧ »Space Info Vol 2« 
        └─⟦this⟧ 

-- Copyright 1993 Verdix Corporation

------------------------------------------------------------------------------
-- Interface to the CIFO type definitions used by Ada tasking
------------------------------------------------------------------------------
with System;
use System;
with Unchecked_Conversion;
package V_I_Cifo is
    pragma Suppress (All_Checks);
    pragma Suppress (Exception_Tables);
    pragma Not_Elaborated;
    pragma Local_Access;

    -- Task entry or safe condition variable wait queuing
    type Queuing_T is (Unspecified_Queuing, Arbitrary_Queuing, Fifo_Queuing,
                       Priority_Queuing, Priority_Ceiling, Spinning);

    -- Do not change these values without also changing the compiler.
    for Queuing_T use (Unspecified_Queuing => 0,
                       Arbitrary_Queuing => 1,
                       Fifo_Queuing => 2,
                       Priority_Queuing => 3,
                       Priority_Ceiling => 4,
                       Spinning => 5);
    --[ integer'size ne fonctionne toujours pas ]
    -- for Queuing_T'Size use Integer'Size;
    for Queuing_T'Size use 32;


    -- This exception is raised for any priority ceiling errors, such
    -- as, the priority of the calling task is higher than the
    -- priority of a priority ceiling server task.
    Priority_Ceiling_Error : exception;


    -- Values set by pragmas in the main procedure

    Main_Task_Priority : Priority;
    pragma Interface_Name (Main_Task_Priority, "MAIN_TASK_PRIORITY");

    Main_Priority_Inheritance_Enabled : Integer;
    pragma Interface_Name (Main_Priority_Inheritance_Enabled,
                           "MAIN_PRIORITY_INHERITANCE");
    --  If TRUE, then ARBITRARY_QUEUING is PRIORITY_QUEUING.
    --  Otherwise, ARBITRARY_QUEUING is FIFO_QUEUING.
    --

    Main_Global_Entry_Criteria : Queuing_T;
    pragma Interface_Name (Main_Global_Entry_Criteria,
                           "MAIN_GLOBAL_ENTRY_CRITERIA");
    --\x09SPINNING isn't valid.
    --
    --\x09If set to ARBITRARY_QUEUING, then, it is
    --\x09updated during startup according to
    --  main_priority_inheritance_enabled as follows:
    --\x09\x09main_priority_inheritance_enabled = FALSE =>
    --\x09\x09\x09main_global_entry_criteria := FIFO_QUEUING
    --\x09\x09main_priority_inheritance_enabled = TRUE =>
    --\x09\x09\x09main_global_entry_criteria := PRIORITY_QUEUING
    --

    Main_Global_Select_Lexical_Order : Integer;
    pragma Interface_Name (Main_Global_Select_Lexical_Order,
                           "MAIN_SELECT_LEXICAL_ORDER");

    type Main_Pragmas_T is
        record
            Main_Task_Priority : Priority := Priority'First;
            Priority_Inheritance_Enabled : Boolean := False;
            Global_Entry_Criteria : Queuing_T := Arbitrary_Queuing;
            Global_Select_Lexical_Order : Boolean := False;
        end record;
    type A_Main_Pragmas_T is access Main_Pragmas_T;
    function To_A_Main_Pragmas_T is
       new Unchecked_Conversion (Address, A_Main_Pragmas_T);


    -- The following is used for an INTERRUPT_TASK.  The compiler knows
    -- the names of the fields in this record.
    type Cifo_Isr_Header is
        record
            Vector_Num : Integer;
            Handler : Address; -- Address of the first instruction
            -- in the entry's accept body.
            -- The code emitted for the accept
            -- body should look like a normal
            -- Ada procedure.
        end record;

    for Cifo_Isr_Header use
        record
            Vector_Num at 0 range 0 .. 4 * Storage_Unit - 1;
            Handler at 4 range 0 .. 4 * Storage_Unit - 1;
        end record;

    Cifo_Isr_Vector_Num_Off : constant := 0;
    Cifo_Isr_Handler_Off : constant := 4;

    type Cifo_Isr_Header_Ref is access Cifo_Isr_Header;
end V_I_Cifo;

    nblk1=4
    nid=0
    hdr6=8
        [0x00] rec0=1a rec1=00 rec2=01 rec3=006
        [0x01] rec0=1a rec1=00 rec2=02 rec3=032
        [0x02] rec0=18 rec1=00 rec2=03 rec3=006
        [0x03] rec0=1b rec1=00 rec2=04 rec3=000
    tail 0x2175421f0874f7be807a0 0x42a00088462060003