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Names: »99110176.WP«
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╱04002d4e0a0006000000000201413100000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
┆06┆i↲
↲
↲
┆a1┆TABLE OF CONTENTS╞ ╞ ╞ ┆05┆PAGE ↲
↲
↲
1. INTRODUCTION ......................................... 1↲
↲
↲
2. THE BAUD RATE DETERMINATION MODE .....................╞ 2↲
↲
↲
3. THE INITIAL MEMORY TEST .............................. 3↲
3.2 Initial RAM Test ................................. 3↲
3.2.1 Memory Test Flow ........................... 3↲
3.2.2 Loop On Error .............................. 4↲
↲
↲
4. INTERRUPT HANDLING AND PVAM SWITCH ................... 5↲
4.1 Valid Interrupts .................................╞ 5↲
╞ 4.2 Protection Violations and Instruction Exeptions ..╞ 5↲
↲
↲
5. TEST 0 = RAM test .................................... 7↲
↲
↲
6. TEST 1 = Chip Select Test ............................ 9↲
↲
↲
7. TEST 2 = 8254 Programmable Interval Timer Test ....... 10↲
↲
↲
8. TEST 3 = Personality PROM Test ....................... 11↲
↲
↲
9. TEST 4 = RS 422 Test ................................. 12↲
↲
↲
10. TEST 5 = Real Time Clock (RTC) Test .................. 13↲
↲
↲
11. TEST 6 = Timeout Interrupt Test ...................... 14↲
↲
↲
12. TEST 7 = I/O Interrupt Test ........................... 15↲
↲
↲
13. TEST 8 = Numeric Processor Extension Test.............. 16↲
↲
↲
14. TEST 9 = Disc Channel Test ............................ 17↲
↲
↲
15. TEST 10 = Winchester Disc Test ........................ 18↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆TABLE OF CONTENTS (continued) PAGE↲
↲
16. TEST 11 = Multibus Configuration ...................... 20↲
↲
↲
17. TEST 12 = Parallel Port Test .......................... 22↲
↲
↲
18. TEST 13 = Multibus Out Interrupt Test ................. 23↲
↲
↲
19. TEST 14 = Real Time Clock (RTC) Programming Test ...... 24↲
↲
↲
20. TEST 15 = Extended RAM Test ........................... 25↲
20.1 Test Variables ................................... 25↲
20.1.1 Operating Mode ............................ 26↲
20.1.2 Address Range ............................. 26↲
20.1.3 Change Pattern ............................ 26↲
20.1.4 Execute Subtest Alone ..................... 26↲
20.1.5 Bus LOCK .................................. 26↲
20.1.6 BUS Select ................................ 26↲
20.2 Subtest 0 = Pattern test - WORD mode, EVEN Alignm. 27↲
20.3 Subtest 1 = Pattern test - WORD mode, ODD Alignm. 27↲
20.4 Subtest 2 = Pattern test - BYTE mode, ALL bytes .. 27↲
20.5 Subtest 3 = Pattern test - BYTE mode, EVEN bytes only 28↲
20.6 Subtest 4 = Pattern test - BYTE mode, ODD bytes only 28↲
20.7 Subtest 5 = ECC Error Correction Test ............ 29↲
20.8 Subtest 6 = ECC Error Detection Test ............. 30↲
↲
↲
21. TEST 16 = Floppy Test ................................. 31↲
↲
↲
22. TEST 17 = Printer Test ................................ 33↲
↲
↲
23. TEST 18 = Real Time Clock Adjustment Test ............. 34↲
↲
↲
24. LED OUTPUT ............................................ 35↲
↲
↲
APPENDICES:↲
↲
A. REFERENCES ............................................. 37↲
↲
↲
B. COMPLETE ERROR LIST .................................... 38↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆14┆┆b3┆╞ ╞ ╞ ╞ ┆0b┆┆a1┆↲
┆a1┆┆a1┆┆b0┆1. INTRODUCTION.↲
↲
↲
The CPU 610 is an RC iAPX 286 processor based board, used as the ↓
main CPU in RC 39 products. The CPU 610 replaces an INTEL ↓
Manufactured board called CPU 691.↲
↲
↲
This manual assumes the reader is familiar with the RC 39 ↓
selftest concept as described in the manual called "The RC 39 ↓
Selftest Concept". The CPU 610 selftest includes 19 different ↓
tests which may be run in several modes. Twelwe of these tests ↓
are ┆b0┆default┆f0┆ tests which allways execute after a power on. One ↓
┆19┆┄┆81┆┄test is an ┆b0┆extended┆b0┆┆f0┆ test which may be appended to the default set ↓
┆19┆┄┆83┆┄when requested explicit by an operator. The last six tests are ↓
┆19┆┄┆83┆┄┆b0┆seperate┆b0┆l┆f0┆┆b0┆y┆f0┆ run tests, which may each be requested to execute as ↓
┆19┆┄┆86┆┄stand alone programs.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆a1┆┆a1┆┆b0┆2. THE BAUD RATE ┆a1┆DETERMINATION MODE.↲
↲
↲
If a terminal is connected to the V.24 line 1 interface (DSR ↓
activ) then the selftest enters the automatic Baud Rate ↓
Determination mode. The USART is initialized to 9600 Baud and ↓
stars (*****) are written to line 1. These stars may be seen as ↓
stars, other mixed characters or not seen at all depending on the ↓
Baud Rate of the attached console. The selftest waits for the ↓
operator to enter one or two upper case U. One upper case U is ↓
enough if the Baud Rate is 9600, 4800 or 2400 Baud. Baud Rates of ↓
1200, 600 or 300 requires two upper case U.↓
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆3. THE INITIAL MEMORY TEST.↲
↲
↲
After a power on the selftest at first initializes the peripheral ↓
devices, and then enters the initial memory test. This very first ↓
part of the selftest executes in 8086 mode with interrupts ↓
disabeled.↲
↲
↲
The initial memory test of the CPU 610 SBC selftest consists of ↓
two parts, a PROM checksum test and a RAM memory test. The ↓
contents of both the odd and the even PROM's are summarized ↓
ewise and the result must be a zero. For that reason the ↓
PROM's contain a compensation byte which is used to bring the sum ↓
to zero. The checksum test may produce the following errortext.↲
┆a1┆↲
↲
┆b0┆┆f0┆1. ┆b0┆checksum test: sum error exp.:<0000> rec.:<xyzw>↲
↲
↲
Checksum error usually means that the content of the PROM has ↓
been damaged and that the PROM must be changed.↲
↲
↲
┆a1┆┆b0┆3.2 Initial RAM Test.↲
↲
↲
The initial RAM test verifies the first 64 kbytes of RAM ↓
addresses 000000-00FFFF hexadecimal. This part of RAM is used to ↓
hold the protection tables plus selftest and monitor variables ↓
when the processor enters the protected mode of operation.↲
↲
↲
The memory test is a register based test and uses no memory space ↓
at all, neither for variables nor stack.↲
↲
↲
┆a1┆┆e1┆The test pattern is the convenient modulus 3 pattern consisting ↓
of three times 0000 followed by three times FFFF ( hexadecimal ).↲
↲
↲
┆a1┆┆b0┆3.2.1 Memory Test Flow.↲
↲
↲
The test starts in the highest RAM address of the lowes 64 K byte ↓
memory block (FFFF hex.) and inserts the pattern towards lower ↓
addresses.↲
↲
↲
When all initial memory words have been written and verified, ↓
they are tested again with the inversed pattern, this means, that ↓
all bits are tested for "zero" and "one" insertion. If an error ↓
occur the following message is written to the console.↲
↲
┆a1┆↲
┆b0┆┆f0┆2. ┆b0┆Initial RAM Test: RAM error segm.:<ssss> addr.:<aaaa>↲
┆19┆┄┆82┆┆82┆ exp.:<eeee>┆b0┆ rec.:<rrrr>↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
The secondary text is interpreted like this :↲
↲
<ssss> is the segment address (allways 0000)↲
<aaaa> is the segment offset↲
<eeee> is the expected pattern, should allways be 0000 or FFFF.↲
<rrrr> is the received pattern.↲
↲
↲
┆a1┆┆b0┆3.2.2 Loop On Error.↲
↲
↲
When a fault occur during the initial RAM test an error message ↓
is written to the console, and the RAM test starts from the ↓
beginning again. This will be the case until no error is ↓
discovered. If there is a RAM error and if an L is typed from the ↓
keyboard, then the RAM test will not start from the beginning ↓
again, but proceed trough the RAM test and write all RAM errors ↓
to the console, and finally enter the "test-administrator" to ↓
execute other tests if possible.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆4. INTERRUPT HANDLING AND PVAM SWITCH.↲
↲
↲
When the CPU 610 SBC selftest has terminated the initial memory ↓
test the protection tables are copied from EPROM to RAM. Then the ↓
iAPX 286 CPU and the board as well is switched into the Protected ↓
Virtual Address Mode, and a message is written to the console ↓
like this:↲
↲
↲
┆b0┆******* PVAM ENTERED *******↲
↲
↲
If an 80827 Numeric Coprocessor is present, then it is also ↓
switched into the protected mode and another message written to ↓
the console:↲
↲
↲
┆b0┆80287 NPX Found↲
↲
↲
┆a1┆┆b0┆4.1 Valid Interrupts.↲
↲
↲
A few interrupts are allways considered valid during the ↓
selftest:↲
↲
↲
┆a1┆Request line Interrupt name Vector type Event type ↲
↲
internal Step interrupt 1╞ ┆84┆instruction executed ↓
┆19┆┆ac┆┄┄with trap flag set↲
↲
internal╞ Break interrupt╞ 3╞ ┆84┆software interrupt ↓
┆19┆┆ac┆┄┄(debugger entry)↲
↲
CNTR0╞ Timer 0╞ ╞ 40╞ Timer 0 interrupt↲
↲
SER INTR╞ USART receive int.╞ 34╞ Keyboard interrupt↲
↲
↲
┆a1┆┆b0┆4.2 Protection Violations and Instruction Exceptions.↲
↲
↲
The protection violations and instruction exceptions will cause ↓
the selftest to write a message to the console and then execute ↓
a HALT instruction. The only way to get out of these exception is ↓
to hardware reset the CPU.↲
↲
↲
┆a1┆Vector type Error Text ↲
↲
0 Interrupt 0 at 'CS:IP' Divide By Zero↲
╞ ╞ HALTED - Hardware RESET required↲
↲
2╞ ╞ Interrupt 2 at 'CS:IP' NMI↲
╞ ╞ HALTED - Hardware RESET required↲
↲
┆8c┆┆83┆┆d0┆↓
4╞ ╞ Interrupt 4 at 'CS:IP' Overflow↲
╞ ╞ HALTED - Hardware RESET required↲
↲
5╞ ╞ Interrupt 5 at 'CS:IP' Bounds Check↲
╞ ╞ HALTED - Hardware RESET required↲
↲
6╞ ╞ Interrupt 6 at 'CS:IP' Undefined Operation↲
╞ ╞ HALTED - Hardware RESET required↲
↲
7╞ ╞ Interrupt 7 at 'CS:IP' Device Not Available↲
╞ ╞ HALTED - Hardware RESET required↲
↲
8╞ ╞ Interrupt 8 at 'CS:IP' Double Fault↲
╞ ╞ HALTED - Hardware RESET required↲
↲
9╞ ╞ Interrupt 9 at 'CS:IP' Math Address Error↲
╞ ╞ HALTED - Hardware RESET required↲
↲
10╞ ╞ Interrupt 10 at 'CS:IP' Invalid Task State Segment↲
- ECODE = XXXX↲
╞ ╞ HALTED - Hardware RESET required↲
↲
11╞ ╞ Interrupt 11 at 'CS:IP' Not Present - ECODE = XXXX↲
╞ ╞ HALTED - Hardware RESET required↲
↲
12╞ ╞ Interrupt 12 at 'CS:IP' Stack Protection↲
╞ ╞ - ECODE = XXXX↲
╞ ╞ HALTED - Hardware RESET required↲
↲
13╞ ╞ Interrupt 13 at 'CS:IP' General Protection↲
╞ ╞ - ECODE = XXXX↲
╞ ╞ HALTED - Hardware RESET required↲
↲
14╞ ╞ Interrupt 14 at 'CS:IP'↲
╞ ╞ HALTED - Hardware RESET required↲
↲
15╞ ╞ Interrupt 15 at 'CS:IP'↲
╞ ╞ HALTED - Hardware RESET required↲
↲
16╞ ╞ Interrupt 16 at 'CS:IP' Math Error↲
╞ ╞ HALTED - Hardware RESET required↲
↲
↲
The term 'CS:IP' refers to the logical location in the program, ↓
where the exception came. The errorcode pushed onto the stack by ↓
some exceptions (ECODE) may be hard to decode, and no attempt to ↓
document them in this manual will be done. Consult INTEL manuals ↓
for further description of the exceptions and their errorcodes.↲
↲
↲
All other interrupts that either refer to a NULL descriptor in ↓
the Interrupt Descriptor Table (IDT) or to a descriptor outside ↓
the IDT limit will cause one of the protection violations above. ↓
If a test uses interrupt vectors not mentioned above, then the ↓
test is responsible for loading the appropiate descriptor into ↓
the IDT prior to the test and to nullify the descriptor at the ↓
end of the test.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆5. ┆b0┆TEST 0 =┆f0┆ RAM test.┆b0┆↲
↲
↲
After the switching of the iAPX 286 processor to the protected ↓
mode of operation this RAM test is responsible for verifying the ↓
rest of the CPU 610 memory. The memory size is variable between ↓
512 K bytes and 8 M bytes and a maximum of 4 memory boards may be ↓
connected to a CPU 610 (iLBX BUS width is 5 slots). The memory ↓
must be contiguous from address 0 (the XENIX operating system ↓
assumes this).↲
↲
↲
This RAM test, of course, dont verify the lowest part of memory ↓
addresses 0-FFFF hexadecimal, which is covered by the initial ↓
memory test and used to hold selftest variables.↲
↲
↲
This test divides the available memory space into 64 K byte ↓
blocks, the first starting at address 10000 hexadecimal and the ↓
last ending at address 7FFFFF hexadecimal. For every possible 64 ↓
K byte block the RAM test does:↲
↲
↲
1. ┆84┆Writes a pattern to the first byte of that block. Reads the ↓
┆19┆┆83┆┄┄byte back, and if the same pattern is read back memory is ↓
┆19┆┆83┆┄┄considered present and the verification of that block ↓
┆19┆┆83┆┄┄continues, otherwise the next 64 K byte block is tried.↲
↲
↲
2. ┆84┆The 64 K byte block considered present in step 1 is filled ↓
┆19┆┆83┆┄┄with ones. The content is read back, and if not all ones an ↓
┆19┆┆83┆┄┄error message is generated and the test terminated.↲
↲
↲
3. ┆84┆The 64 K byte block of memory is filled with zeroes. The ↓
┆19┆┆83┆┄┄content is read back, and if not all zeroes an error message ↓
┆19┆┆83┆┄┄is generated and the test terminated.↲
↲
↲
4. ┆84┆Step 1 is entered again until the last possible 64 K byte ↓
┆19┆┆83┆┄┄block has been checked.↲
↲
┆b0┆┆f0┆↲
The RAM test may produce the following error message:↲
↲
↲
1. ┆b0┆RAM test: RAM error segm.:<ssss> addr.:<aaaa> exp.:<eeee>↲
╞ ╞ ╞ ╞ ┆b0┆ rec.:<rrrr>↲
↲
↲
The secondary text is interpreted like this :↲
↲
↲
<ssss> ┆84┆is the segment LDT selector (use RC 39 Monitor to ↓
┆19┆┆87┆┄┄determine the physical address - XLDT <ssss>)↲
<aaaa> is the segment offset↲
<eeee> is the expected pattern, should allways be 0000 or FFFF.↲
┆8c┆┆83┆┆c8┆↓
<rrrr> is the received pattern.↲
↲
↲
The memory size is handed over to the Multibus configuration ↓
program and displayed in the Multibus Configuration Schedule.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆81┆┆a1┆┆b0┆6. ┆b0┆TEST 1 = ┆f0┆Chip Select Test.↲
↲
↲
To ease complex debugging, a simple chip select loop, combined ↓
with a RAM write/read, is supplied. ↲
↲
↲
This test generates chip selects to all peripheral devices by ↓
executing input instructions to all relevant I/O-devices. These ↓
are :↲
↲
↲
Port ┆84┆0C0, 0C2, 0C4, 0C6, 0C8, 0CA, 0CC, 0CE, 0D0, 0D2, 0D4, 0D6, ↓
┆19┆┆85┆┄┄0D8, 0DA, 0DC, 0DE.↲
↲
↲
When all the chip selects are made, a pattern AA55 hex. is ↓
written to a RAM cell and immediately read back.↲
↲
This test is unable to generate any error messages. It is meant ↓
only as a special fast scope loop test.↲
════════════════════════════════════════════════════════════════════════
↓
┆a2┆┆e2┆┆a1┆┆b0┆7. ┆b0┆TEST 2┆f0┆ = 8254 Programmable Interval Timer Test.↲
↲
↲
This test verifies the ability of the 8254 PIT timer 0, used as a ↓
real time clock in XENIX, to generate interrupts. Timer 0 is ↓
initialized as a real time clock which generates interrupt every ↓
20 millisecond. If no timer interrupt is generated then an error ↓
message is generated like this.↲
↲
↲
┆a1┆┆a1┆┆a1┆┆e1┆┆b0┆┆f0┆1. ┆b0┆PIT Test : missing timer 0 interrupt↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆8. ┆b0┆TEST 3┆f0┆ ┆f0┆= Personality PROM Test.↲
↲
↲
The personality PROM test calculates the checksum of the 256 * 4 ↓
bit bipolar PROM. All nibbles are added with carry, and the test ↓
displays the checksum hexadecimally like this.↲
↲
↲
┆b0┆Personality PROM test: Checksum = XYVZ↲
↲
↲
This test is unable to generate error messages.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆9. ┆b0┆TEST 4┆f0┆ = RS 422 Test.↲
↲
↲
This test program verifies the RS 422 multidrop interface and its ↓
status signals. On board loopback circuitry makes it possible to ↓
run this test without external hardware connected.↲
↲
↲
First the test verifies the function of the CTS status signal, ↓
which is toggled by DTR in loop back mode, and if an error occur ↓
a message is displayed.↲
↲
↲
1. ┆b0┆RS 422 test: RS422 Clear to Send error↲
↲
↲
If the status signal test succeeds then a serial data transport ↓
of a 2 K byte long source buffer to an equally long destination ↓
buffer is made. When the data transport has completed the two ↓
buffers are compared, and if not equal an error message is ↓
written to the console.↲
↲
↲
2. ┆b0┆RS 422 test: data error↲
↲
↲
If the data transport does'nt complete within 5 seconds a timeout ↓
message is generated.↲
↲
↲
3. ┆b0┆RS 422 test: transfer timeout↲
↲
↲
If a parity interrupt is generated another error message is ↓
generated. The USART is not initialized to operate with parity so ↓
this interrupt is truly unexpected.↲
↲
↲
4. ┆b0┆RS 422 test: parity interrupt error↲
↲
↲
The test executes at 9600 baud.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆10. ┆b0┆TEST 5┆f0┆ = Real Time Clock (RTC) Test.↲
↲
↲
The Real Time Clock test is used to display the state of the on ↓
board RTC chip. The normal output from the test looks like this.↲
↲
↲
┆b0┆RTC test: I Think it is: my:dm:hd:md:sh↲
↲
↲
my is month of year, dm is day of month, hd is hour of day, md is ↓
minute of hour and sh is second of minute.↲
↲
↲
If the RTC test reads an invalid BCD code from the clock chip an ↓
error message is generated.↲
↲
↲
1. ┆b0┆RTC test: read error↲
↲
↲
If it is impossible to read the RTC clock chip without status ↓
error after 50 attempts another error message is generated.↲
↲
↲
2. ┆b0┆RTC test: status error↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆11. ┆b0┆TEST 6┆f0┆ = Timeout Interrupt Test.↲
↲
↲
This test is supplied to verify the functionality of the timeout ↓
interrupt logic. This test generates a timeout by an out ↓
instruction to port 0FFFF hexadecimal. If no interrupt occur an ↓
error message is generated.╞ ↓
↲
↲
1. ┆f0┆┆b0┆Timeout interrupt test: missing interrupt rec.:<0032>↲
↲
↲
The received value display the type of the interrupt missing. If ↓
the interrupt is generated but unable to reset another message is ↓
written.↲
↲
↲
2. ┆b0┆Timeout interrupt test: cannot reset interrupt rec.:<0032>↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆12. ┆b0┆TEST 7┆f0┆ = I/O Interrupt Test.↲
↲
↲
This test verifies the 8 extra Multibus interrupt mapped in to ↓
I/O space. The interrupts is generated one by one starting with ↓
MB interrupt 15 (type 38) and ending with interrupt 8 (type 33). ↓
If no interrupt occur an error message is generated.╞ ↲
↲
1. ┆f0┆┆b0┆IO interrupt test: missing interrupt rec.:<00rr>↲
↲
↲
The received value display the type of the interrupt missing. If ↓
the interrupt is generated but unable to reset another message is ↓
written.↲
↲
↲
2. ┆b0┆IO interrupt test: cannot reset interrupt rec.:<00rr>↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆13. ┆b0┆TEST 8┆f0┆ =┆f0┆ Numeric Processor Extension Test.↲
↲
↲
The Numeric Processor Extension test program applies to the ↓
verification of the 80287 coprocessor and its interface circuits. ↓
If no 80287 coprocessor is present (bit 2 Machine Status Word ↓
"0") then a message is written to the console like this.↲
↲
1. ┆b0┆80287 NPX Test: NPX not present: OK↲
↲
↲
Otherwise if the NPX is present the test proceeds and verifies ↓
the NPX's function. If an error is discovered an error message ↓
like this is written to the console.↲
↲
↲
2. ┆b0┆80287 NPX Test: 80287 NPX not OK↲
↲
↲
This error might be caused by malfunction of the 80278 chip, by a ↓
fault of the interface circuits , or by something else. ↲
════════════════════════════════════════════════════════════════════════
↓
┆b0┆┆a1┆┆a1┆14. ┆b0┆TEST 9┆f0┆ = Disk Channel Test.↲
↲
↲
This test is used to exercise and verify the data channel between ↓
CPU 610 and the disk controller.↲
↲
↲
The first part of this test executes a "disc diagnostic command" ↓
to the disc controller. This command orders the disc controller ↓
to verify its sector buffer by the use of several critical data ↓
patterns. If the disc controller responds with an error to this ↓
command an error message is generated.↲
↲
↲
1. ┆b0┆Disc Channel test: disc diagnostic error↲
↲
↲
If the disc does'nt respond to the disc diagnostic command within ↓
800 milliseconds an error message is generated.↲
↲
↲
2. ┆b0┆Disc Channel test: transfer timeout or interrupt missing↲
↲
↲
The second part of this test executes a "write sector buffer ↓
command " followed by a "read sector buffer command". The data ↓
read back are compared to the written pattern and if not equal an ↓
error message is generated.↲
↲
↲
┆b0┆┆b0┆┆f0┆3. ┆b0┆Disc Channel test: disc channel error segm.:<ssss> addr.:<aaaa>↲
┆b0┆exp.:<eeee> rec.:<rrrr>↲
↲
↲
The secondary error text is interpreted like this :↲
↲
↲
<ssss> ┆84┆is the segment LDT selector (use RC 39 Monitor to ↓
┆19┆┆87┆┄┄determine the physical address - XLDT <ssss>)↲
<aaaa> is the segment offset↲
<eeee> is the expected pattern, should allways be 0000 or FFFF.↲
<rrrr> is the received pattern.↲
↲
↲
Otherwise. If an error of the disc is discovered an error message ↓
like this is written to the console.↲
↲
↲
┆82┆4. ┆b0┆Disc Channel test: disc command error↲
↲
↲
This error might be caused by malfunction of the disc, by a fault ↓
of the interface circuits , or by something else. ↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆a1┆┆b0┆15. ┆b0┆TEST 10┆f0┆ = Winchester Disc Test.↲
↲
↲
This test verifies the ┆b0┆┆f0┆functionality of the winchester disk ↓
┆19┆┄┆81┆┄drive and the disk controller board, not the winchester media ↓
┆19┆┄┆81┆┄itself. The format of the winchester disk track 1 must be ↓
┆19┆┄┆81┆┄formatted properly prior to the test, it is fixed and is.↲
↲
↲
╞ ╞ ╞ ┆84┆1024 bytes/sector.↲
╞ ╞ ╞ 9 sectors/track.↲
╞ ╞ ╞ 2 heads/cylinder.↲
╞ ╞ ╞ 1 cylinder/disk.↲
↲
↲
This test verifies only on track of the winchester disc the ↓
"test-track" given by the disc description on track 1. ↓
The first part of this test executes a "read command", this ↓
command reads disc characteristic parametres which specifies a ↓
default or current parameter value for disc and is placed on the ↓
sector 0 of track 1. This value remains unchanged and is used to ↓
initialize winchester disk controller.↲
↲
↲
If the disc controller responds with an error to this command an ↓
error message is generated.↲
↲
↲
1. ┆b0┆Winchester disk test: Winchester can not read rec.:<rrrr>↲
↲
↲
<rrrr> is the error code from the disc controller. The OMTI ↓
Reference Manual (SDC 691) Appendix B gives the information about ↓
this error code.↲
↲
↲
If the disk controller does'nt respond to a disk's command within ↓
1 second an error message is generated.↲
↲
↲
2┆b0┆. Winchester disk test: transfer timeout or interrupt missing↲
↲
↲
If the test discovers that the winchester disk isn't formatted a ↓
message is written to the console like this.↲
↲
↲
┆b0┆┆b0┆Winchester disk test: Winchester disk not formatted : OK↲
↲
↲
If the first step went succesfull the test going to the second ↓
part. The second part of this test executes a "write test sector ↓
command " followed by a "read test sector command". A pattern is ↓
written to the test sector, and the disc controller may respond ↓
with an error which makes the test program write an error ↓
message.↲
↲
↲
┆8c┆┆83┆┆d0┆↓
3. ┆b0┆Winchester disk test: Winchester can not write rec.:<rrrr>↲
↲
↲
<rrrr> is the error code from the disc controller. The OMTI ↓
Reference Manual (SDC 691) Appendix B gives the information about ↓
this error code.↲
↲
↲
If no error has happend until now the sector is read back and ↓
compared to the original one, and if equal the test is repeated ↓
on the next sector until end of test track , otherwise an error ↓
message is generated.↲
↲
↲
4. ┆b0┆Winchester disk test: bad test sector sector.:<dddd>, ↓
┆19┆┄┆81┆┆82┆ segm.:<ssss>,┆b0┆ addr.:<aaaa>, exp.:<eeee>, rec.:<rrrr>↲
↲
↲
The secondary error text is interpreted like this :↲
↲
↲
<dddd> gives the address of the bad test sector.↲
<ssss> ┆84┆is the segment LDT selector (use RC 39 Monitor to ↓
┆19┆┆87┆┄┄determine the physical address - XLDT <ssss>).↲
<aaaa> is the segment offset.↲
<eeee> is the expected pattern.↲
<rrrr> is the received pattern.↲
↲
↲
Otherwise. If an error of the disk controller or of the disk ↓
drive is discovered an error message like this is written to the ↓
console.↲
↲
↲
┆82┆5. ┆b0┆Winchester disk test: disk command error↲
↲
↲
This error might be caused by malfunction of the disc, by a fault ↓
of the interface circuits , or by something else.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆16. ┆b0┆TEST 11 =┆f0┆ Multibus Configuration.↲
↲
↲
When the CPU 610 has finished its own selftest it will make a ↓
Multibus configuration. Every RC-manufactured SBC card is located ↓
with its Dual-Ported RAM ending on a 64 KB boundary address. When ↓
a RC 39 SBC starts the execution of its selftest program it ↓
immediately initializes the last word in its Dual-Ported RAM with ↓
a special pattern corresponding to "not-ready". When the test is ↓
terminated with or without an error the pattern is changed to ↓
"ready". Ready indicates to the "test-master" that the SBC is ↓
ready to communicate. Both the "not-ready" pattern and the ↓
"ready" pattern must of course be different from the pattern ↓
which is read by the "test-master" when reading from a Multibus ↓
address with non-existing RAM (bus acknowledge timeout assumed).↲
↲
↲
The hardware configuration process is possible due to the fact ↓
that all the "test-slaves" communicates with the "test-master" ↓
trough DP-RAM located to end on 64 K boundaries. This minimizes ↓
the configuration attempts to a maximum of 32 entries ↓
(controllers are placed between Multibus addresses 800000-A00000 ↓
hexedecimal). During the configuration process the "test-master" ↓
starts reading from the top of the controller address space ↓
(address 9FFFFF hexadecimal). If a pattern equal to "not-ready" ↓
or "ready" is found the selftest assumes that an intelligent SBC ↓
card is present, and reads som further parameters such as card-↓
type, RAM-size and selftest execution time in seconds. If the ↓
card is marked "not-ready" the "test-master" may use the selftest ↓
execution time to decide how long to wait for that card to become ↓
"ready". Also a handshake protocol is executed to reassure that ↓
the "ready" pattern was not read by random. From the knowledge to ↓
the RAM-size the "test-master" calculates the address where to ↓
continue the Multibus configuration. If no "ready" or "not-ready" ↓
pattern is received then the "test-master" configuration writes ↓
to and reads back from the RAM cell to find out if some RAM ↓
really exists on that Multibus address. The configuration program ↓
ends with writing a configuration schedule to the console. The ↓
schedule might look like this:↲
↲
┆b0┆↲
╱04002d4e0c000600000000020147314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
╱04002d4e0a0006000000000201413100000000000000000000000000000000000000000000000000050f19232d37414b555f69737d8791ff04╱
↓
┆b0┆Multibus Configuration:↲
┆b0┆======================================================================↲
┆b0┆┆b0┆MB entry - MB address - Card State - Card ID - MB RAM size - error no.↲
┆b0┆======================================================================↲
┆b0┆00000╞ 000000 master╞ CPU 610 02048 00000↲
┆b0┆┆b0┆00001╞ 9E0000╞ ready╞ ITC 602 00064╞ 00000↲
┆b0┆00002 8E0000╞ ready╞ COM 601 00064 00000↲
┆b0┆00003 800000 ready ETC 611 00512 00000↲
╱04002d4e0a000600000000020141314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
╱04002d4e0c000600000000020147314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
↓
↲
↲
The configuration data is stored in a specific data structure ↓
where it may be accessed by the system software.↲
↲
↲
The bootload is not inhibited if a "test-slave" has found an ↓
error during its default selftest, but a message is written to ↓
┆8c┆┆83┆┆c8┆↓
the console. The reason for this is that an incremental part of ↓
the system may still be running, and this might be sufficient for ↓
many users.↲
↲
↲
The default selftest terminates with directing all the "test-↓
slaves" found during the multibus configuration to their bootload ↓
phase and it may look like this.↲
↲
↲
┆b0┆<00001> sent to bootload↲
┆b0┆<00002> sent to bootload↲
┆b0┆<00003> sent to bootload↲
↲
↲
If some slave dosen't respond correctly to the boot command a ↓
message is written to the console like this.↲
↲
↲
┆b0┆<00002> slave answer timeout↲
↲
↲
Consult the manual called "The RC39 selftest concept" for further ↓
┆19┆┄┆81┆┄information about the Multibus configuration and details about ↓
┆19┆┄┆81┆┄how to run further diagnostics on the "test-slaves".↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆17.┆b0┆ TEST 12 =┆f0┆ Parallel Port Test.↲
↲
↲
The 8255A PPI test writes a pattern 10100000 binary to the output ↓
port A (I/O addr. C8H). Then it reads the pattern back and ↓
verifies it. If no error is detected the pattern is shifted one ↓
bit to the right, and the write/read verify procedure is repeated ↓
until the pattern becomes zero. The test may generate this error ↓
message:↲
↲
↲
┆b0┆┆e1┆┆a1┆┆e1┆┆f0┆1. ┆b0┆PPI test: port error exp.:00ee, rec.:00rr↲
↲
↲
Expected and received pattern tells you what bits went wrong with ↓
the test.↲
↲
↲
This error might be caused by malfunction of the 8255A chip, by ↓
an initialization fault (I/O space error), or by something else. ↓
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆18. ┆b0┆TEST 13┆f0┆ = Multibus Out Interrupt Test.↲
↲
↲
This ┆b0┆seperately ┆f0┆run test verifies the functionality of the 3 ↓
┆19┆┄┆81┆┄outgoing Multibus interrupts. In order to make this test work 3 ↓
┆19┆┄┆81┆┄straps must be installed in the interrupt strap feld W5, W5(33-↓
┆19┆┄┆81┆┄12), W5(32-13) and W5(43-2). The interrupt is generated one by ↓
┆19┆┄┆81┆┄one, first MBINT2 (type 44), second MBINT1 (type 54) and third ↓
┆19┆┄┆81┆┄MBINT0 (type 48). If an interrupt is generated but not serviced ↓
┆19┆┄┆81┆┄an error message is generated.↲
↲
↲
1. ┆b0┆MB out interrupt test: missing interrupt rec.:<00rr>↲
↲
↲
The received value is the type of the expected inetrrupt.↲
↲
↲
If an interrupt is generated but unable to reset another message ↓
is generated.↲
↲
↲
2. ┆b0┆MB out interrupt test: cannot reset interrupt rec.:<00rr>↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆19. ┆b0┆TEST 14┆f0┆ = Real Time Clock (RTC) Programming Test.↲
↲
↲
This ┆b0┆seperately┆f0┆ run test is supplied as a programming tool for ↓
┆19┆┄┆81┆┄the Real Time Clock chip. A series of question is asked line by ↓
┆19┆┄┆81┆┄line as this.↲
↲
↲
┆b0┆RTC programming:↲
┆b0┆Enter Month of Year ? , <1-12> 1/↲
┆b0┆Enter day of Month ? , <1-31> 1/↲
┆b0┆Enter Hour ? , <0-23> 0/↲
┆b0┆Enter Minute ? <0-59> 0/↲
┆b0┆Enter Seconds ? , <0-59> 0/↲
↲
↲
The questions must be answered with a value in the range given in ↓
brackets (<>), Or a carriage return only. In the latter case the ↓
default value left to the slash is taken.↲
↲
↲
This test is unable to generate error messages.↲
════════════════════════════════════════════════════════════════════════
↓
┆84┆┆a1┆┆b0┆20. ┆b0┆TEST 1┆f0┆┆b0┆5┆f0┆ = Extended RAM Test.↲
↲
↲
This ┆b0┆seperately┆f0┆ run test is supplied to verify the functionality ↓
┆19┆┄┆81┆┄of the INTEL iSBC 012X or the RC MEM 602/603 memory boards. The ↓
┆19┆┄┆81┆┄test is divided into 6 different subtests, which must either ↓
┆19┆┄┆81┆┄execute alone or in a big sequential loop. The first time the ↓
┆19┆┄┆81┆┄test is run several variables must be supplied to the test.↲
↲
↲
┆a1┆┆b0┆20.1 Test Variables.↲
↲
↲
The first time the test is selected a menu is written to the ↓
console like this.↲
↲
↲
╱04002d4e0c00060000000002014d314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
╱04002d4e0a000600000000020141314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
↓
┆b0┆MEM 60X Test: ************** Extended RAM test - Operating Instructions↓
╱04002d4e0a000600000000020141314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
╱04002d4e0c00060000000002014d314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
↓
┆b0┆Press <ctl><X>= start MEM 60X test↲
┆b0┆Press <ctl><A>= Enter Debugger Loader↲
┆b0┆Press <escape>= Return to Test Administrator↲
↲
┆b0┆SUBTEST↲
┆b0┆ 0. Pattern test - WORD mode, EVEN alignment↲
┆b0┆ 1. Pattern test - WORD mode, ODD alignment↲
┆b0┆ 2. Pattern test - BYTE mode, ALL bytes↲
┆b0┆ 3. Pattern test - BYTE mode, EVEN bytes only↲
┆b0┆ 4. Pattern test - BYTE mode, ODD bytes only↲
┆b0┆ 5. ECC error correction test↲
┆b0┆ 6. ECC error detection test↲
↲
↲
When a <ctl><X> is entered the questions below will be asked line ↓
by line by the test program. Questions in paranthesis is only ↓
asked if the former question was answered with yes (Y).↲
↲
↲
┆b0┆Enter normal MEM 60X operating mode (ECR port) ? 0FH/↲
┆b0┆Enter test START 64 KB Block number ? <1-FF>, 1H/↲
┆b0┆Enter test START Offset address ? <0-FFFF>, 0H/↲
┆b0┆Enter test END 64 KB Block number ? <1-FF>, 1H/↲
┆b0┆Enter test END Offset address ? <0-FFFF>, 0H/↲
┆b0┆Enter MEM 60X PORT address ? <0-FFFF>, 1C0/↲
┆b0┆Change pattern ? <Y/N>, N/↲
┆b0┆(Enter Your Pattern !! /)↲
┆b0┆Run Subtest ? <Y/N>, N/↲
┆b0┆(Enter Subtest Number ? <0-7>, 0/)↲
┆b0┆Bus LOCK active ? <Y/N>, N/↲
┆b0┆iLBX BUS selected ? <Y/N>, Y/↲
↲
↲
Valid answers is shown in brackets (<>), except for the operating ↓
mode. If a carriage return is entered the value left to the slash ↓
is taken by default.↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆20.1.1 Operating Mode.↲
↲
↲
It is not recommended to change the operating mode, except for ↓
disabeling the error correction logic (mode 0BH) during the ↓
execution of subtest 0-4. Subtest 5 is unable to execute ↓
succesfully with error correction disabeled.↲
↲
↲
┆a1┆┆b0┆20.1.2 Address Range.↲
↲
↲
This test divides the 16 M Byte physical memory space into 256 ↓
blocks of 64 K byte each. It is impossible to execute this test ↓
in the lowest 64 K byte block. That block is used for selftest ↓
stack and variables. The physical start or end address for the ↓
test is given as a block number 1-255 plus an offset 0-65536 ↓
which must be entered in hexadecimal. Normally the address range ↓
is selected not to go across Multibus memory board boundaries, ↓
but if subtest 0-4 is executed alone it is possible to execute ↓
the test across contiguous memory board boundaries.↲
↲
↲
┆a1┆┆b0┆20.1.3 Change Pattern.↲
↲
↲
The pattern used by the selftest is by default 6 words long (3 ↓
times 0000 and 3 times FFFF hexadecimal). If the change pattern ↓
question is answered with a yes, then it will be possible to ↓
change the pattern itself and the length of the pattern also. The ↓
minimum length of the pattern is one word and the maximum length ↓
is six words. The "Enter your pattern" question may be terminated ↓
by the <escape> button after 1,2,3,4 or 5 words, the number of ↓
words giving the length of the pattern.↲
↲
↲
┆a1┆┆b0┆20.1.4 Execute Subtest Alone.↲
↲
↲
If the Run Subtest question is answered with a yes, an additional ↓
question about the subtest number is asked.↲
↲
↲
┆a1┆┆b0┆20.1.5 Bus LOCK.↲
↲
↲
If the Bus Lock question is answered with a yes, then subtest 0-4 ↓
executes all memory read or write commands with the Bus Lock ↓
Prefix. It is impossible to lock the bus for more than the ↓
duration of one instruction.┆a1┆↲
↲
↲
┆a1┆┆b0┆20.1.6 BUS Select.↲
↲
↲
If the last question about iLBX bus selected is answered with a ↓
no (N), then CPU 610 uses the Multibus during this test.↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆20.2 Subtest 0 = Pattern test - WORD mode, EVEN alignment.↲
↲
↲
Subtest 0 writes the pattern word by word from the pattern buffer ↓
to memory from the start address to the end address. EVEN ↓
alignment is forced on the start address (start address ↓
decremented if ODD). The pattern is read back and compared to the ↓
original one, and if equal the test is repeated with the inversed ↓
pattern, otherwise an error message is generated.↲
↲
↲
1. ┆b0┆MEM 60X Test: Subtest: 0 - RAM error segm.:<ssss> addr.:<aaaa>↲
┆19┆┄┆81┆┆82┆ exp.:<eeee> rec.:<rrrr>↲
↲
↲
The secondary text is interpreted like this :↲
↲
↲
<ssss> ┆84┆is the 64 K byte block number (1-FF).↲
<aaaa> is the offset within the block (0-FFFF).↲
<eeee> is the expected pattern.↲
<rrrr> is the received pattern.↲
↲
↲
┆a1┆┆b0┆20.3 Subtest 1 = Pattern test - WORD mode, ODD alignment.↲
↲
↲
Subtest 1 writes the pattern word by word from the pattern buffer ↓
to memory from the start address to the end address. ODD ↓
alignment is forced on the start address (start address ↓
incremented if EVEN). The pattern is read back and compared to ↓
the original one, and if equal the test is repeated with the ↓
inversed pattern, otherwise an error message is generated.↲
↲
↲
1. ┆b0┆MEM 60X Test: Subtest: 1 - RAM error segm.:<ssss> addr.:<aaaa>↲
┆19┆┄┆81┆┆82┆ exp.:<eeee> rec.:<rrrr>↲
↲
↲
The secondary text is interpreted like this :↲
↲
↲
<ssss> ┆84┆is the 64 K byte block number (1-FF).↲
<aaaa> is the offset within the block (0-FFFF).↲
<eeee> is the expected pattern.↲
<rrrr> is the received pattern.↲
↲
↲
┆a1┆┆b0┆20.4 Subtest 2 = Pattern test - BYTE mode, ALL bytes.↲
↲
↲
Subtest 2 writes the pattern byte by byte from the pattern buffer ↓
to memory from the start address to the end address. The pattern ↓
is read back and compared to the original one, and if equal the ↓
test is repeated with the inversed pattern, otherwise an error ↓
message is generated.↲
↲
↲
1. ┆b0┆MEM 60X Test: Subtest: 2 RAM error segm.:<ssss> addr.:<aaaa>↲
┆b0┆ exp.:<eeee> rec.:<rrrr>↲
↲
↲
┆8c┆┆83┆┆f0┆↓
The secondary text is interpreted like this :↲
↲
↲
<ssss> ┆84┆is the 64 K byte block number (1-FF).↲
<aaaa> is the offset within the block (0-FFFF).↲
<eeee> is the expected pattern.↲
<rrrr> is the received pattern.↲
↲
↲
┆a1┆┆b0┆20.5 Subtest 3 = Pattern test - BYTE mode, EVEN bytes only.↲
↲
↲
Subtest 3 writes the pattern byte by byte from the pattern buffer ↓
to the EVEN memory cells from the start address to the end ↓
address. EVEN alignment is forced on the start address (start ↓
address decremented if ODD). Before the EVEN byte is written the ↓
inversed pattern is written to the ODD byte (EVEN address + 1). ↓
The pattern is read back and compared to the original one, and if ↓
equal the test is repeated with the inversed pattern, otherwise ↓
an error message is generated. It is also checked if the writing ↓
of the EVEN memory cell disturbed the content of the ODD memory ↓
cell and if true an error message is generated.↲
↲
↲
1. ┆b0┆MEM 60X Test: Subtest: 3 - RAM error segm.:<ssss> addr.:<aaaa>↲
┆b0┆ exp.:<eeee> rec.:<rrrr>↲
↲
↲
The secondary text is interpreted like this :↲
↲
↲
<ssss> ┆84┆is the 64 K byte block number (1-FF).↲
<aaaa> is the offset within the block (0-FFFF).↲
<eeee> is the expected pattern.↲
<rrrr> is the received pattern.↲
↲
↲
┆a1┆┆b0┆20.6 Subtest 4 = Pattern test - BYTE mode, ODD bytes only.↲
↲
↲
Subtest 4 writes the pattern byte by byte from the pattern buffer ↓
to the ODD memory cells from the start address to the end ↓
address. ODD alignment is forced on the start address (start ↓
address incremented if ODD). Before the ODD byte is written the ↓
inversed pattern is written to the EVEN byte (ODD address - 1). ↓
The pattern is read back and compared to the original one, and if ↓
equal the test is repeated with the inversed pattern, otherwise ↓
an error message is generated. It is also checked if the writing ↓
of the ODD memory cell disturbed the content of the EVEN memory ↓
cell and if true an error message is generated.↲
↲
↲
1. ┆b0┆MEM 60X Test: Subtest: 4 - RAM error segm.:<ssss> addr.:<aaaa>↲
┆b0┆ exp.:<eeee> rec.:<rrrr>↲
↲
↲
════════════════════════════════════════════════════════════════════════
↓
The secondary text is interpreted like this :↲
↲
↲
<ssss> ┆84┆is the 64 K byte block number (1-FF).↲
<aaaa> is the offset within the block (0-FFFF).↲
<eeee> is the expected pattern.↲
<rrrr> is the received pattern.↲
↲
↲
┆a1┆┆a1┆┆b0┆20.7 Subtest 5 = ECC Error Correction Test.↲
↲
↲
Subtest 5 verifies the ability of the ECC hardware circiutry to ↓
correct single bit errors.↲
↲
↲
First the test resets all memory cells from the start address to ↓
the end address, and if unable to reset memory generates an error ↓
message like this.↲
↲
↲
1. ┆b0┆MEM 60X Test: Subtest: 5 - Could not reset RAM↲
↲
↲
If RAM is reset succesfully the then test proceeds and makes the ↓
start address EVEN aligned (decrement start address if ODD). Then ↓
a pattern equal to 0000000000000001 binary is written to the ↓
first memory cell in diagnostic mode (writing of checkbits ↓
inhibited), the checkbits is read and saved for an eventually ↓
error message. The operating mode is restored and the data is ↓
read back. The syndrome bits are read and if they does'nt ↓
indicate an error correct correction (the bit set in the pattern ↓
should get corrected to a 0) then an error message is written to ↓
the console.↲
↲
↲
2. ┆b0┆MEM 60X Test: Subtest: 5 - error correction error↲
┆b0┆synbit <yyyy> chkbit <cccc> segm.:<ssss> addr.:<aaaa>↲
┆19┆┄┆81┆┆82┆ exp.:<eeee> rec.:<rrrr>↲
┆a1┆↲
↲
The secondary text is interpreted like this :↲
↲
↲
<yyyy> ┆84┆is the syndrome bits that shoud indicate a one bit error ↓
┆19┆┆87┆┄┄correction.↲
<cccc> ┆84┆is the checkbits that was not written because diagnostic ↓
┆19┆┆87┆┄┄mode was selected.↲
<ssss> ┆84┆is the 64 K byte block number (1-FF).↲
<aaaa> is the offset within the block (0-FFFF).↲
<eeee> is the expected pattern, always 0000.↲
<rrrr> is the received pattern.↲
↲
↲
If no error occur then the pattern is shifted one position left ↓
until a carry and the test is repeated for every memory cell from ↓
the start address to the end address.↲
┆a1┆┆82┆↲
↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆20.8 Subtest 6 = ECC Error Detection Test.↲
↲
↲
Subtest 6 verifies the ability of the ECC hardware circiutry to ↓
detect double bit errors.↲
↲
↲
First the test resets all memory cells from the start address to ↓
the end address, and if unable to reset memory generates an error ↓
message like this.↲
↲
↲
1. ┆b0┆MEM 60X Test: Subtest: 6 - Could not reset RAM↲
↲
↲
If RAM is reset succesfully then the test proceeds and makes the ↓
start address EVEN aligned (decrement start address if ODD). Then ↓
a pattern equal to 0000000000000101 binary is written to the ↓
memory in diagnostic mode (writing of checkbits inhibited), the ↓
checkbits is read and saved for an eventually error message. The ↓
operating mode is restored and the data is read back. The ↓
syndrome bits are read and if they does'nt indicate a double ↓
error detection then an error message is written to the console.↲
↲
↲
2. ┆b0┆MEM 60X Test: Subtest: 6 - error detection error↲
┆b0┆ synbit <yyyy> chkbit <cccc> segm.:<ssss> addr.:<aaaa> ↲
┆19┆┄┆81┆┆82┆ exp.:<eeee> rec.:<rrrr>↲
┆a1┆↲
↲
The secondary text is interpreted like this :↲
↲
↲
<yyyy> ┆84┆is the syndrome bits that shoud indicate a double bit ↓
┆19┆┆87┆┄┄error detection↲
<cccc> ┆84┆is the checkbits that was not written because diagnostic ↓
┆19┆┆87┆┄┄mode was selected.↲
<ssss> ┆84┆is the 64 K byte block number (1-FF).↲
<aaaa> is the offset within the block (0-FFFF).↲
<eeee> is the expected pattern, always 0000.↲
<rrrr> is the received pattern.↲
↲
↲
If no error occur then the pattern is shifted one position left ↓
until a carry and the test is repeated for every memory cell from ↓
the start address to the end address.↲
┆a1┆┆82┆↓
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆21. ┆b0┆TEST 16┆f0┆ ┆f0┆= Floppy Test.↲
↲
↲
This is a ┆b0┆seperately ┆f0┆run test supplied to verify the ↓
┆19┆┄┆81┆┄functionality of the floppy disk drive, not the floppy media ↓
┆19┆┄┆81┆┄itself.↲
↲
↲
This test will, if not terminated before the end, verify every ↓
single sector on the floppy disc. The format of the floppy disc, ↓
which must be formatted properly prio to the test, is fixed and ↓
is.↲
↲
↲
╞ ╞ ╞ ┆84┆1024 bytes/sector.↲
╞ ╞ ╞ 8 sectors/track.↲
╞ ╞ ╞ 2 heads/cylinder.↲
╞ ╞ ╞ 77 cylinders/disk.↲
↲
↲
This test verifies the floppy drive sector for sector, beginning ↓
with sector 0 (head 0 track 0 sector 0). Before the sector is ↓
written the content of the sector is read to a save buffer, which ↓
is restored if no disk error occur. This makes the floppy test, ↓
if the floppy drives is ok, non media destructive. If the test ↓
cannot read a sector an error message is generated.↲
↲
↲
1. ┆b0┆Floppy test: Floppy can not read ╞ ╞ rec.:<rrrr>↲
↲
↲
<rrrr> is the error code from the disc controller. The OMTI Reference ↓
Manual (SDC 691) Appendix B gives the information about this ↓
error code.↲
↲
↲
If the disk controller does'nt respond to a disk's command within ↓
1 second an error message is generated.↲
↲
↲
2. ┆b0┆Floppy test: transfer timeout↲
↲
↲
If the first step went succesfull, then a pattern is written to ↓
the sector, and the disc controller may respond with an error ↓
which makes the test program write an error message.↲
↲
↲
3. ┆b0┆Floppy test: Floppy can not write ╞ ╞ rec.:<rrrr>↲
↲
↲
If no error has happend until now the sector is read back and ↓
compared to the original one, and if equal the test is repeated ↓
on the next sector until end of disk, otherwise an error message ↓
is generated.↲
↲
↲
┆8c┆┆83┆┆c8┆↓
4. ┆b0┆Floppy test: bad sector sector:<dddd>, segm.:<ssss>,↲
╞ ╞ ┆b0┆addr.:<aaaa>, exp.:<eeee>, rec.:<rrrr>↲
↲
↲
The secondary error text is interpreted like this :↲
↲
↲
<dddd> gives the address of the bad sector.↲
<ssss> ┆84┆is the segment LDT selector (use RC 39 Monitor to ↓
┆19┆┆87┆┄┄determine the physical address - XLDT <ssss>).↲
<aaaa> is the segment offset.↲
<eeee> is the expected pattern.↲
<rrrr> is the received pattern.↲
↲
↲
Otherwise. If an error of the disk controller or of the disk ↓
drive is discovered an error message like this is written to the ↓
console.↲
↲
↲
┆82┆5. ┆b0┆Floppy test: floppy command error↲
↲
↲
This error might be caused by malfunction of the disc, by a fault ↓
of the interface circuits , or by something else. ↲
↲
↲
If no error happens, then the floppy test writes a '.' (period) ↓
to the console output for every cylinder verified like this.↲
↲
↲
┆b0┆Floppy test: ........... and so on↲
↲
↲
The Floppy test is terminated by the escape button.↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆22.┆b0┆ TEST 17┆f0┆ = Printer Test.↲
↲
↲
A ┆b0┆seperately ┆f0┆run test is supplied to verify the functionality of ↓
┆19┆┄┆81┆┄the Centronix Printer Interface. The test writes a pattern to the ↓
┆19┆┄┆81┆┄printer like this:↲
↲
↲
╱04002d4e0c00060000000002014b314000000000000000000000000000000000000000000000000008101820283038404a4b555f69737dff04╱
╱04002d4e0a000600000000020141314000000000000000000000000000000000000000000000000008101820283038404b555f69737dffff04╱
↓
!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456↲
789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./012↲
3456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-.↲
/0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*↲
+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&↲
'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"↲
#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789↲
!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456↲
789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./012↲
3456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-.↲
/0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*↲
+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&↲
'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"↲
#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789!"#$%&'()*+,-./0123456789↲
↲
and so on.↲
╱04002d4e0a000600000000020141314000000000000000000000000000000000000000000000000008101820283038404a4b555f69737dff04╱
╱04002d4e0c00060000000002014b314000000000000000000000000000000000000000000000000008101820283038404a4b555f69737dff04╱
↓
↲
↲
The printer test is terminated by the escape button.↲
↲
↲
If the printer is'nt selected an error message is generated.↲
↲
↲
1. ┆b0┆Printer Test: printer not selected↲
↲
↲
If the does'nt respond to a character (STROBE signal) with an ↓
acknowledge interrupt then an error message is generated.↲
↲
↲
2. ┆b0┆Printer Test: missing interrupt↲
↲
↲
If the printer is busy for more than 1 minute an error message is ↓
generated.↲
↲
↲
3. ┆b0┆Printer Test: printer busy↲
↓
↓
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆22. ┆b0┆TEST 18┆f0┆ = Real Time Clock Adjustment Test.↲
↲
↲
This ┆b0┆seperately ┆f0┆test must execute during Real Time Clock ↓
┆19┆┄┆81┆┄adjustment. The RTC is programmed to generate interrupt every ↓
┆19┆┄┆81┆┄second, and this program must execute in order to resets the ↓
┆19┆┄┆81┆┄interrupt every second. The test is terminated by the <escape> ↓
┆19┆┄┆81┆┄button.↓
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆23. LED OUTPUT.↲
↲
↲
During the execution of selftest the LED named "TEST" connected ↓
to bit 1 on the 8255 PPI port C (I/O address CC hex.) is lit. If ↓
an error occur, except checksum error and initial RAM error, then ↓
the LED is made flashing. This LED is placed on the front of the ↓
RC 39 cabinet.↲
════════════════════════════════════════════════════════════════════════
↓
↲
════════════════════════════════════════════════════════════════════════
↓
┆a1┆┆b0┆A. REFERENCES↲
↲
↲
RC 39 Selftest Concept, User's manual ╞ RCSL. 991 10092↲
↲
RC 3931 ETC611 hardware selftest, User's manual RCSL. 991 10096↲
↲
F641 COM 601 hardware selftest, User's manual RCSL. 991 10097↲
↲
ITC 602 hardware selftest, User's manual╞ RCSL. 991 10095↲
┆a1┆↲
RC39 monitor 8086 version, Reference manual╞ RCSL. 991 10134↲
↲
RC39 monitor 80286 version, Reference manual RCSL. 991 10093↲
↲
RC 3902 (CPU 691) hardware selftest, User's man. RCSL. 991 10094↲
↲
MEM 602, MEM 603 General Information╞ ╞ RCSL. 991 10083↲
↲
MEM 602, MEM 603 Technical Description╞ ╞ RCSL. 991 10084↲
════════════════════════════════════════════════════════════════════════
↓
╱04002d4e0c000600000000020150314000000000000000000000000000000000000000000000000008101820283038404a4b555f69737dff04╱
╱04002d4e0a000600000000020141314000000000000000000000000000000000000000000000000008101820283038404a4b555f69737dff04╱
↓
┆a1┆┆b0┆B. ┆a1┆COMPLETE ERROR LIST↲
↲
↲
!-----------------------------------------------------------------------------!↲
! Err. No !╞ ╞ ╞ ╞ Error Text ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
! 0 ! OK╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 1 ! Checksum Test: sum error ╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 2╞ ! Initial Memory Test: RAM error╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 2╞ ! RAM Test: RAM error╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 5 ! PPI test: port error ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 6 ! PIT test: missing timer 0 interrupt╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 11 ! RS 422 test: RS422 Clear to Send error╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 12 ! RS 422 test: data error╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 13 ! RS 422 test: transfer timeout ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 14 ! RS 422 test: parity interrupt error╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
┆8c┆┆83┆┆b8┆↓
!-----------------------------------------------------------------------------!↲
! 15 ! Printer Test: missing interrupt╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 16 ! Printer Test: printer not selected╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------;↲
! 17 ! Printer Test: printer busy╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 20 ! MEM 60X Test: Subtest: n - RAM error╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 21 ! MEM 60X Test: Subtest: n - Could not reset RAM !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 22 ! MEM 60X Test: Subtest: 5 - data correction error ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 23 ! MEM 60X Test: Subtest: 6 - error detection error ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 25 ! IO interrupt test: missing interrupt╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 26 ! IO interrupt test: cannot reset interrupt╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 27 ! Timeout interrupt test: missing interrupt╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 28 ! Timeout interrupt test: cannot reset interrupt╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 30 ! RTC test: I Think it is: status error╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
════════════════════════════════════════════════════════════════════════
↓
↲
↲
!-----------------------------------------------------------------------------!↲
! 31 ! RTC test: i Think it is: read error╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 40 ! Disc Channel test: transfer timeout or interrupt missing╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 41 ! Disc Channel test: disc diagnostic error╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 42 ! Disc Channel test: disc command error╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 43 ! Disc Channel test: disc channel error╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 45 ! MB out interrupt test: missing interrupt╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 46 ! MB out interrupt test: cannot reset interrupt ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 50 ! 80287 NPX test: 80287 not OK ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 60 ! Winchester disk test: transfer timeout or interrupt missing !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 61 ! Winchester disk test: disk command error ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 62 ! Winchester disk test: Winchester disk can not read !↲
!-----------------------------------------------------------------------------!↲
↲
↲
┆8c┆┆83┆┆c8┆↓
!-----------------------------------------------------------------------------!↲
! 63 ! Winchester disk test: Winchester disk can not write ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 64 ! Winchester disk test: bad test sector╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 80 ! Floppy test: transfer timeout╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 81 ! Floppy test: floppy command error ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 82 ! Floppy test: floppy can not read !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 83 ! Floppy test: floppy can not write ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
↲
↲
!-----------------------------------------------------------------------------!↲
! 84 ! Floppy test: bad sector╞ ╞ ╞ ╞ ╞ ╞ !↲
!-----------------------------------------------------------------------------!↲
════════════════════════════════════════════════════════════════════════
↓
↲
↓
↓
↓
↓
↓
↓
┆1a┆┆1a┆-----------------------------------------------------------------------------------------!↲
! 15 ! Printer Test
0x0000…0020 (0,) 00 00 00 00 00 00 00 00 42 03 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 4e 00 00 00 ┆ B N ┆
0x0020…0040 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ ┆
0x0040…0047 00 00 00 00 00 00 00 ┆ ┆
0x0047…0080 Params {
0x0047…0080 04 00 2d 4e 0a 00 06 00 00 00 00 02 01 41 31 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N A1 ┆
0x0047…0080 00 00 00 00 00 00 00 00 05 0f 19 23 2d 37 41 4b 55 5f 69 73 7d 87 91 ff 04 ┆ #-7AKU_iså ┆
0x0047…0080 }
0x0080…00a0 06 69 0d 0a 0d 0a 0d 0a a1 54 41 42 4c 45 20 4f 46 20 43 4f 4e 54 45 4e 54 53 09 09 09 20 20 20 ┆ i TABLE OF CONTENTS ┆
0x00a0…00c0 20 20 05 50 41 47 45 20 20 0d 0a 0d 0a 0d 0a 31 2e 20 20 49 4e 54 52 4f 44 55 43 54 49 4f 4e 20 ┆ PAGE 1. INTRODUCTION ┆
0x00c0…00e0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆................................┆
0x00e0…0100 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 20 31 0d 0a 0d 0a 0d 0a 32 2e 20 20 54 48 45 20 42 41 ┆......... 1 2. THE BA┆
0x0100…0120 55 44 20 52 41 54 45 20 44 45 54 45 52 4d 49 4e 41 54 49 4f 4e 20 4d 4f 44 45 20 2e 2e 2e 2e 2e ┆UD RATE DETERMINATION MODE .....┆
0x0120…0140 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 09 32 0d 0a 0d 0a 0d 0a 33 2e 20 20 54 48 45 20 ┆................ 2 3. THE ┆
0x0140…0160 49 4e 49 54 49 41 4c 20 4d 45 4d 4f 52 59 20 54 45 53 54 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆INITIAL MEMORY TEST ............┆
0x0160…0180 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 20 33 0d 0a 20 20 20 20 33 ┆.................. 3 3┆
0x0180…01a0 2e 32 20 49 6e 69 74 69 61 6c 20 52 41 4d 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆.2 Initial RAM Test ............┆
0x01a0…01c0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 20 33 0d 0a 20 20 ┆..................... 3 ┆
0x01c0…01e0 20 20 20 20 20 20 33 2e 32 2e 31 20 4d 65 6d 6f 72 79 20 54 65 73 74 20 46 6c 6f 77 20 2e 2e 2e ┆ 3.2.1 Memory Test Flow ...┆
0x01e0…0200 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 20 33 0d ┆........................ 3 ┆
0x0200…0220 (1,) 0a 20 20 20 20 20 20 20 20 33 2e 32 2e 32 20 4c 6f 6f 70 20 4f 6e 20 45 72 72 6f 72 20 2e 2e 2e ┆ 3.2.2 Loop On Error ...┆
0x0220…0240 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 ┆........................... ┆
0x0240…0260 20 34 0d 0a 0d 0a 0d 0a 34 2e 20 20 49 4e 54 45 52 52 55 50 54 20 48 41 4e 44 4c 49 4e 47 20 41 ┆ 4 4. INTERRUPT HANDLING A┆
0x0260…0280 4e 44 20 50 56 41 4d 20 53 57 49 54 43 48 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ND PVAM SWITCH .................┆
0x0280…02a0 2e 2e 20 20 20 20 20 20 35 0d 0a 20 20 20 20 34 2e 31 20 56 61 6c 69 64 20 49 6e 74 65 72 72 75 ┆.. 5 4.1 Valid Interru┆
0x02a0…02c0 70 74 73 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆pts ............................┆
0x02c0…02e0 2e 2e 2e 2e 2e 09 35 0d 0a 09 34 2e 32 20 50 72 6f 74 65 63 74 69 6f 6e 20 56 69 6f 6c 61 74 69 ┆..... 5 4.2 Protection Violati┆
0x02e0…0300 6f 6e 73 20 61 6e 64 20 49 6e 73 74 72 75 63 74 69 6f 6e 20 45 78 65 70 74 69 6f 6e 73 20 2e 2e ┆ons and Instruction Exeptions ..┆
0x0300…0320 09 35 0d 0a 0d 0a 20 20 20 20 0d 0a 35 2e 20 20 54 45 53 54 20 30 20 3d 20 52 41 4d 20 74 65 73 ┆ 5 5. TEST 0 = RAM tes┆
0x0320…0340 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆t ..............................┆
0x0340…0360 2e 2e 2e 2e 2e 2e 20 20 20 20 20 20 37 0d 0a 0d 0a 0d 0a 36 2e 20 20 54 45 53 54 20 31 20 3d 20 ┆...... 7 6. TEST 1 = ┆
0x0360…0380 43 68 69 70 20 53 65 6c 65 63 74 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆Chip Select Test ...............┆
0x0380…03a0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 20 39 0d 0a 0d 0a 0d 0a 37 2e 20 20 54 45 ┆............. 9 7. TE┆
0x03a0…03c0 53 54 20 32 20 3d 20 38 32 35 34 20 50 72 6f 67 72 61 6d 6d 61 62 6c 65 20 49 6e 74 65 72 76 61 ┆ST 2 = 8254 Programmable Interva┆
0x03c0…03e0 6c 20 54 69 6d 65 72 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 31 30 0d 0a 0d 0a 0d ┆l Timer Test ....... 10 ┆
0x03e0…0400 0a 38 2e 20 20 54 45 53 54 20 33 20 3d 20 50 65 72 73 6f 6e 61 6c 69 74 79 20 50 52 4f 4d 20 54 ┆ 8. TEST 3 = Personality PROM T┆
0x0400…0420 (2,) 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 ┆est ....................... ┆
0x0420…0440 31 31 0d 0a 0d 0a 0d 0a 39 2e 20 20 54 45 53 54 20 34 20 3d 20 52 53 20 34 32 32 20 54 65 73 74 ┆11 9. TEST 4 = RS 422 Test┆
0x0440…0460 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ ...............................┆
0x0460…0480 2e 2e 20 20 20 20 20 31 32 0d 0a 0d 0a 0d 0a 31 30 2e 20 54 45 53 54 20 35 20 3d 20 52 65 61 6c ┆.. 12 10. TEST 5 = Real┆
0x0480…04a0 20 54 69 6d 65 20 43 6c 6f 63 6b 20 28 52 54 43 29 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ Time Clock (RTC) Test .........┆
0x04a0…04c0 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 31 33 0d 0a 0d 0a 0d 0a 31 31 2e 20 54 45 53 54 20 36 ┆......... 13 11. TEST 6┆
0x04c0…04e0 20 3d 20 54 69 6d 65 6f 75 74 20 49 6e 74 65 72 72 75 70 74 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e ┆ = Timeout Interrupt Test ......┆
0x04e0…0500 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 20 31 34 0d 0a 0d 0a 0d 0a 31 32 2e ┆................ 14 12.┆
0x0500…0520 20 54 45 53 54 20 37 20 3d 20 49 2f 4f 20 49 6e 74 65 72 72 75 70 74 20 54 65 73 74 20 2e 2e 2e ┆ TEST 7 = I/O Interrupt Test ...┆
0x0520…0540 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 31 35 0d 0a ┆........................ 15 ┆
0x0540…0560 0d 0a 0d 0a 31 33 2e 20 54 45 53 54 20 38 20 3d 20 4e 75 6d 65 72 69 63 20 50 72 6f 63 65 73 73 ┆ 13. TEST 8 = Numeric Process┆
0x0560…0580 6f 72 20 45 78 74 65 6e 73 69 6f 6e 20 54 65 73 74 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 ┆or Extension Test.............. ┆
0x0580…05a0 20 20 20 31 36 0d 0a 0d 0a 0d 0a 31 34 2e 20 54 45 53 54 20 39 20 3d 20 44 69 73 63 20 43 68 61 ┆ 16 14. TEST 9 = Disc Cha┆
0x05a0…05c0 6e 6e 65 6c 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆nnel Test ......................┆
0x05c0…05e0 2e 2e 2e 2e 2e 2e 20 20 20 20 31 37 0d 0a 0d 0a 0d 0a 31 35 2e 20 54 45 53 54 20 31 30 20 3d 20 ┆...... 17 15. TEST 10 = ┆
0x05e0…0600 57 69 6e 63 68 65 73 74 65 72 20 44 69 73 63 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆Winchester Disc Test ...........┆
0x0600…0615 (3,) 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 31 38 0d 0a ┆............. 18 ┆
0x0615…0618 FormFeed {
0x0615…0618 0c 83 b0 ┆ ┆
0x0615…0618 }
0x0618…0620 0a a1 54 41 42 4c 45 20 ┆ TABLE ┆
0x0620…0640 4f 46 20 43 4f 4e 54 45 4e 54 53 20 28 63 6f 6e 74 69 6e 75 65 64 29 20 20 20 20 20 20 20 20 20 ┆OF CONTENTS (continued) ┆
0x0640…0660 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 50 41 47 45 0d 0a 0d 0a 31 36 ┆ PAGE 16┆
0x0660…0680 2e 20 54 45 53 54 20 31 31 20 3d 20 4d 75 6c 74 69 62 75 73 20 43 6f 6e 66 69 67 75 72 61 74 69 ┆. TEST 11 = Multibus Configurati┆
0x0680…06a0 6f 6e 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 32 30 0d ┆on ...................... 20 ┆
0x06a0…06c0 0a 0d 0a 0d 0a 31 37 2e 20 54 45 53 54 20 31 32 20 3d 20 50 61 72 61 6c 6c 65 6c 20 50 6f 72 74 ┆ 17. TEST 12 = Parallel Port┆
0x06c0…06e0 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ Test ..........................┆
0x06e0…0700 20 20 20 20 32 32 0d 0a 0d 0a 0d 0a 31 38 2e 20 54 45 53 54 20 31 33 20 3d 20 4d 75 6c 74 69 62 ┆ 22 18. TEST 13 = Multib┆
0x0700…0720 75 73 20 4f 75 74 20 49 6e 74 65 72 72 75 70 74 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆us Out Interrupt Test ..........┆
0x0720…0740 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 32 33 0d 0a 0d 0a 0d 0a 31 39 2e 20 54 45 53 54 20 31 34 20 3d ┆....... 23 19. TEST 14 =┆
0x0740…0760 20 52 65 61 6c 20 54 69 6d 65 20 43 6c 6f 63 6b 20 28 52 54 43 29 20 50 72 6f 67 72 61 6d 6d 69 ┆ Real Time Clock (RTC) Programmi┆
0x0760…0780 6e 67 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 20 20 20 20 32 34 0d 0a 0d 0a 0d 0a 32 30 2e 20 54 45 ┆ng Test ...... 24 20. TE┆
0x0780…07a0 53 54 20 31 35 20 3d 20 45 78 74 65 6e 64 65 64 20 52 41 4d 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e ┆ST 15 = Extended RAM Test ......┆
0x07a0…07c0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 32 35 0d 0a 20 20 20 ┆..................... 25 ┆
0x07c0…07e0 20 32 30 2e 31 20 54 65 73 74 20 56 61 72 69 61 62 6c 65 73 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ 20.1 Test Variables ...........┆
0x07e0…0800 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 32 35 0d 0a ┆........................ 25 ┆
0x0800…0820 (4,) 20 20 20 20 20 20 20 20 20 32 30 2e 31 2e 31 20 4f 70 65 72 61 74 69 6e 67 20 4d 6f 64 65 20 2e ┆ 20.1.1 Operating Mode .┆
0x0820…0840 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 32 ┆........................... 2┆
0x0840…0860 36 0d 0a 20 20 20 20 20 20 20 20 20 32 30 2e 31 2e 32 20 41 64 64 72 65 73 73 20 52 61 6e 67 65 ┆6 20.1.2 Address Range┆
0x0860…0880 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 ┆ ............................. ┆
0x0880…08a0 20 20 32 36 0d 0a 20 20 20 20 20 20 20 20 20 32 30 2e 31 2e 33 20 43 68 61 6e 67 65 20 50 61 74 ┆ 26 20.1.3 Change Pat┆
0x08a0…08c0 74 65 72 6e 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆tern ...........................┆
0x08c0…08e0 2e 20 20 20 20 32 36 0d 0a 20 20 20 20 20 20 20 20 20 32 30 2e 31 2e 34 20 45 78 65 63 75 74 65 ┆. 26 20.1.4 Execute┆
0x08e0…0900 20 53 75 62 74 65 73 74 20 41 6c 6f 6e 65 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆ Subtest Alone .................┆
0x0900…0920 2e 2e 2e 2e 20 20 20 20 32 36 0d 0a 20 20 20 20 20 20 20 20 20 32 30 2e 31 2e 35 20 42 75 73 20 ┆.... 26 20.1.5 Bus ┆
0x0920…0940 4c 4f 43 4b 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆LOCK ...........................┆
0x0940…0960 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 32 36 0d 0a 20 20 20 20 20 20 20 20 20 32 30 2e 31 2e 36 20 42 ┆....... 26 20.1.6 B┆
0x0960…0980 55 53 20 53 65 6c 65 63 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆US Select ......................┆
0x0980…09a0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 32 36 0d 0a 20 20 20 20 32 30 2e 32 20 53 75 62 74 65 ┆.......... 26 20.2 Subte┆
0x09a0…09c0 73 74 20 30 20 3d 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 2d 20 57 4f 52 44 20 6d 6f 64 65 2c ┆st 0 = Pattern test - WORD mode,┆
0x09c0…09e0 20 45 56 45 4e 20 41 6c 69 67 6e 6d 2e 20 20 20 20 32 37 0d 0a 20 20 20 20 32 30 2e 33 20 53 75 ┆ EVEN Alignm. 27 20.3 Su┆
0x09e0…0a00 62 74 65 73 74 20 31 20 3d 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 2d 20 57 4f 52 44 20 6d 6f ┆btest 1 = Pattern test - WORD mo┆
0x0a00…0a20 (5,) 64 65 2c 20 4f 44 44 20 41 6c 69 67 6e 6d 2e 20 20 20 20 20 32 37 0d 0a 20 20 20 20 32 30 2e 34 ┆de, ODD Alignm. 27 20.4┆
0x0a20…0a40 20 53 75 62 74 65 73 74 20 32 20 3d 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 2d 20 42 59 54 45 ┆ Subtest 2 = Pattern test - BYTE┆
0x0a40…0a60 20 6d 6f 64 65 2c 20 41 4c 4c 20 62 79 74 65 73 20 2e 2e 20 20 20 20 32 37 0d 0a 20 20 20 20 32 ┆ mode, ALL bytes .. 27 2┆
0x0a60…0a80 30 2e 35 20 53 75 62 74 65 73 74 20 33 20 3d 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 2d 20 42 ┆0.5 Subtest 3 = Pattern test - B┆
0x0a80…0aa0 59 54 45 20 6d 6f 64 65 2c 20 45 56 45 4e 20 62 79 74 65 73 20 6f 6e 6c 79 20 32 38 0d 0a 20 20 ┆YTE mode, EVEN bytes only 28 ┆
0x0aa0…0ac0 20 20 32 30 2e 36 20 53 75 62 74 65 73 74 20 34 20 3d 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 ┆ 20.6 Subtest 4 = Pattern test ┆
0x0ac0…0ae0 2d 20 42 59 54 45 20 6d 6f 64 65 2c 20 4f 44 44 20 62 79 74 65 73 20 6f 6e 6c 79 20 20 32 38 0d ┆- BYTE mode, ODD bytes only 28 ┆
0x0ae0…0b00 0a 20 20 20 20 32 30 2e 37 20 53 75 62 74 65 73 74 20 35 20 3d 20 45 43 43 20 45 72 72 6f 72 20 ┆ 20.7 Subtest 5 = ECC Error ┆
0x0b00…0b20 43 6f 72 72 65 63 74 69 6f 6e 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 ┆Correction Test ............ ┆
0x0b20…0b40 32 39 0d 0a 20 20 20 20 32 30 2e 38 20 53 75 62 74 65 73 74 20 36 20 3d 20 45 43 43 20 45 72 72 ┆29 20.8 Subtest 6 = ECC Err┆
0x0b40…0b60 6f 72 20 44 65 74 65 63 74 69 6f 6e 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 ┆or Detection Test ............. ┆
0x0b60…0b80 20 20 20 33 30 0d 0a 0d 0a 0d 0a 32 31 2e 20 54 45 53 54 20 31 36 20 3d 20 46 6c 6f 70 70 79 20 ┆ 30 21. TEST 16 = Floppy ┆
0x0b80…0ba0 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆Test ...........................┆
0x0ba0…0bc0 2e 2e 2e 2e 2e 2e 20 20 20 20 33 31 0d 0a 0d 0a 0d 0a 32 32 2e 20 54 45 53 54 20 31 37 20 3d 20 ┆...... 31 22. TEST 17 = ┆
0x0bc0…0be0 50 72 69 6e 74 65 72 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆Printer Test ...................┆
0x0be0…0c00 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 33 33 0d 0a 0d 0a 0d 0a 32 33 2e 20 54 45 53 ┆............. 33 23. TES┆
0x0c00…0c20 (6,) 54 20 31 38 20 3d 20 52 65 61 6c 20 54 69 6d 65 20 43 6c 6f 63 6b 20 41 64 6a 75 73 74 6d 65 6e ┆T 18 = Real Time Clock Adjustmen┆
0x0c20…0c40 74 20 54 65 73 74 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 33 34 0d 0a 0d 0a 0d 0a ┆t Test ............. 34 ┆
0x0c40…0c60 32 34 2e 20 4c 45 44 20 4f 55 54 50 55 54 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆24. LED OUTPUT .................┆
0x0c60…0c80 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 33 ┆........................... 3┆
0x0c80…0ca0 35 0d 0a 0d 0a 0d 0a 41 50 50 45 4e 44 49 43 45 53 3a 0d 0a 0d 0a 41 2e 20 52 45 46 45 52 45 4e ┆5 APPENDICES: A. REFEREN┆
0x0ca0…0cc0 43 45 53 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆CES ............................┆
0x0cc0…0ce0 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 33 37 0d 0a 0d 0a 0d 0a 42 2e 20 ┆................. 37 B. ┆
0x0ce0…0d00 43 4f 4d 50 4c 45 54 45 20 45 52 52 4f 52 20 4c 49 53 54 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e ┆COMPLETE ERROR LIST ............┆
0x0d00…0d20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 20 20 33 38 0d 0a ┆........................ 38 ┆
0x0d20…0d22 0d 0a ┆ ┆
0x0d22…0d25 FormFeed {
0x0d22…0d25 0c 83 90 ┆ ┆
0x0d22…0d25 }
0x0d25…0d40 0a 14 b3 09 09 09 09 0b a1 0d 0a a1 a1 b0 31 2e 20 49 4e 54 52 4f 44 55 43 54 49 ┆ 1. INTRODUCTI┆
0x0d40…0d60 4f 4e 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 43 50 55 20 36 31 30 20 69 73 20 61 6e 20 52 43 20 69 41 ┆ON. The CPU 610 is an RC iA┆
0x0d60…0d80 50 58 20 32 38 36 20 70 72 6f 63 65 73 73 6f 72 20 62 61 73 65 64 20 62 6f 61 72 64 2c 20 75 73 ┆PX 286 processor based board, us┆
0x0d80…0da0 65 64 20 61 73 20 74 68 65 20 0a 6d 61 69 6e 20 43 50 55 20 69 6e 20 52 43 20 33 39 20 70 72 6f ┆ed as the main CPU in RC 39 pro┆
0x0da0…0dc0 64 75 63 74 73 2e 20 54 68 65 20 43 50 55 20 36 31 30 20 72 65 70 6c 61 63 65 73 20 61 6e 20 49 ┆ducts. The CPU 610 replaces an I┆
0x0dc0…0de0 4e 54 45 4c 20 0a 4d 61 6e 75 66 61 63 74 75 72 65 64 20 62 6f 61 72 64 20 63 61 6c 6c 65 64 20 ┆NTEL Manufactured board called ┆
0x0de0…0e00 43 50 55 20 36 39 31 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 6d 61 6e 75 61 6c 20 61 73 73 75 6d 65 ┆CPU 691. This manual assume┆
0x0e00…0e20 (7,) 73 20 74 68 65 20 72 65 61 64 65 72 20 69 73 20 66 61 6d 69 6c 69 61 72 20 77 69 74 68 20 74 68 ┆s the reader is familiar with th┆
0x0e20…0e40 65 20 52 43 20 33 39 20 0a 73 65 6c 66 74 65 73 74 20 63 6f 6e 63 65 70 74 20 61 73 20 64 65 73 ┆e RC 39 selftest concept as des┆
0x0e40…0e60 63 72 69 62 65 64 20 69 6e 20 74 68 65 20 6d 61 6e 75 61 6c 20 63 61 6c 6c 65 64 20 22 54 68 65 ┆cribed in the manual called "The┆
0x0e60…0e80 20 52 43 20 33 39 20 0a 53 65 6c 66 74 65 73 74 20 43 6f 6e 63 65 70 74 22 2e 20 54 68 65 20 43 ┆ RC 39 Selftest Concept". The C┆
0x0e80…0ea0 50 55 20 36 31 30 20 73 65 6c 66 74 65 73 74 20 69 6e 63 6c 75 64 65 73 20 31 39 20 64 69 66 66 ┆PU 610 selftest includes 19 diff┆
0x0ea0…0ec0 65 72 65 6e 74 20 0a 74 65 73 74 73 20 77 68 69 63 68 20 6d 61 79 20 62 65 20 72 75 6e 20 69 6e ┆erent tests which may be run in┆
0x0ec0…0ee0 20 73 65 76 65 72 61 6c 20 6d 6f 64 65 73 2e 20 54 77 65 6c 77 65 20 6f 66 20 74 68 65 73 65 20 ┆ several modes. Twelwe of these ┆
0x0ee0…0f00 74 65 73 74 73 20 0a 61 72 65 20 b0 64 65 66 61 75 6c 74 f0 20 74 65 73 74 73 20 77 68 69 63 68 ┆tests are default tests which┆
0x0f00…0f20 20 61 6c 6c 77 61 79 73 20 65 78 65 63 75 74 65 20 61 66 74 65 72 20 61 20 70 6f 77 65 72 20 6f ┆ allways execute after a power o┆
0x0f20…0f40 6e 2e 20 4f 6e 65 20 0a 19 80 81 80 74 65 73 74 20 69 73 20 61 6e 20 b0 65 78 74 65 6e 64 65 64 ┆n. One test is an extended┆
0x0f40…0f60 b0 f0 20 74 65 73 74 20 77 68 69 63 68 20 6d 61 79 20 62 65 20 61 70 70 65 6e 64 65 64 20 74 6f ┆ test which may be appended to┆
0x0f60…0f80 20 74 68 65 20 64 65 66 61 75 6c 74 20 73 65 74 20 0a 19 80 83 80 77 68 65 6e 20 72 65 71 75 65 ┆ the default set when reque┆
0x0f80…0fa0 73 74 65 64 20 65 78 70 6c 69 63 69 74 20 62 79 20 61 6e 20 6f 70 65 72 61 74 6f 72 2e 20 54 68 ┆sted explicit by an operator. Th┆
0x0fa0…0fc0 65 20 6c 61 73 74 20 73 69 78 20 74 65 73 74 73 20 61 72 65 20 0a 19 80 83 80 b0 73 65 70 65 72 ┆e last six tests are seper┆
0x0fc0…0fe0 61 74 65 b0 6c f0 b0 79 f0 20 72 75 6e 20 74 65 73 74 73 2c 20 77 68 69 63 68 20 6d 61 79 20 65 ┆ate l y run tests, which may e┆
0x0fe0…1000 61 63 68 20 62 65 20 72 65 71 75 65 73 74 65 64 20 74 6f 20 65 78 65 63 75 74 65 20 61 73 20 0a ┆ach be requested to execute as ┆
0x1000…101b (8,) 19 80 86 80 73 74 61 6e 64 20 61 6c 6f 6e 65 20 70 72 6f 67 72 61 6d 73 2e 0d 0a ┆ stand alone programs. ┆
0x101b…101e FormFeed {
0x101b…101e 0c 81 88 ┆ ┆
0x101b…101e }
0x101e…1020 0a a1 ┆ ┆
0x1020…1040 a1 a1 b0 32 2e 20 54 48 45 20 42 41 55 44 20 52 41 54 45 20 a1 44 45 54 45 52 4d 49 4e 41 54 49 ┆ 2. THE BAUD RATE DETERMINATI┆
0x1040…1060 4f 4e 20 4d 4f 44 45 2e 0d 0a 0d 0a 0d 0a 49 66 20 61 20 74 65 72 6d 69 6e 61 6c 20 69 73 20 63 ┆ON MODE. If a terminal is c┆
0x1060…1080 6f 6e 6e 65 63 74 65 64 20 74 6f 20 74 68 65 20 56 2e 32 34 20 6c 69 6e 65 20 31 20 69 6e 74 65 ┆onnected to the V.24 line 1 inte┆
0x1080…10a0 72 66 61 63 65 20 28 44 53 52 20 0a 61 63 74 69 76 29 20 74 68 65 6e 20 74 68 65 20 73 65 6c 66 ┆rface (DSR activ) then the self┆
0x10a0…10c0 74 65 73 74 20 65 6e 74 65 72 73 20 74 68 65 20 61 75 74 6f 6d 61 74 69 63 20 42 61 75 64 20 52 ┆test enters the automatic Baud R┆
0x10c0…10e0 61 74 65 20 0a 44 65 74 65 72 6d 69 6e 61 74 69 6f 6e 20 6d 6f 64 65 2e 20 54 68 65 20 55 53 41 ┆ate Determination mode. The USA┆
0x10e0…1100 52 54 20 69 73 20 69 6e 69 74 69 61 6c 69 7a 65 64 20 74 6f 20 39 36 30 30 20 42 61 75 64 20 61 ┆RT is initialized to 9600 Baud a┆
0x1100…1120 6e 64 20 0a 73 74 61 72 73 20 28 2a 2a 2a 2a 2a 29 20 61 72 65 20 77 72 69 74 74 65 6e 20 74 6f ┆nd stars (*****) are written to┆
0x1120…1140 20 6c 69 6e 65 20 31 2e 20 54 68 65 73 65 20 73 74 61 72 73 20 6d 61 79 20 62 65 20 73 65 65 6e ┆ line 1. These stars may be seen┆
0x1140…1160 20 61 73 20 0a 73 74 61 72 73 2c 20 6f 74 68 65 72 20 6d 69 78 65 64 20 63 68 61 72 61 63 74 65 ┆ as stars, other mixed characte┆
0x1160…1180 72 73 20 6f 72 20 6e 6f 74 20 73 65 65 6e 20 61 74 20 61 6c 6c 20 64 65 70 65 6e 64 69 6e 67 20 ┆rs or not seen at all depending ┆
0x1180…11a0 6f 6e 20 74 68 65 20 0a 42 61 75 64 20 52 61 74 65 20 6f 66 20 74 68 65 20 61 74 74 61 63 68 65 ┆on the Baud Rate of the attache┆
0x11a0…11c0 64 20 63 6f 6e 73 6f 6c 65 2e 20 54 68 65 20 73 65 6c 66 74 65 73 74 20 77 61 69 74 73 20 66 6f ┆d console. The selftest waits fo┆
0x11c0…11e0 72 20 74 68 65 20 0a 6f 70 65 72 61 74 6f 72 20 74 6f 20 65 6e 74 65 72 20 6f 6e 65 20 6f 72 20 ┆r the operator to enter one or ┆
0x11e0…1200 74 77 6f 20 75 70 70 65 72 20 63 61 73 65 20 55 2e 20 4f 6e 65 20 75 70 70 65 72 20 63 61 73 65 ┆two upper case U. One upper case┆
0x1200…1220 (9,) 20 55 20 69 73 20 0a 65 6e 6f 75 67 68 20 69 66 20 74 68 65 20 42 61 75 64 20 52 61 74 65 20 69 ┆ U is enough if the Baud Rate i┆
0x1220…1240 73 20 39 36 30 30 2c 20 34 38 30 30 20 6f 72 20 32 34 30 30 20 42 61 75 64 2e 20 42 61 75 64 20 ┆s 9600, 4800 or 2400 Baud. Baud ┆
0x1240…1260 52 61 74 65 73 20 6f 66 20 0a 31 32 30 30 2c 20 36 30 30 20 6f 72 20 33 30 30 20 72 65 71 75 69 ┆Rates of 1200, 600 or 300 requi┆
0x1260…1276 72 65 73 20 74 77 6f 20 75 70 70 65 72 20 63 61 73 65 20 55 2e 0a ┆res two upper case U. ┆
0x1276…1279 FormFeed {
0x1276…1279 0c 80 e0 ┆ ┆
0x1276…1279 }
0x1279…1280 0a b0 a1 33 2e 20 54 ┆ 3. T┆
0x1280…12a0 48 45 20 49 4e 49 54 49 41 4c 20 4d 45 4d 4f 52 59 20 54 45 53 54 2e 0d 0a 0d 0a 0d 0a 41 66 74 ┆HE INITIAL MEMORY TEST. Aft┆
0x12a0…12c0 65 72 20 61 20 70 6f 77 65 72 20 6f 6e 20 74 68 65 20 73 65 6c 66 74 65 73 74 20 61 74 20 66 69 ┆er a power on the selftest at fi┆
0x12c0…12e0 72 73 74 20 69 6e 69 74 69 61 6c 69 7a 65 73 20 74 68 65 20 70 65 72 69 70 68 65 72 61 6c 20 0a ┆rst initializes the peripheral ┆
0x12e0…1300 64 65 76 69 63 65 73 2c 20 61 6e 64 20 74 68 65 6e 20 65 6e 74 65 72 73 20 74 68 65 20 69 6e 69 ┆devices, and then enters the ini┆
0x1300…1320 74 69 61 6c 20 6d 65 6d 6f 72 79 20 74 65 73 74 2e 20 54 68 69 73 20 76 65 72 79 20 66 69 72 73 ┆tial memory test. This very firs┆
0x1320…1340 74 20 0a 70 61 72 74 20 6f 66 20 74 68 65 20 73 65 6c 66 74 65 73 74 20 65 78 65 63 75 74 65 73 ┆t part of the selftest executes┆
0x1340…1360 20 69 6e 20 38 30 38 36 20 6d 6f 64 65 20 77 69 74 68 20 69 6e 74 65 72 72 75 70 74 73 20 0a 64 ┆ in 8086 mode with interrupts d┆
0x1360…1380 69 73 61 62 65 6c 65 64 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 69 6e 69 74 69 61 6c 20 6d 65 6d 6f 72 ┆isabeled. The initial memor┆
0x1380…13a0 79 20 74 65 73 74 20 6f 66 20 74 68 65 20 43 50 55 20 36 31 30 20 53 42 43 20 73 65 6c 66 74 65 ┆y test of the CPU 610 SBC selfte┆
0x13a0…13c0 73 74 20 63 6f 6e 73 69 73 74 73 20 6f 66 20 0a 74 77 6f 20 70 61 72 74 73 2c 20 61 20 50 52 4f ┆st consists of two parts, a PRO┆
0x13c0…13e0 4d 20 63 68 65 63 6b 73 75 6d 20 74 65 73 74 20 61 6e 64 20 61 20 52 41 4d 20 6d 65 6d 6f 72 79 ┆M checksum test and a RAM memory┆
0x13e0…1400 20 74 65 73 74 2e 20 54 68 65 20 0a 63 6f 6e 74 65 6e 74 73 20 6f 66 20 62 6f 74 68 20 74 68 65 ┆ test. The contents of both the┆
0x1400…1420 (10,) 20 6f 64 64 20 61 6e 64 20 74 68 65 20 65 76 65 6e 20 50 52 4f 4d 27 73 20 61 72 65 20 73 75 6d ┆ odd and the even PROM's are sum┆
0x1420…1440 6d 61 72 69 7a 65 64 20 0a 65 77 69 73 65 20 61 6e 64 20 74 68 65 20 72 65 73 75 6c 74 20 6d 75 ┆marized ewise and the result mu┆
0x1440…1460 73 74 20 62 65 20 61 20 7a 65 72 6f 2e 20 46 6f 72 20 74 68 61 74 20 72 65 61 73 6f 6e 20 74 68 ┆st be a zero. For that reason th┆
0x1460…1480 65 20 0a 50 52 4f 4d 27 73 20 63 6f 6e 74 61 69 6e 20 61 20 63 6f 6d 70 65 6e 73 61 74 69 6f 6e ┆e PROM's contain a compensation┆
0x1480…14a0 20 62 79 74 65 20 77 68 69 63 68 20 69 73 20 75 73 65 64 20 74 6f 20 62 72 69 6e 67 20 74 68 65 ┆ byte which is used to bring the┆
0x14a0…14c0 20 73 75 6d 20 0a 74 6f 20 7a 65 72 6f 2e 20 54 68 65 20 63 68 65 63 6b 73 75 6d 20 74 65 73 74 ┆ sum to zero. The checksum test┆
0x14c0…14e0 20 6d 61 79 20 70 72 6f 64 75 63 65 20 74 68 65 20 66 6f 6c 6c 6f 77 69 6e 67 20 65 72 72 6f 72 ┆ may produce the following error┆
0x14e0…1500 74 65 78 74 2e 0d 0a a1 0d 0a 0d 0a b0 f0 31 2e 20 b0 63 68 65 63 6b 73 75 6d 20 74 65 73 74 3a ┆text. 1. checksum test:┆
0x1500…1520 20 73 75 6d 20 65 72 72 6f 72 20 20 65 78 70 2e 3a 3c 30 30 30 30 3e 20 20 72 65 63 2e 3a 3c 78 ┆ sum error exp.:<0000> rec.:<x┆
0x1520…1540 79 7a 77 3e 0d 0a 0d 0a 0d 0a 43 68 65 63 6b 73 75 6d 20 65 72 72 6f 72 20 75 73 75 61 6c 6c 79 ┆yzw> Checksum error usually┆
0x1540…1560 20 6d 65 61 6e 73 20 74 68 61 74 20 74 68 65 20 63 6f 6e 74 65 6e 74 20 6f 66 20 74 68 65 20 50 ┆ means that the content of the P┆
0x1560…1580 52 4f 4d 20 68 61 73 20 0a 62 65 65 6e 20 64 61 6d 61 67 65 64 20 61 6e 64 20 74 68 61 74 20 74 ┆ROM has been damaged and that t┆
0x1580…15a0 68 65 20 50 52 4f 4d 20 6d 75 73 74 20 62 65 20 63 68 61 6e 67 65 64 2e 0d 0a 0d 0a 0d 0a a1 b0 ┆he PROM must be changed. ┆
0x15a0…15c0 33 2e 32 20 49 6e 69 74 69 61 6c 20 52 41 4d 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 69 ┆3.2 Initial RAM Test. The i┆
0x15c0…15e0 6e 69 74 69 61 6c 20 52 41 4d 20 74 65 73 74 20 76 65 72 69 66 69 65 73 20 74 68 65 20 66 69 72 ┆nitial RAM test verifies the fir┆
0x15e0…1600 73 74 20 36 34 20 6b 62 79 74 65 73 20 6f 66 20 52 41 4d 20 0a 61 64 64 72 65 73 73 65 73 20 30 ┆st 64 kbytes of RAM addresses 0┆
0x1600…1620 (11,) 30 30 30 30 30 2d 30 30 46 46 46 46 20 68 65 78 61 64 65 63 69 6d 61 6c 2e 20 54 68 69 73 20 70 ┆00000-00FFFF hexadecimal. This p┆
0x1620…1640 61 72 74 20 6f 66 20 52 41 4d 20 69 73 20 75 73 65 64 20 74 6f 20 0a 68 6f 6c 64 20 74 68 65 20 ┆art of RAM is used to hold the ┆
0x1640…1660 70 72 6f 74 65 63 74 69 6f 6e 20 74 61 62 6c 65 73 20 70 6c 75 73 20 73 65 6c 66 74 65 73 74 20 ┆protection tables plus selftest ┆
0x1660…1680 61 6e 64 20 6d 6f 6e 69 74 6f 72 20 76 61 72 69 61 62 6c 65 73 20 0a 77 68 65 6e 20 74 68 65 20 ┆and monitor variables when the ┆
0x1680…16a0 70 72 6f 63 65 73 73 6f 72 20 65 6e 74 65 72 73 20 74 68 65 20 70 72 6f 74 65 63 74 65 64 20 6d ┆processor enters the protected m┆
0x16a0…16c0 6f 64 65 20 6f 66 20 6f 70 65 72 61 74 69 6f 6e 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 6d 65 6d 6f 72 ┆ode of operation. The memor┆
0x16c0…16e0 79 20 74 65 73 74 20 69 73 20 61 20 72 65 67 69 73 74 65 72 20 62 61 73 65 64 20 74 65 73 74 20 ┆y test is a register based test ┆
0x16e0…1700 61 6e 64 20 75 73 65 73 20 6e 6f 20 6d 65 6d 6f 72 79 20 73 70 61 63 65 20 0a 61 74 20 61 6c 6c ┆and uses no memory space at all┆
0x1700…1720 2c 20 6e 65 69 74 68 65 72 20 66 6f 72 20 76 61 72 69 61 62 6c 65 73 20 6e 6f 72 20 73 74 61 63 ┆, neither for variables nor stac┆
0x1720…1740 6b 2e 0d 0a 0d 0a 0d 0a a1 e1 54 68 65 20 74 65 73 74 20 70 61 74 74 65 72 6e 20 69 73 20 74 68 ┆k. The test pattern is th┆
0x1740…1760 65 20 63 6f 6e 76 65 6e 69 65 6e 74 20 6d 6f 64 75 6c 75 73 20 33 20 70 61 74 74 65 72 6e 20 63 ┆e convenient modulus 3 pattern c┆
0x1760…1780 6f 6e 73 69 73 74 69 6e 67 20 0a 6f 66 20 74 68 72 65 65 20 74 69 6d 65 73 20 30 30 30 30 20 66 ┆onsisting of three times 0000 f┆
0x1780…17a0 6f 6c 6c 6f 77 65 64 20 62 79 20 74 68 72 65 65 20 74 69 6d 65 73 20 46 46 46 46 20 28 20 68 65 ┆ollowed by three times FFFF ( he┆
0x17a0…17c0 78 61 64 65 63 69 6d 61 6c 20 29 2e 0d 0a 0d 0a 0d 0a a1 b0 33 2e 32 2e 31 20 4d 65 6d 6f 72 79 ┆xadecimal ). 3.2.1 Memory┆
0x17c0…17e0 20 54 65 73 74 20 46 6c 6f 77 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 74 65 73 74 20 73 74 61 72 74 73 ┆ Test Flow. The test starts┆
0x17e0…1800 20 69 6e 20 74 68 65 20 68 69 67 68 65 73 74 20 52 41 4d 20 61 64 64 72 65 73 73 20 6f 66 20 74 ┆ in the highest RAM address of t┆
0x1800…1820 (12,) 68 65 20 6c 6f 77 65 73 20 36 34 20 4b 20 62 79 74 65 20 0a 6d 65 6d 6f 72 79 20 62 6c 6f 63 6b ┆he lowes 64 K byte memory block┆
0x1820…1840 20 28 46 46 46 46 20 68 65 78 2e 29 20 61 6e 64 20 69 6e 73 65 72 74 73 20 74 68 65 20 70 61 74 ┆ (FFFF hex.) and inserts the pat┆
0x1840…1860 74 65 72 6e 20 74 6f 77 61 72 64 73 20 6c 6f 77 65 72 20 0a 61 64 64 72 65 73 73 65 73 2e 0d 0a ┆tern towards lower addresses. ┆
0x1860…1880 0d 0a 0d 0a 57 68 65 6e 20 61 6c 6c 20 69 6e 69 74 69 61 6c 20 6d 65 6d 6f 72 79 20 77 6f 72 64 ┆ When all initial memory word┆
0x1880…18a0 73 20 68 61 76 65 20 62 65 65 6e 20 77 72 69 74 74 65 6e 20 61 6e 64 20 76 65 72 69 66 69 65 64 ┆s have been written and verified┆
0x18a0…18c0 2c 20 0a 74 68 65 79 20 61 72 65 20 74 65 73 74 65 64 20 61 67 61 69 6e 20 77 69 74 68 20 74 68 ┆, they are tested again with th┆
0x18c0…18e0 65 20 69 6e 76 65 72 73 65 64 20 70 61 74 74 65 72 6e 2c 20 74 68 69 73 20 6d 65 61 6e 73 2c 20 ┆e inversed pattern, this means, ┆
0x18e0…1900 74 68 61 74 20 0a 61 6c 6c 20 62 69 74 73 20 61 72 65 20 74 65 73 74 65 64 20 66 6f 72 20 22 7a ┆that all bits are tested for "z┆
0x1900…1920 65 72 6f 22 20 61 6e 64 20 22 6f 6e 65 22 20 69 6e 73 65 72 74 69 6f 6e 2e 20 49 66 20 61 6e 20 ┆ero" and "one" insertion. If an ┆
0x1920…1940 65 72 72 6f 72 20 0a 6f 63 63 75 72 20 74 68 65 20 66 6f 6c 6c 6f 77 69 6e 67 20 6d 65 73 73 61 ┆error occur the following messa┆
0x1940…1960 67 65 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 2e 0d 0a 0d ┆ge is written to the console. ┆
0x1960…1980 0a a1 0d 0a b0 f0 32 2e 20 b0 49 6e 69 74 69 61 6c 20 52 41 4d 20 54 65 73 74 3a 20 52 41 4d 20 ┆ 2. Initial RAM Test: RAM ┆
0x1980…19a0 65 72 72 6f 72 20 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 20 61 64 64 72 2e 3a 3c 61 61 61 61 ┆error segm.:<ssss> addr.:<aaaa┆
0x19a0…19c0 3e 0d 0a 19 80 82 82 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆> ┆
0x19c0…19e0 20 20 20 20 20 20 20 20 65 78 70 2e 3a 3c 65 65 65 65 3e b0 20 72 65 63 2e 3a 3c 72 72 72 72 3e ┆ exp.:<eeee> rec.:<rrrr>┆
0x19e0…19e6 0d 0a 0d 0a 0d 0a ┆ ┆
0x19e6…19e9 FormFeed {
0x19e6…19e9 0c 83 d8 ┆ ┆
0x19e6…19e9 }
0x19e9…1a00 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 74 65 78 74 20 69 73 20 ┆ The secondary text is ┆
0x1a00…1a20 (13,) 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d 0a 0d 0a 3c 73 73 73 73 ┆interpreted like this : <ssss┆
0x1a20…1a40 3e 20 69 73 20 74 68 65 20 73 65 67 6d 65 6e 74 20 61 64 64 72 65 73 73 20 28 61 6c 6c 77 61 79 ┆> is the segment address (allway┆
0x1a40…1a60 73 20 30 30 30 30 29 0d 0a 3c 61 61 61 61 3e 20 69 73 20 74 68 65 20 73 65 67 6d 65 6e 74 20 6f ┆s 0000) <aaaa> is the segment o┆
0x1a60…1a80 66 66 73 65 74 0d 0a 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 ┆ffset <eeee> is the expected pa┆
0x1a80…1aa0 74 74 65 72 6e 2c 20 73 68 6f 75 6c 64 20 61 6c 6c 77 61 79 73 20 62 65 20 30 30 30 30 20 6f 72 ┆ttern, should allways be 0000 or┆
0x1aa0…1ac0 20 46 46 46 46 2e 0d 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 ┆ FFFF. <rrrr> is the received p┆
0x1ac0…1ae0 61 74 74 65 72 6e 2e 0d 0a 0d 0a 0d 0a a1 b0 33 2e 32 2e 32 20 4c 6f 6f 70 20 4f 6e 20 45 72 72 ┆attern. 3.2.2 Loop On Err┆
0x1ae0…1b00 6f 72 2e 0d 0a 0d 0a 0d 0a 57 68 65 6e 20 61 20 66 61 75 6c 74 20 6f 63 63 75 72 20 64 75 72 69 ┆or. When a fault occur duri┆
0x1b00…1b20 6e 67 20 74 68 65 20 69 6e 69 74 69 61 6c 20 52 41 4d 20 74 65 73 74 20 61 6e 20 65 72 72 6f 72 ┆ng the initial RAM test an error┆
0x1b20…1b40 20 6d 65 73 73 61 67 65 20 0a 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 ┆ message is written to the cons┆
0x1b40…1b60 6f 6c 65 2c 20 61 6e 64 20 74 68 65 20 52 41 4d 20 74 65 73 74 20 73 74 61 72 74 73 20 66 72 6f ┆ole, and the RAM test starts fro┆
0x1b60…1b80 6d 20 74 68 65 20 0a 62 65 67 69 6e 6e 69 6e 67 20 61 67 61 69 6e 2e 20 54 68 69 73 20 77 69 6c ┆m the beginning again. This wil┆
0x1b80…1ba0 6c 20 62 65 20 74 68 65 20 63 61 73 65 20 75 6e 74 69 6c 20 6e 6f 20 65 72 72 6f 72 20 69 73 20 ┆l be the case until no error is ┆
0x1ba0…1bc0 0a 64 69 73 63 6f 76 65 72 65 64 2e 20 49 66 20 74 68 65 72 65 20 69 73 20 61 20 52 41 4d 20 65 ┆ discovered. If there is a RAM e┆
0x1bc0…1be0 72 72 6f 72 20 61 6e 64 20 69 66 20 61 6e 20 4c 20 69 73 20 74 79 70 65 64 20 66 72 6f 6d 20 74 ┆rror and if an L is typed from t┆
0x1be0…1c00 68 65 20 0a 6b 65 79 62 6f 61 72 64 2c 20 74 68 65 6e 20 74 68 65 20 52 41 4d 20 74 65 73 74 20 ┆he keyboard, then the RAM test ┆
0x1c00…1c20 (14,) 77 69 6c 6c 20 6e 6f 74 20 73 74 61 72 74 20 66 72 6f 6d 20 74 68 65 20 62 65 67 69 6e 6e 69 6e ┆will not start from the beginnin┆
0x1c20…1c40 67 20 0a 61 67 61 69 6e 2c 20 62 75 74 20 70 72 6f 63 65 65 64 20 74 72 6f 75 67 68 20 74 68 65 ┆g again, but proceed trough the┆
0x1c40…1c60 20 52 41 4d 20 74 65 73 74 20 61 6e 64 20 77 72 69 74 65 20 61 6c 6c 20 52 41 4d 20 65 72 72 6f ┆ RAM test and write all RAM erro┆
0x1c60…1c80 72 73 20 0a 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 2c 20 61 6e 64 20 66 69 6e 61 6c 6c 79 20 ┆rs to the console, and finally ┆
0x1c80…1ca0 65 6e 74 65 72 20 74 68 65 20 22 74 65 73 74 2d 61 64 6d 69 6e 69 73 74 72 61 74 6f 72 22 20 74 ┆enter the "test-administrator" t┆
0x1ca0…1cc0 6f 20 0a 65 78 65 63 75 74 65 20 6f 74 68 65 72 20 74 65 73 74 73 20 69 66 20 70 6f 73 73 69 62 ┆o execute other tests if possib┆
0x1cc0…1cc5 6c 65 2e 0d 0a ┆le. ┆
0x1cc5…1cc8 FormFeed {
0x1cc5…1cc8 0c 81 98 ┆ ┆
0x1cc5…1cc8 }
0x1cc8…1ce0 0a a1 b0 34 2e 20 49 4e 54 45 52 52 55 50 54 20 48 41 4e 44 4c 49 4e 47 ┆ 4. INTERRUPT HANDLING┆
0x1ce0…1d00 20 41 4e 44 20 50 56 41 4d 20 53 57 49 54 43 48 2e 0d 0a 0d 0a 0d 0a 57 68 65 6e 20 74 68 65 20 ┆ AND PVAM SWITCH. When the ┆
0x1d00…1d20 43 50 55 20 36 31 30 20 53 42 43 20 73 65 6c 66 74 65 73 74 20 68 61 73 20 74 65 72 6d 69 6e 61 ┆CPU 610 SBC selftest has termina┆
0x1d20…1d40 74 65 64 20 74 68 65 20 69 6e 69 74 69 61 6c 20 6d 65 6d 6f 72 79 20 0a 74 65 73 74 20 74 68 65 ┆ted the initial memory test the┆
0x1d40…1d60 20 70 72 6f 74 65 63 74 69 6f 6e 20 74 61 62 6c 65 73 20 61 72 65 20 63 6f 70 69 65 64 20 66 72 ┆ protection tables are copied fr┆
0x1d60…1d80 6f 6d 20 45 50 52 4f 4d 20 74 6f 20 52 41 4d 2e 20 54 68 65 6e 20 74 68 65 20 0a 69 41 50 58 20 ┆om EPROM to RAM. Then the iAPX ┆
0x1d80…1da0 32 38 36 20 43 50 55 20 61 6e 64 20 74 68 65 20 62 6f 61 72 64 20 61 73 20 77 65 6c 6c 20 69 73 ┆286 CPU and the board as well is┆
0x1da0…1dc0 20 73 77 69 74 63 68 65 64 20 69 6e 74 6f 20 74 68 65 20 50 72 6f 74 65 63 74 65 64 20 0a 56 69 ┆ switched into the Protected Vi┆
0x1dc0…1de0 72 74 75 61 6c 20 41 64 64 72 65 73 73 20 4d 6f 64 65 2c 20 61 6e 64 20 61 20 6d 65 73 73 61 67 ┆rtual Address Mode, and a messag┆
0x1de0…1e00 65 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 20 0a 6c 69 6b ┆e is written to the console lik┆
0x1e00…1e20 (15,) 65 20 74 68 69 73 3a 0d 0a 0d 0a 0d 0a b0 2a 2a 2a 2a 2a 2a 2a 20 50 56 41 4d 20 45 4e 54 45 52 ┆e this: ******* PVAM ENTER┆
0x1e20…1e40 45 44 20 2a 2a 2a 2a 2a 2a 2a 0d 0a 0d 0a 0d 0a 49 66 20 61 6e 20 38 30 38 32 37 20 4e 75 6d 65 ┆ED ******* If an 80827 Nume┆
0x1e40…1e60 72 69 63 20 43 6f 70 72 6f 63 65 73 73 6f 72 20 69 73 20 70 72 65 73 65 6e 74 2c 20 74 68 65 6e ┆ric Coprocessor is present, then┆
0x1e60…1e80 20 69 74 20 69 73 20 61 6c 73 6f 20 0a 73 77 69 74 63 68 65 64 20 69 6e 74 6f 20 74 68 65 20 70 ┆ it is also switched into the p┆
0x1e80…1ea0 72 6f 74 65 63 74 65 64 20 6d 6f 64 65 20 61 6e 64 20 61 6e 6f 74 68 65 72 20 6d 65 73 73 61 67 ┆rotected mode and another messag┆
0x1ea0…1ec0 65 20 77 72 69 74 74 65 6e 20 74 6f 20 0a 74 68 65 20 63 6f 6e 73 6f 6c 65 3a 0d 0a 0d 0a 0d 0a ┆e written to the console: ┆
0x1ec0…1ee0 b0 38 30 32 38 37 20 4e 50 58 20 46 6f 75 6e 64 0d 0a 0d 0a 0d 0a a1 b0 34 2e 31 20 56 61 6c 69 ┆ 80287 NPX Found 4.1 Vali┆
0x1ee0…1f00 64 20 49 6e 74 65 72 72 75 70 74 73 2e 0d 0a 0d 0a 0d 0a 41 20 66 65 77 20 69 6e 74 65 72 72 75 ┆d Interrupts. A few interru┆
0x1f00…1f20 70 74 73 20 61 72 65 20 61 6c 6c 77 61 79 73 20 63 6f 6e 73 69 64 65 72 65 64 20 76 61 6c 69 64 ┆pts are allways considered valid┆
0x1f20…1f40 20 64 75 72 69 6e 67 20 74 68 65 20 0a 73 65 6c 66 74 65 73 74 3a 0d 0a 0d 0a 0d 0a a1 52 65 71 ┆ during the selftest: Req┆
0x1f40…1f60 75 65 73 74 20 6c 69 6e 65 20 20 49 6e 74 65 72 72 75 70 74 20 6e 61 6d 65 20 20 56 65 63 74 6f ┆uest line Interrupt name Vecto┆
0x1f60…1f80 72 20 74 79 70 65 20 20 20 20 20 20 20 20 20 20 20 20 20 45 76 65 6e 74 20 74 79 70 65 20 20 0d ┆r type Event type ┆
0x1f80…1fa0 0a 0d 0a 69 6e 74 65 72 6e 61 6c 20 20 20 20 20 20 53 74 65 70 20 69 6e 74 65 72 72 75 70 74 20 ┆ internal Step interrupt ┆
0x1fa0…1fc0 20 20 20 20 20 31 09 84 69 6e 73 74 72 75 63 74 69 6f 6e 20 65 78 65 63 75 74 65 64 20 0a 19 ac ┆ 1 instruction executed ┆
0x1fc0…1fe0 80 80 77 69 74 68 20 74 72 61 70 20 66 6c 61 67 20 73 65 74 0d 0a 0d 0a 69 6e 74 65 72 6e 61 6c ┆ with trap flag set internal┆
0x1fe0…2000 09 42 72 65 61 6b 20 69 6e 74 65 72 72 75 70 74 09 33 09 84 73 6f 66 74 77 61 72 65 20 69 6e 74 ┆ Break interrupt 3 software int┆
0x2000…2020 (16,) 65 72 72 75 70 74 20 0a 19 ac 80 80 28 64 65 62 75 67 67 65 72 20 65 6e 74 72 79 29 0d 0a 0d 0a ┆errupt (debugger entry) ┆
0x2020…2040 43 4e 54 52 30 09 54 69 6d 65 72 20 30 09 09 34 30 09 54 69 6d 65 72 20 30 20 69 6e 74 65 72 72 ┆CNTR0 Timer 0 40 Timer 0 interr┆
0x2040…2060 75 70 74 0d 0a 0d 0a 53 45 52 20 49 4e 54 52 09 55 53 41 52 54 20 72 65 63 65 69 76 65 20 69 6e ┆upt SER INTR USART receive in┆
0x2060…2080 74 2e 09 33 34 09 4b 65 79 62 6f 61 72 64 20 69 6e 74 65 72 72 75 70 74 0d 0a 0d 0a 0d 0a a1 b0 ┆t. 34 Keyboard interrupt ┆
0x2080…20a0 34 2e 32 20 50 72 6f 74 65 63 74 69 6f 6e 20 56 69 6f 6c 61 74 69 6f 6e 73 20 61 6e 64 20 49 6e ┆4.2 Protection Violations and In┆
0x20a0…20c0 73 74 72 75 63 74 69 6f 6e 20 45 78 63 65 70 74 69 6f 6e 73 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 70 ┆struction Exceptions. The p┆
0x20c0…20e0 72 6f 74 65 63 74 69 6f 6e 20 76 69 6f 6c 61 74 69 6f 6e 73 20 61 6e 64 20 69 6e 73 74 72 75 63 ┆rotection violations and instruc┆
0x20e0…2100 74 69 6f 6e 20 65 78 63 65 70 74 69 6f 6e 73 20 77 69 6c 6c 20 63 61 75 73 65 20 0a 74 68 65 20 ┆tion exceptions will cause the ┆
0x2100…2120 73 65 6c 66 74 65 73 74 20 74 6f 20 77 72 69 74 65 20 61 20 6d 65 73 73 61 67 65 20 74 6f 20 74 ┆selftest to write a message to t┆
0x2120…2140 68 65 20 63 6f 6e 73 6f 6c 65 20 61 6e 64 20 74 68 65 6e 20 65 78 65 63 75 74 65 20 20 0a 61 20 ┆he console and then execute a ┆
0x2140…2160 48 41 4c 54 20 69 6e 73 74 72 75 63 74 69 6f 6e 2e 20 54 68 65 20 6f 6e 6c 79 20 77 61 79 20 74 ┆HALT instruction. The only way t┆
0x2160…2180 6f 20 67 65 74 20 6f 75 74 20 6f 66 20 74 68 65 73 65 20 65 78 63 65 70 74 69 6f 6e 20 69 73 20 ┆o get out of these exception is ┆
0x2180…21a0 0a 74 6f 20 68 61 72 64 77 61 72 65 20 72 65 73 65 74 20 74 68 65 20 43 50 55 2e 0d 0a 0d 0a 0d ┆ to hardware reset the CPU. ┆
0x21a0…21c0 0a a1 56 65 63 74 6f 72 20 74 79 70 65 20 20 20 45 72 72 6f 72 20 54 65 78 74 20 20 20 20 20 20 ┆ Vector type Error Text ┆
0x21c0…21e0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆ ┆
0x21e0…2200 0d 0a 0d 0a 30 20 20 20 20 20 20 20 20 20 20 20 20 20 49 6e 74 65 72 72 75 70 74 20 30 20 61 74 ┆ 0 Interrupt 0 at┆
0x2200…2220 (17,) 20 27 43 53 3a 49 50 27 20 44 69 76 69 64 65 20 42 79 20 5a 65 72 6f 0d 0a 09 09 48 41 4c 54 45 ┆ 'CS:IP' Divide By Zero HALTE┆
0x2220…2240 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 32 ┆D - Hardware RESET required 2┆
0x2240…2260 09 09 49 6e 74 65 72 72 75 70 74 20 32 20 61 74 20 27 43 53 3a 49 50 27 20 4e 4d 49 0d 0a 09 09 ┆ Interrupt 2 at 'CS:IP' NMI ┆
0x2260…2280 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 ┆HALTED - Hardware RESET required┆
0x2280…22a0 0d 0a 0d 0a 8c 83 d0 0a 34 09 09 49 6e 74 65 72 72 75 70 74 20 34 20 61 74 20 27 43 53 3a 49 50 ┆ 4 Interrupt 4 at 'CS:IP┆
0x22a0…22c0 27 20 4f 76 65 72 66 6c 6f 77 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 ┆' Overflow HALTED - Hardware ┆
0x22c0…22e0 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 35 09 09 49 6e 74 65 72 72 75 70 74 20 35 ┆RESET required 5 Interrupt 5┆
0x22e0…2300 20 61 74 20 27 43 53 3a 49 50 27 20 42 6f 75 6e 64 73 20 43 68 65 63 6b 0d 0a 09 09 48 41 4c 54 ┆ at 'CS:IP' Bounds Check HALT┆
0x2300…2320 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a ┆ED - Hardware RESET required ┆
0x2320…2340 36 09 09 49 6e 74 65 72 72 75 70 74 20 36 20 61 74 20 27 43 53 3a 49 50 27 20 55 6e 64 65 66 69 ┆6 Interrupt 6 at 'CS:IP' Undefi┆
0x2340…2360 6e 65 64 20 4f 70 65 72 61 74 69 6f 6e 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 ┆ned Operation HALTED - Hardwa┆
0x2360…2380 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 37 09 09 49 6e 74 65 72 72 75 70 ┆re RESET required 7 Interrup┆
0x2380…23a0 74 20 37 20 61 74 20 27 43 53 3a 49 50 27 20 44 65 76 69 63 65 20 4e 6f 74 20 41 76 61 69 6c 61 ┆t 7 at 'CS:IP' Device Not Availa┆
0x23a0…23c0 62 6c 65 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 ┆ble HALTED - Hardware RESET r┆
0x23c0…23e0 65 71 75 69 72 65 64 0d 0a 0d 0a 38 09 09 49 6e 74 65 72 72 75 70 74 20 38 20 61 74 20 27 43 53 ┆equired 8 Interrupt 8 at 'CS┆
0x23e0…2400 3a 49 50 27 20 44 6f 75 62 6c 65 20 46 61 75 6c 74 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 ┆:IP' Double Fault HALTED - Ha┆
0x2400…2420 (18,) 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 39 09 09 49 6e 74 65 ┆rdware RESET required 9 Inte┆
0x2420…2440 72 72 75 70 74 20 39 20 61 74 20 27 43 53 3a 49 50 27 20 4d 61 74 68 20 41 64 64 72 65 73 73 20 ┆rrupt 9 at 'CS:IP' Math Address ┆
0x2440…2460 45 72 72 6f 72 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 ┆Error HALTED - Hardware RESET┆
0x2460…2480 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 31 30 09 09 49 6e 74 65 72 72 75 70 74 20 31 30 20 61 74 ┆ required 10 Interrupt 10 at┆
0x2480…24a0 20 27 43 53 3a 49 50 27 20 49 6e 76 61 6c 69 64 20 54 61 73 6b 20 53 74 61 74 65 20 53 65 67 6d ┆ 'CS:IP' Invalid Task State Segm┆
0x24a0…24c0 65 6e 74 0d 0a 20 20 20 20 20 20 20 20 20 20 20 20 20 20 2d 20 45 43 4f 44 45 20 3d 20 58 58 58 ┆ent - ECODE = XXX┆
0x24c0…24e0 58 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 ┆X HALTED - Hardware RESET req┆
0x24e0…2500 75 69 72 65 64 0d 0a 0d 0a 31 31 09 09 49 6e 74 65 72 72 75 70 74 20 31 31 20 61 74 20 27 43 53 ┆uired 11 Interrupt 11 at 'CS┆
0x2500…2520 3a 49 50 27 20 4e 6f 74 20 50 72 65 73 65 6e 74 20 2d 20 45 43 4f 44 45 20 3d 20 58 58 58 58 0d ┆:IP' Not Present - ECODE = XXXX ┆
0x2520…2540 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 ┆ HALTED - Hardware RESET requi┆
0x2540…2560 72 65 64 0d 0a 0d 0a 31 32 09 09 49 6e 74 65 72 72 75 70 74 20 31 32 20 61 74 20 27 43 53 3a 49 ┆red 12 Interrupt 12 at 'CS:I┆
0x2560…2580 50 27 20 53 74 61 63 6b 20 50 72 6f 74 65 63 74 69 6f 6e 0d 0a 09 09 20 2d 20 45 43 4f 44 45 20 ┆P' Stack Protection - ECODE ┆
0x2580…25a0 3d 20 58 58 58 58 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 ┆= XXXX HALTED - Hardware RESE┆
0x25a0…25c0 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 31 33 09 09 49 6e 74 65 72 72 75 70 74 20 31 33 20 61 ┆T required 13 Interrupt 13 a┆
0x25c0…25e0 74 20 27 43 53 3a 49 50 27 20 47 65 6e 65 72 61 6c 20 50 72 6f 74 65 63 74 69 6f 6e 0d 0a 09 09 ┆t 'CS:IP' General Protection ┆
0x25e0…2600 2d 20 45 43 4f 44 45 20 3d 20 58 58 58 58 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 ┆- ECODE = XXXX HALTED - Hardw┆
0x2600…2620 (19,) 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 31 34 09 09 49 6e 74 65 72 72 ┆are RESET required 14 Interr┆
0x2620…2640 75 70 74 20 31 34 20 61 74 20 27 43 53 3a 49 50 27 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 ┆upt 14 at 'CS:IP' HALTED - Ha┆
0x2640…2660 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 31 35 09 09 49 6e 74 ┆rdware RESET required 15 Int┆
0x2660…2680 65 72 72 75 70 74 20 31 35 20 61 74 20 27 43 53 3a 49 50 27 0d 0a 09 09 48 41 4c 54 45 44 20 2d ┆errupt 15 at 'CS:IP' HALTED -┆
0x2680…26a0 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 71 75 69 72 65 64 0d 0a 0d 0a 31 36 09 09 ┆ Hardware RESET required 16 ┆
0x26a0…26c0 49 6e 74 65 72 72 75 70 74 20 31 36 20 61 74 20 27 43 53 3a 49 50 27 20 4d 61 74 68 20 45 72 72 ┆Interrupt 16 at 'CS:IP' Math Err┆
0x26c0…26e0 6f 72 0d 0a 09 09 48 41 4c 54 45 44 20 2d 20 48 61 72 64 77 61 72 65 20 52 45 53 45 54 20 72 65 ┆or HALTED - Hardware RESET re┆
0x26e0…2700 71 75 69 72 65 64 0d 0a 0d 0a 0d 0a 54 68 65 20 74 65 72 6d 20 27 43 53 3a 49 50 27 20 72 65 66 ┆quired The term 'CS:IP' ref┆
0x2700…2720 65 72 73 20 74 6f 20 74 68 65 20 6c 6f 67 69 63 61 6c 20 6c 6f 63 61 74 69 6f 6e 20 69 6e 20 74 ┆ers to the logical location in t┆
0x2720…2740 68 65 20 70 72 6f 67 72 61 6d 2c 20 0a 77 68 65 72 65 20 74 68 65 20 65 78 63 65 70 74 69 6f 6e ┆he program, where the exception┆
0x2740…2760 20 63 61 6d 65 2e 20 54 68 65 20 65 72 72 6f 72 63 6f 64 65 20 70 75 73 68 65 64 20 6f 6e 74 6f ┆ came. The errorcode pushed onto┆
0x2760…2780 20 74 68 65 20 73 74 61 63 6b 20 62 79 20 0a 73 6f 6d 65 20 65 78 63 65 70 74 69 6f 6e 73 20 28 ┆ the stack by some exceptions (┆
0x2780…27a0 45 43 4f 44 45 29 20 6d 61 79 20 62 65 20 68 61 72 64 20 74 6f 20 64 65 63 6f 64 65 2c 20 61 6e ┆ECODE) may be hard to decode, an┆
0x27a0…27c0 64 20 6e 6f 20 61 74 74 65 6d 70 74 20 74 6f 20 0a 64 6f 63 75 6d 65 6e 74 20 74 68 65 6d 20 69 ┆d no attempt to document them i┆
0x27c0…27e0 6e 20 74 68 69 73 20 6d 61 6e 75 61 6c 20 77 69 6c 6c 20 62 65 20 64 6f 6e 65 2e 20 43 6f 6e 73 ┆n this manual will be done. Cons┆
0x27e0…2800 75 6c 74 20 49 4e 54 45 4c 20 6d 61 6e 75 61 6c 73 20 0a 66 6f 72 20 66 75 72 74 68 65 72 20 64 ┆ult INTEL manuals for further d┆
0x2800…2820 (20,) 65 73 63 72 69 70 74 69 6f 6e 20 6f 66 20 74 68 65 20 65 78 63 65 70 74 69 6f 6e 73 20 61 6e 64 ┆escription of the exceptions and┆
0x2820…2840 20 74 68 65 69 72 20 65 72 72 6f 72 63 6f 64 65 73 2e 0d 0a 0d 0a 0d 0a 41 6c 6c 20 6f 74 68 65 ┆ their errorcodes. All othe┆
0x2840…2860 72 20 69 6e 74 65 72 72 75 70 74 73 20 74 68 61 74 20 65 69 74 68 65 72 20 72 65 66 65 72 20 74 ┆r interrupts that either refer t┆
0x2860…2880 6f 20 61 20 4e 55 4c 4c 20 64 65 73 63 72 69 70 74 6f 72 20 69 6e 20 0a 74 68 65 20 49 6e 74 65 ┆o a NULL descriptor in the Inte┆
0x2880…28a0 72 72 75 70 74 20 44 65 73 63 72 69 70 74 6f 72 20 54 61 62 6c 65 20 28 49 44 54 29 20 6f 72 20 ┆rrupt Descriptor Table (IDT) or ┆
0x28a0…28c0 74 6f 20 61 20 64 65 73 63 72 69 70 74 6f 72 20 6f 75 74 73 69 64 65 20 0a 74 68 65 20 49 44 54 ┆to a descriptor outside the IDT┆
0x28c0…28e0 20 6c 69 6d 69 74 20 77 69 6c 6c 20 63 61 75 73 65 20 6f 6e 65 20 6f 66 20 74 68 65 20 70 72 6f ┆ limit will cause one of the pro┆
0x28e0…2900 74 65 63 74 69 6f 6e 20 76 69 6f 6c 61 74 69 6f 6e 73 20 61 62 6f 76 65 2e 20 0a 49 66 20 61 20 ┆tection violations above. If a ┆
0x2900…2920 74 65 73 74 20 75 73 65 73 20 69 6e 74 65 72 72 75 70 74 20 76 65 63 74 6f 72 73 20 6e 6f 74 20 ┆test uses interrupt vectors not ┆
0x2920…2940 6d 65 6e 74 69 6f 6e 65 64 20 61 62 6f 76 65 2c 20 74 68 65 6e 20 74 68 65 20 0a 74 65 73 74 20 ┆mentioned above, then the test ┆
0x2940…2960 69 73 20 72 65 73 70 6f 6e 73 69 62 6c 65 20 66 6f 72 20 6c 6f 61 64 69 6e 67 20 74 68 65 20 61 ┆is responsible for loading the a┆
0x2960…2980 70 70 72 6f 70 69 61 74 65 20 64 65 73 63 72 69 70 74 6f 72 20 69 6e 74 6f 20 0a 74 68 65 20 49 ┆ppropiate descriptor into the I┆
0x2980…29a0 44 54 20 70 72 69 6f 72 20 74 6f 20 74 68 65 20 74 65 73 74 20 61 6e 64 20 74 6f 20 6e 75 6c 6c ┆DT prior to the test and to null┆
0x29a0…29c0 69 66 79 20 74 68 65 20 64 65 73 63 72 69 70 74 6f 72 20 61 74 20 74 68 65 20 0a 65 6e 64 20 6f ┆ify the descriptor at the end o┆
0x29c0…29cd 66 20 74 68 65 20 74 65 73 74 2e 0d 0a ┆f the test. ┆
0x29cd…29d0 FormFeed {
0x29cd…29d0 0c 83 c8 ┆ ┆
0x29cd…29d0 }
0x29d0…29e0 0a a1 b0 35 2e 20 b0 54 45 53 54 20 30 20 3d f0 ┆ 5. TEST 0 = ┆
0x29e0…2a00 20 52 41 4d 20 74 65 73 74 2e b0 0d 0a 0d 0a 0d 0a 41 66 74 65 72 20 74 68 65 20 73 77 69 74 63 ┆ RAM test. After the switc┆
0x2a00…2a20 (21,) 68 69 6e 67 20 6f 66 20 74 68 65 20 69 41 50 58 20 32 38 36 20 70 72 6f 63 65 73 73 6f 72 20 74 ┆hing of the iAPX 286 processor t┆
0x2a20…2a40 6f 20 74 68 65 20 70 72 6f 74 65 63 74 65 64 20 0a 6d 6f 64 65 20 6f 66 20 6f 70 65 72 61 74 69 ┆o the protected mode of operati┆
0x2a40…2a60 6f 6e 20 74 68 69 73 20 52 41 4d 20 74 65 73 74 20 69 73 20 72 65 73 70 6f 6e 73 69 62 6c 65 20 ┆on this RAM test is responsible ┆
0x2a60…2a80 66 6f 72 20 76 65 72 69 66 79 69 6e 67 20 74 68 65 20 0a 72 65 73 74 20 6f 66 20 74 68 65 20 43 ┆for verifying the rest of the C┆
0x2a80…2aa0 50 55 20 36 31 30 20 6d 65 6d 6f 72 79 2e 20 54 68 65 20 6d 65 6d 6f 72 79 20 73 69 7a 65 20 69 ┆PU 610 memory. The memory size i┆
0x2aa0…2ac0 73 20 76 61 72 69 61 62 6c 65 20 62 65 74 77 65 65 6e 20 0a 35 31 32 20 4b 20 62 79 74 65 73 20 ┆s variable between 512 K bytes ┆
0x2ac0…2ae0 61 6e 64 20 38 20 4d 20 62 79 74 65 73 20 61 6e 64 20 61 20 6d 61 78 69 6d 75 6d 20 6f 66 20 34 ┆and 8 M bytes and a maximum of 4┆
0x2ae0…2b00 20 6d 65 6d 6f 72 79 20 62 6f 61 72 64 73 20 6d 61 79 20 62 65 20 0a 63 6f 6e 6e 65 63 74 65 64 ┆ memory boards may be connected┆
0x2b00…2b20 20 74 6f 20 61 20 43 50 55 20 36 31 30 20 28 69 4c 42 58 20 42 55 53 20 77 69 64 74 68 20 69 73 ┆ to a CPU 610 (iLBX BUS width is┆
0x2b20…2b40 20 35 20 73 6c 6f 74 73 29 2e 20 54 68 65 20 6d 65 6d 6f 72 79 20 0a 6d 75 73 74 20 62 65 20 63 ┆ 5 slots). The memory must be c┆
0x2b40…2b60 6f 6e 74 69 67 75 6f 75 73 20 66 72 6f 6d 20 61 64 64 72 65 73 73 20 30 20 28 74 68 65 20 58 45 ┆ontiguous from address 0 (the XE┆
0x2b60…2b80 4e 49 58 20 6f 70 65 72 61 74 69 6e 67 20 73 79 73 74 65 6d 20 0a 61 73 73 75 6d 65 73 20 74 68 ┆NIX operating system assumes th┆
0x2b80…2ba0 69 73 29 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 52 41 4d 20 74 65 73 74 2c 20 6f 66 20 63 6f 75 72 ┆is). This RAM test, of cour┆
0x2ba0…2bc0 73 65 2c 20 64 6f 6e 74 20 76 65 72 69 66 79 20 74 68 65 20 6c 6f 77 65 73 74 20 70 61 72 74 20 ┆se, dont verify the lowest part ┆
0x2bc0…2be0 6f 66 20 6d 65 6d 6f 72 79 20 0a 61 64 64 72 65 73 73 65 73 20 30 2d 46 46 46 46 20 68 65 78 61 ┆of memory addresses 0-FFFF hexa┆
0x2be0…2c00 64 65 63 69 6d 61 6c 2c 20 77 68 69 63 68 20 69 73 20 63 6f 76 65 72 65 64 20 62 79 20 74 68 65 ┆decimal, which is covered by the┆
0x2c00…2c20 (22,) 20 69 6e 69 74 69 61 6c 20 0a 6d 65 6d 6f 72 79 20 74 65 73 74 20 61 6e 64 20 75 73 65 64 20 74 ┆ initial memory test and used t┆
0x2c20…2c40 6f 20 68 6f 6c 64 20 73 65 6c 66 74 65 73 74 20 76 61 72 69 61 62 6c 65 73 2e 0d 0a 0d 0a 0d 0a ┆o hold selftest variables. ┆
0x2c40…2c60 54 68 69 73 20 74 65 73 74 20 64 69 76 69 64 65 73 20 74 68 65 20 61 76 61 69 6c 61 62 6c 65 20 ┆This test divides the available ┆
0x2c60…2c80 6d 65 6d 6f 72 79 20 73 70 61 63 65 20 69 6e 74 6f 20 36 34 20 4b 20 62 79 74 65 20 0a 62 6c 6f ┆memory space into 64 K byte blo┆
0x2c80…2ca0 63 6b 73 2c 20 74 68 65 20 66 69 72 73 74 20 73 74 61 72 74 69 6e 67 20 61 74 20 61 64 64 72 65 ┆cks, the first starting at addre┆
0x2ca0…2cc0 73 73 20 31 30 30 30 30 20 68 65 78 61 64 65 63 69 6d 61 6c 20 61 6e 64 20 74 68 65 20 0a 6c 61 ┆ss 10000 hexadecimal and the la┆
0x2cc0…2ce0 73 74 20 65 6e 64 69 6e 67 20 61 74 20 61 64 64 72 65 73 73 20 37 46 46 46 46 46 20 68 65 78 61 ┆st ending at address 7FFFFF hexa┆
0x2ce0…2d00 64 65 63 69 6d 61 6c 2e 20 46 6f 72 20 65 76 65 72 79 20 70 6f 73 73 69 62 6c 65 20 36 34 20 0a ┆decimal. For every possible 64 ┆
0x2d00…2d20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 74 68 65 20 52 41 4d 20 74 65 73 74 20 64 6f 65 73 3a 0d ┆K byte block the RAM test does: ┆
0x2d20…2d40 0a 0d 0a 0d 0a 31 2e 20 84 57 72 69 74 65 73 20 61 20 70 61 74 74 65 72 6e 20 74 6f 20 74 68 65 ┆ 1. Writes a pattern to the┆
0x2d40…2d60 20 66 69 72 73 74 20 62 79 74 65 20 6f 66 20 74 68 61 74 20 62 6c 6f 63 6b 2e 20 52 65 61 64 73 ┆ first byte of that block. Reads┆
0x2d60…2d80 20 74 68 65 20 0a 19 83 80 80 62 79 74 65 20 62 61 63 6b 2c 20 61 6e 64 20 69 66 20 74 68 65 20 ┆ the byte back, and if the ┆
0x2d80…2da0 73 61 6d 65 20 70 61 74 74 65 72 6e 20 69 73 20 72 65 61 64 20 62 61 63 6b 20 6d 65 6d 6f 72 79 ┆same pattern is read back memory┆
0x2da0…2dc0 20 69 73 20 0a 19 83 80 80 63 6f 6e 73 69 64 65 72 65 64 20 70 72 65 73 65 6e 74 20 61 6e 64 20 ┆ is considered present and ┆
0x2dc0…2de0 74 68 65 20 76 65 72 69 66 69 63 61 74 69 6f 6e 20 6f 66 20 74 68 61 74 20 62 6c 6f 63 6b 20 0a ┆the verification of that block ┆
0x2de0…2e00 19 83 80 80 63 6f 6e 74 69 6e 75 65 73 2c 20 6f 74 68 65 72 77 69 73 65 20 74 68 65 20 6e 65 78 ┆ continues, otherwise the nex┆
0x2e00…2e20 (23,) 74 20 36 34 20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 69 73 20 74 72 69 65 64 2e 0d 0a 0d 0a 0d ┆t 64 K byte block is tried. ┆
0x2e20…2e40 0a 32 2e 20 84 54 68 65 20 36 34 20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 63 6f 6e 73 69 64 65 ┆ 2. The 64 K byte block conside┆
0x2e40…2e60 72 65 64 20 70 72 65 73 65 6e 74 20 69 6e 20 73 74 65 70 20 31 20 69 73 20 66 69 6c 6c 65 64 20 ┆red present in step 1 is filled ┆
0x2e60…2e80 0a 19 83 80 80 77 69 74 68 20 6f 6e 65 73 2e 20 54 68 65 20 63 6f 6e 74 65 6e 74 20 69 73 20 72 ┆ with ones. The content is r┆
0x2e80…2ea0 65 61 64 20 62 61 63 6b 2c 20 61 6e 64 20 69 66 20 6e 6f 74 20 61 6c 6c 20 6f 6e 65 73 20 61 6e ┆ead back, and if not all ones an┆
0x2ea0…2ec0 20 0a 19 83 80 80 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 ┆ error message is generated┆
0x2ec0…2ee0 20 61 6e 64 20 74 68 65 20 74 65 73 74 20 74 65 72 6d 69 6e 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 33 ┆ and the test terminated. 3┆
0x2ee0…2f00 2e 20 84 54 68 65 20 36 34 20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 6f 66 20 6d 65 6d 6f 72 79 ┆. The 64 K byte block of memory┆
0x2f00…2f20 20 69 73 20 66 69 6c 6c 65 64 20 77 69 74 68 20 7a 65 72 6f 65 73 2e 20 54 68 65 20 0a 19 83 80 ┆ is filled with zeroes. The ┆
0x2f20…2f40 80 63 6f 6e 74 65 6e 74 20 69 73 20 72 65 61 64 20 62 61 63 6b 2c 20 61 6e 64 20 69 66 20 6e 6f ┆ content is read back, and if no┆
0x2f40…2f60 74 20 61 6c 6c 20 7a 65 72 6f 65 73 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 0a 19 ┆t all zeroes an error message ┆
0x2f60…2f80 83 80 80 69 73 20 67 65 6e 65 72 61 74 65 64 20 61 6e 64 20 74 68 65 20 74 65 73 74 20 74 65 72 ┆ is generated and the test ter┆
0x2f80…2fa0 6d 69 6e 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 34 2e 20 84 53 74 65 70 20 31 20 69 73 20 65 6e 74 65 ┆minated. 4. Step 1 is ente┆
0x2fa0…2fc0 72 65 64 20 61 67 61 69 6e 20 75 6e 74 69 6c 20 74 68 65 20 6c 61 73 74 20 70 6f 73 73 69 62 6c ┆red again until the last possibl┆
0x2fc0…2fe0 65 20 36 34 20 4b 20 62 79 74 65 20 0a 19 83 80 80 62 6c 6f 63 6b 20 68 61 73 20 62 65 65 6e 20 ┆e 64 K byte block has been ┆
0x2fe0…3000 63 68 65 63 6b 65 64 2e 0d 0a 0d 0a b0 f0 0d 0a 54 68 65 20 52 41 4d 20 74 65 73 74 20 6d 61 79 ┆checked. The RAM test may┆
0x3000…3020 (24,) 20 70 72 6f 64 75 63 65 20 74 68 65 20 66 6f 6c 6c 6f 77 69 6e 67 20 65 72 72 6f 72 20 6d 65 73 ┆ produce the following error mes┆
0x3020…3040 73 61 67 65 3a 0d 0a 0d 0a 0d 0a 31 2e 20 b0 52 41 4d 20 74 65 73 74 3a 20 52 41 4d 20 65 72 72 ┆sage: 1. RAM test: RAM err┆
0x3040…3060 6f 72 20 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 20 61 64 64 72 2e 3a 3c 61 61 61 61 3e 20 20 ┆or segm.:<ssss> addr.:<aaaa> ┆
0x3060…3080 65 78 70 2e 3a 3c 65 65 65 65 3e 0d 0a 09 20 09 09 09 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆exp.:<eeee> ┆
0x3080…30a0 20 20 20 b0 20 72 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 ┆ rec.:<rrrr> The second┆
0x30a0…30c0 61 72 79 20 74 65 78 74 20 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 ┆ary text is interpreted like thi┆
0x30c0…30e0 73 20 3a 0d 0a 0d 0a 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 73 65 67 6d 65 6e 74 20 ┆s : <ssss> is the segment ┆
0x30e0…3100 4c 44 54 20 73 65 6c 65 63 74 6f 72 20 28 75 73 65 20 52 43 20 33 39 20 4d 6f 6e 69 74 6f 72 20 ┆LDT selector (use RC 39 Monitor ┆
0x3100…3120 74 6f 20 0a 19 87 80 80 64 65 74 65 72 6d 69 6e 65 20 74 68 65 20 70 68 79 73 69 63 61 6c 20 61 ┆to determine the physical a┆
0x3120…3140 64 64 72 65 73 73 20 2d 20 58 4c 44 54 20 3c 73 73 73 73 3e 29 0d 0a 3c 61 61 61 61 3e 20 69 73 ┆ddress - XLDT <ssss>) <aaaa> is┆
0x3140…3160 20 74 68 65 20 73 65 67 6d 65 6e 74 20 6f 66 66 73 65 74 0d 0a 3c 65 65 65 65 3e 20 69 73 20 74 ┆ the segment offset <eeee> is t┆
0x3160…3180 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2c 20 73 68 6f 75 6c 64 20 61 6c 6c 77 ┆he expected pattern, should allw┆
0x3180…31a0 61 79 73 20 62 65 20 30 30 30 30 20 6f 72 20 46 46 46 46 2e 0d 0a 8c 83 c8 0a 3c 72 72 72 72 3e ┆ays be 0000 or FFFF. <rrrr>┆
0x31a0…31c0 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e 0d 0a 0d 0a 0d 0a 54 ┆ is the received pattern. T┆
0x31c0…31e0 68 65 20 6d 65 6d 6f 72 79 20 73 69 7a 65 20 69 73 20 68 61 6e 64 65 64 20 6f 76 65 72 20 74 6f ┆he memory size is handed over to┆
0x31e0…3200 20 74 68 65 20 4d 75 6c 74 69 62 75 73 20 63 6f 6e 66 69 67 75 72 61 74 69 6f 6e 20 0a 70 72 6f ┆ the Multibus configuration pro┆
0x3200…3220 (25,) 67 72 61 6d 20 61 6e 64 20 64 69 73 70 6c 61 79 65 64 20 69 6e 20 74 68 65 20 4d 75 6c 74 69 62 ┆gram and displayed in the Multib┆
0x3220…323c 75 73 20 43 6f 6e 66 69 67 75 72 61 74 69 6f 6e 20 53 63 68 65 64 75 6c 65 2e 0d 0a ┆us Configuration Schedule. ┆
0x323c…323f FormFeed {
0x323c…323f 0c 80 a8 ┆ ┆
0x323c…323f }
0x323f…3240 0a ┆ ┆
0x3240…3260 a1 81 a1 b0 36 2e 20 b0 54 45 53 54 20 31 20 3d 20 f0 43 68 69 70 20 53 65 6c 65 63 74 20 54 65 ┆ 6. TEST 1 = Chip Select Te┆
0x3260…3280 73 74 2e 0d 0a 0d 0a 0d 0a 54 6f 20 65 61 73 65 20 63 6f 6d 70 6c 65 78 20 64 65 62 75 67 67 69 ┆st. To ease complex debuggi┆
0x3280…32a0 6e 67 2c 20 61 20 73 69 6d 70 6c 65 20 63 68 69 70 20 73 65 6c 65 63 74 20 6c 6f 6f 70 2c 20 63 ┆ng, a simple chip select loop, c┆
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0x32c0…32e0 69 73 20 73 75 70 70 6c 69 65 64 2e 20 0d 0a 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 67 65 6e ┆is supplied. This test gen┆
0x32e0…3300 65 72 61 74 65 73 20 63 68 69 70 20 73 65 6c 65 63 74 73 20 74 6f 20 61 6c 6c 20 70 65 72 69 70 ┆erates chip selects to all perip┆
0x3300…3320 68 65 72 61 6c 20 64 65 76 69 63 65 73 20 62 79 20 0a 65 78 65 63 75 74 69 6e 67 20 69 6e 70 75 ┆heral devices by executing inpu┆
0x3320…3340 74 20 69 6e 73 74 72 75 63 74 69 6f 6e 73 20 74 6f 20 61 6c 6c 20 72 65 6c 65 76 61 6e 74 20 49 ┆t instructions to all relevant I┆
0x3340…3360 2f 4f 2d 64 65 76 69 63 65 73 2e 20 54 68 65 73 65 20 0a 61 72 65 20 3a 0d 0a 0d 0a 0d 0a 50 6f ┆/O-devices. These are : Po┆
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0x3380…33a0 2c 20 30 43 43 2c 20 30 43 45 2c 20 30 44 30 2c 20 30 44 32 2c 20 30 44 34 2c 20 30 44 36 2c 20 ┆, 0CC, 0CE, 0D0, 0D2, 0D4, 0D6, ┆
0x33a0…33c0 0a 19 85 80 80 30 44 38 2c 20 30 44 41 2c 20 30 44 43 2c 20 30 44 45 2e 0d 0a 0d 0a 0d 0a 57 68 ┆ 0D8, 0DA, 0DC, 0DE. Wh┆
0x33c0…33e0 65 6e 20 61 6c 6c 20 74 68 65 20 63 68 69 70 20 73 65 6c 65 63 74 73 20 61 72 65 20 6d 61 64 65 ┆en all the chip selects are made┆
0x33e0…3400 2c 20 61 20 70 61 74 74 65 72 6e 20 41 41 35 35 20 68 65 78 2e 20 69 73 20 0a 77 72 69 74 74 65 ┆, a pattern AA55 hex. is writte┆
0x3400…3420 (26,) 6e 20 74 6f 20 61 20 52 41 4d 20 63 65 6c 6c 20 61 6e 64 20 69 6d 6d 65 64 69 61 74 65 6c 79 20 ┆n to a RAM cell and immediately ┆
0x3420…3440 72 65 61 64 20 62 61 63 6b 2e 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 69 73 20 75 6e 61 62 6c ┆read back. This test is unabl┆
0x3440…3460 65 20 74 6f 20 67 65 6e 65 72 61 74 65 20 61 6e 79 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 73 ┆e to generate any error messages┆
0x3460…3480 2e 20 49 74 20 69 73 20 6d 65 61 6e 74 20 0a 6f 6e 6c 79 20 61 73 20 61 20 73 70 65 63 69 61 6c ┆. It is meant only as a special┆
0x3480…3498 20 66 61 73 74 20 73 63 6f 70 65 20 6c 6f 6f 70 20 74 65 73 74 2e 0d 0a ┆ fast scope loop test. ┆
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0x34c0…34e0 49 6e 74 65 72 76 61 6c 20 54 69 6d 65 72 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 74 ┆Interval Timer Test. This t┆
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0x3500…3520 38 32 35 34 20 50 49 54 20 74 69 6d 65 72 20 30 2c 20 75 73 65 64 20 61 73 20 61 20 0a 72 65 61 ┆8254 PIT timer 0, used as a rea┆
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0x3560…3580 61 6c 69 7a 65 64 20 61 73 20 61 20 72 65 61 6c 20 74 69 6d 65 20 63 6c 6f 63 6b 20 77 68 69 63 ┆alized as a real time clock whic┆
0x3580…35a0 68 20 67 65 6e 65 72 61 74 65 73 20 69 6e 74 65 72 72 75 70 74 20 65 76 65 72 79 20 0a 32 30 20 ┆h generates interrupt every 20 ┆
0x35a0…35c0 6d 69 6c 6c 69 73 65 63 6f 6e 64 2e 20 49 66 20 6e 6f 20 74 69 6d 65 72 20 69 6e 74 65 72 72 75 ┆millisecond. If no timer interru┆
0x35c0…35e0 70 74 20 69 73 20 67 65 6e 65 72 61 74 65 64 20 74 68 65 6e 20 61 6e 20 65 72 72 6f 72 20 0a 6d ┆pt is generated then an error m┆
0x35e0…3600 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 20 6c 69 6b 65 20 74 68 69 73 2e 0d 0a ┆essage is generated like this. ┆
0x3600…3620 (27,) 0d 0a 0d 0a a1 a1 a1 e1 b0 f0 31 2e 20 b0 50 49 54 20 54 65 73 74 20 3a 20 6d 69 73 73 69 6e 67 ┆ 1. PIT Test : missing┆
0x3620…3634 20 74 69 6d 65 72 20 30 20 69 6e 74 65 72 72 75 70 74 0d 0a ┆ timer 0 interrupt ┆
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0x3640…3660 53 54 20 33 f0 20 f0 3d 20 50 65 72 73 6f 6e 61 6c 69 74 79 20 50 52 4f 4d 20 54 65 73 74 2e 0d ┆ST 3 = Personality PROM Test. ┆
0x3660…3680 0a 0d 0a 0d 0a 54 68 65 20 70 65 72 73 6f 6e 61 6c 69 74 79 20 50 52 4f 4d 20 74 65 73 74 20 63 ┆ The personality PROM test c┆
0x3680…36a0 61 6c 63 75 6c 61 74 65 73 20 74 68 65 20 63 68 65 63 6b 73 75 6d 20 6f 66 20 74 68 65 20 32 35 ┆alculates the checksum of the 25┆
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0x3780…37a0 b0 39 2e 20 b0 54 45 53 54 20 34 f0 20 3d 20 52 53 20 34 32 32 20 54 65 73 74 2e 0d 0a 0d 0a 0d ┆ 9. TEST 4 = RS 422 Test. ┆
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0x3800…3820 (28,) 70 62 61 63 6b 20 63 69 72 63 75 69 74 72 79 20 6d 61 6b 65 73 20 69 74 20 70 6f 73 73 69 62 6c ┆pback circuitry makes it possibl┆
0x3820…3840 65 20 74 6f 20 0a 72 75 6e 20 74 68 69 73 20 74 65 73 74 20 77 69 74 68 6f 75 74 20 65 78 74 65 ┆e to run this test without exte┆
0x3840…3860 72 6e 61 6c 20 68 61 72 64 77 61 72 65 20 63 6f 6e 6e 65 63 74 65 64 2e 0d 0a 0d 0a 0d 0a 46 69 ┆rnal hardware connected. Fi┆
0x3860…3880 72 73 74 20 74 68 65 20 74 65 73 74 20 76 65 72 69 66 69 65 73 20 74 68 65 20 66 75 6e 63 74 69 ┆rst the test verifies the functi┆
0x3880…38a0 6f 6e 20 6f 66 20 74 68 65 20 43 54 53 20 73 74 61 74 75 73 20 73 69 67 6e 61 6c 2c 20 0a 77 68 ┆on of the CTS status signal, wh┆
0x38a0…38c0 69 63 68 20 69 73 20 74 6f 67 67 6c 65 64 20 62 79 20 44 54 52 20 69 6e 20 6c 6f 6f 70 20 62 61 ┆ich is toggled by DTR in loop ba┆
0x38c0…38e0 63 6b 20 6d 6f 64 65 2c 20 61 6e 64 20 69 66 20 61 6e 20 65 72 72 6f 72 20 6f 63 63 75 72 20 0a ┆ck mode, and if an error occur ┆
0x38e0…3900 61 20 6d 65 73 73 61 67 65 20 69 73 20 64 69 73 70 6c 61 79 65 64 2e 0d 0a 0d 0a 0d 0a 31 2e 20 ┆a message is displayed. 1. ┆
0x3900…3920 b0 52 53 20 34 32 32 20 74 65 73 74 3a 20 52 53 34 32 32 20 43 6c 65 61 72 20 74 6f 20 53 65 6e ┆ RS 422 test: RS422 Clear to Sen┆
0x3920…3940 64 20 65 72 72 6f 72 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 73 74 61 74 75 73 20 73 69 67 6e 61 ┆d error If the status signa┆
0x3940…3960 6c 20 74 65 73 74 20 73 75 63 63 65 65 64 73 20 74 68 65 6e 20 61 20 73 65 72 69 61 6c 20 64 61 ┆l test succeeds then a serial da┆
0x3960…3980 74 61 20 74 72 61 6e 73 70 6f 72 74 20 0a 6f 66 20 61 20 32 20 4b 20 62 79 74 65 20 6c 6f 6e 67 ┆ta transport of a 2 K byte long┆
0x3980…39a0 20 73 6f 75 72 63 65 20 62 75 66 66 65 72 20 74 6f 20 61 6e 20 65 71 75 61 6c 6c 79 20 6c 6f 6e ┆ source buffer to an equally lon┆
0x39a0…39c0 67 20 64 65 73 74 69 6e 61 74 69 6f 6e 20 0a 62 75 66 66 65 72 20 69 73 20 6d 61 64 65 2e 20 57 ┆g destination buffer is made. W┆
0x39c0…39e0 68 65 6e 20 74 68 65 20 64 61 74 61 20 74 72 61 6e 73 70 6f 72 74 20 68 61 73 20 63 6f 6d 70 6c ┆hen the data transport has compl┆
0x39e0…3a00 65 74 65 64 20 74 68 65 20 74 77 6f 20 0a 62 75 66 66 65 72 73 20 61 72 65 20 63 6f 6d 70 61 72 ┆eted the two buffers are compar┆
0x3a00…3a20 (29,) 65 64 2c 20 61 6e 64 20 69 66 20 6e 6f 74 20 65 71 75 61 6c 20 61 6e 20 65 72 72 6f 72 20 6d 65 ┆ed, and if not equal an error me┆
0x3a20…3a40 73 73 61 67 65 20 69 73 20 0a 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 ┆ssage is written to the console┆
0x3a40…3a60 2e 0d 0a 0d 0a 0d 0a 32 2e 20 b0 52 53 20 34 32 32 20 74 65 73 74 3a 20 64 61 74 61 20 65 72 72 ┆. 2. RS 422 test: data err┆
0x3a60…3a80 6f 72 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 64 61 74 61 20 74 72 61 6e 73 70 6f 72 74 20 64 6f ┆or If the data transport do┆
0x3a80…3aa0 65 73 27 6e 74 20 63 6f 6d 70 6c 65 74 65 20 77 69 74 68 69 6e 20 35 20 73 65 63 6f 6e 64 73 20 ┆es'nt complete within 5 seconds ┆
0x3aa0…3ac0 61 20 74 69 6d 65 6f 75 74 20 0a 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e ┆a timeout message is generated.┆
0x3ac0…3ae0 0d 0a 0d 0a 0d 0a 33 2e 20 b0 52 53 20 34 32 32 20 74 65 73 74 3a 20 74 72 61 6e 73 66 65 72 20 ┆ 3. RS 422 test: transfer ┆
0x3ae0…3b00 74 69 6d 65 6f 75 74 0d 0a 0d 0a 0d 0a 49 66 20 61 20 70 61 72 69 74 79 20 69 6e 74 65 72 72 75 ┆timeout If a parity interru┆
0x3b00…3b20 70 74 20 69 73 20 67 65 6e 65 72 61 74 65 64 20 61 6e 6f 74 68 65 72 20 65 72 72 6f 72 20 6d 65 ┆pt is generated another error me┆
0x3b20…3b40 73 73 61 67 65 20 69 73 20 0a 67 65 6e 65 72 61 74 65 64 2e 20 54 68 65 20 55 53 41 52 54 20 69 ┆ssage is generated. The USART i┆
0x3b40…3b60 73 20 6e 6f 74 20 69 6e 69 74 69 61 6c 69 7a 65 64 20 74 6f 20 6f 70 65 72 61 74 65 20 77 69 74 ┆s not initialized to operate wit┆
0x3b60…3b80 68 20 70 61 72 69 74 79 20 73 6f 20 0a 74 68 69 73 20 69 6e 74 65 72 72 75 70 74 20 69 73 20 74 ┆h parity so this interrupt is t┆
0x3b80…3ba0 72 75 6c 79 20 75 6e 65 78 70 65 63 74 65 64 2e 0d 0a 0d 0a 0d 0a 34 2e 20 b0 52 53 20 34 32 32 ┆ruly unexpected. 4. RS 422┆
0x3ba0…3bc0 20 74 65 73 74 3a 20 70 61 72 69 74 79 20 69 6e 74 65 72 72 75 70 74 20 65 72 72 6f 72 0d 0a 0d ┆ test: parity interrupt error ┆
0x3bc0…3be0 0a 0d 0a 54 68 65 20 74 65 73 74 20 65 78 65 63 75 74 65 73 20 61 74 20 39 36 30 30 20 62 61 75 ┆ The test executes at 9600 bau┆
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0x3be7…3c00 0a a1 b0 31 30 2e 20 b0 54 45 53 54 20 35 f0 20 3d 20 52 65 61 6c 20 54 69 ┆ 10. TEST 5 = Real Ti┆
0x3c00…3c20 (30,) 6d 65 20 43 6c 6f 63 6b 20 28 52 54 43 29 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 52 65 ┆me Clock (RTC) Test. The Re┆
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0x3c40…3c60 73 70 6c 61 79 20 74 68 65 20 73 74 61 74 65 20 6f 66 20 74 68 65 20 6f 6e 20 0a 62 6f 61 72 64 ┆splay the state of the on board┆
0x3c60…3c80 20 52 54 43 20 63 68 69 70 2e 20 54 68 65 20 6e 6f 72 6d 61 6c 20 6f 75 74 70 75 74 20 66 72 6f ┆ RTC chip. The normal output fro┆
0x3c80…3ca0 6d 20 74 68 65 20 74 65 73 74 20 6c 6f 6f 6b 73 20 6c 69 6b 65 20 74 68 69 73 2e 0d 0a 0d 0a 0d ┆m the test looks like this. ┆
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0x3cc0…3ce0 3a 68 64 3a 6d 64 3a 73 68 0d 0a 0d 0a 0d 0a 6d 79 20 69 73 20 6d 6f 6e 74 68 20 6f 66 20 79 65 ┆:hd:md:sh my is month of ye┆
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0x3d00…3d20 75 72 20 6f 66 20 64 61 79 2c 20 6d 64 20 69 73 20 0a 6d 69 6e 75 74 65 20 6f 66 20 68 6f 75 72 ┆ur of day, md is minute of hour┆
0x3d20…3d40 20 61 6e 64 20 73 68 20 69 73 20 73 65 63 6f 6e 64 20 6f 66 20 6d 69 6e 75 74 65 2e 0d 0a 0d 0a ┆ and sh is second of minute. ┆
0x3d40…3d60 0d 0a 49 66 20 74 68 65 20 52 54 43 20 74 65 73 74 20 72 65 61 64 73 20 61 6e 20 69 6e 76 61 6c ┆ If the RTC test reads an inval┆
0x3d60…3d80 69 64 20 42 43 44 20 63 6f 64 65 20 66 72 6f 6d 20 74 68 65 20 63 6c 6f 63 6b 20 63 68 69 70 20 ┆id BCD code from the clock chip ┆
0x3d80…3da0 61 6e 20 0a 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d ┆an error message is generated. ┆
0x3da0…3dc0 0a 0d 0a 0d 0a 31 2e 20 b0 52 54 43 20 74 65 73 74 3a 20 72 65 61 64 20 65 72 72 6f 72 0d 0a 0d ┆ 1. RTC test: read error ┆
0x3dc0…3de0 0a 0d 0a 49 66 20 69 74 20 69 73 20 69 6d 70 6f 73 73 69 62 6c 65 20 74 6f 20 72 65 61 64 20 74 ┆ If it is impossible to read t┆
0x3de0…3e00 68 65 20 52 54 43 20 63 6c 6f 63 6b 20 63 68 69 70 20 77 69 74 68 6f 75 74 20 73 74 61 74 75 73 ┆he RTC clock chip without status┆
0x3e00…3e20 (31,) 20 0a 65 72 72 6f 72 20 61 66 74 65 72 20 35 30 20 61 74 74 65 6d 70 74 73 20 61 6e 6f 74 68 65 ┆ error after 50 attempts anothe┆
0x3e20…3e40 72 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d ┆r error message is generated. ┆
0x3e40…3e5f 0a 0d 0a 32 2e 20 b0 52 54 43 20 74 65 73 74 3a 20 73 74 61 74 75 73 20 65 72 72 6f 72 0d 0a ┆ 2. RTC test: status error ┆
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0x3e62…3e80 0a a1 b0 31 31 2e 20 b0 54 45 53 54 20 36 f0 20 3d 20 54 69 6d 65 6f 75 74 20 49 6e 74 65 ┆ 11. TEST 6 = Timeout Inte┆
0x3e80…3ea0 72 72 75 70 74 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 69 73 20 73 75 ┆rrupt Test. This test is su┆
0x3ea0…3ec0 70 70 6c 69 65 64 20 74 6f 20 76 65 72 69 66 79 20 74 68 65 20 66 75 6e 63 74 69 6f 6e 61 6c 69 ┆pplied to verify the functionali┆
0x3ec0…3ee0 74 79 20 6f 66 20 74 68 65 20 74 69 6d 65 6f 75 74 20 0a 69 6e 74 65 72 72 75 70 74 20 6c 6f 67 ┆ty of the timeout interrupt log┆
0x3ee0…3f00 69 63 2e 20 54 68 69 73 20 74 65 73 74 20 67 65 6e 65 72 61 74 65 73 20 61 20 74 69 6d 65 6f 75 ┆ic. This test generates a timeou┆
0x3f00…3f20 74 20 62 79 20 61 6e 20 6f 75 74 20 0a 69 6e 73 74 72 75 63 74 69 6f 6e 20 74 6f 20 70 6f 72 74 ┆t by an out instruction to port┆
0x3f20…3f40 20 30 46 46 46 46 20 68 65 78 61 64 65 63 69 6d 61 6c 2e 20 49 66 20 6e 6f 20 69 6e 74 65 72 72 ┆ 0FFFF hexadecimal. If no interr┆
0x3f40…3f60 75 70 74 20 6f 63 63 75 72 20 61 6e 20 0a 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 ┆upt occur an error message is g┆
0x3f60…3f80 65 6e 65 72 61 74 65 64 2e 09 0a 0d 0a 0d 0a 31 2e 20 f0 b0 54 69 6d 65 6f 75 74 20 69 6e 74 65 ┆enerated. 1. Timeout inte┆
0x3f80…3fa0 72 72 75 70 74 20 74 65 73 74 3a 20 6d 69 73 73 69 6e 67 20 69 6e 74 65 72 72 75 70 74 20 20 72 ┆rrupt test: missing interrupt r┆
0x3fa0…3fc0 65 63 2e 3a 3c 30 30 33 32 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 72 65 63 65 69 76 65 64 20 76 61 6c ┆ec.:<0032> The received val┆
0x3fc0…3fe0 75 65 20 64 69 73 70 6c 61 79 20 74 68 65 20 74 79 70 65 20 6f 66 20 74 68 65 20 69 6e 74 65 72 ┆ue display the type of the inter┆
0x3fe0…4000 72 75 70 74 20 6d 69 73 73 69 6e 67 2e 20 49 66 20 0a 74 68 65 20 69 6e 74 65 72 72 75 70 74 20 ┆rupt missing. If the interrupt ┆
0x4000…4020 (32,) 69 73 20 67 65 6e 65 72 61 74 65 64 20 62 75 74 20 75 6e 61 62 6c 65 20 74 6f 20 72 65 73 65 74 ┆is generated but unable to reset┆
0x4020…4040 20 61 6e 6f 74 68 65 72 20 6d 65 73 73 61 67 65 20 69 73 20 0a 77 72 69 74 74 65 6e 2e 0d 0a 0d ┆ another message is written. ┆
0x4040…4060 0a 0d 0a 32 2e 20 b0 54 69 6d 65 6f 75 74 20 69 6e 74 65 72 72 75 70 74 20 74 65 73 74 3a 20 63 ┆ 2. Timeout interrupt test: c┆
0x4060…4080 61 6e 6e 6f 74 20 72 65 73 65 74 20 69 6e 74 65 72 72 75 70 74 20 72 65 63 2e 3a 3c 30 30 33 32 ┆annot reset interrupt rec.:<0032┆
0x4080…4083 3e 0d 0a ┆> ┆
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0x4086…40a0 0a a1 b0 31 32 2e 20 b0 54 45 53 54 20 37 f0 20 3d 20 49 2f 4f 20 49 6e 74 65 ┆ 12. TEST 7 = I/O Inte┆
0x40a0…40c0 72 72 75 70 74 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 76 65 72 69 66 ┆rrupt Test. This test verif┆
0x40c0…40e0 69 65 73 20 74 68 65 20 38 20 65 78 74 72 61 20 4d 75 6c 74 69 62 75 73 20 69 6e 74 65 72 72 75 ┆ies the 8 extra Multibus interru┆
0x40e0…4100 70 74 20 6d 61 70 70 65 64 20 69 6e 20 74 6f 20 0a 49 2f 4f 20 73 70 61 63 65 2e 20 54 68 65 20 ┆pt mapped in to I/O space. The ┆
0x4100…4120 69 6e 74 65 72 72 75 70 74 73 20 69 73 20 67 65 6e 65 72 61 74 65 64 20 6f 6e 65 20 62 79 20 6f ┆interrupts is generated one by o┆
0x4120…4140 6e 65 20 73 74 61 72 74 69 6e 67 20 77 69 74 68 20 0a 4d 42 20 69 6e 74 65 72 72 75 70 74 20 31 ┆ne starting with MB interrupt 1┆
0x4140…4160 35 20 28 74 79 70 65 20 33 38 29 20 61 6e 64 20 65 6e 64 69 6e 67 20 77 69 74 68 20 69 6e 74 65 ┆5 (type 38) and ending with inte┆
0x4160…4180 72 72 75 70 74 20 38 20 28 74 79 70 65 20 33 33 29 2e 20 0a 49 66 20 6e 6f 20 69 6e 74 65 72 72 ┆rrupt 8 (type 33). If no interr┆
0x4180…41a0 75 70 74 20 6f 63 63 75 72 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 ┆upt occur an error message is ge┆
0x41a0…41c0 6e 65 72 61 74 65 64 2e 09 0d 0a 0d 0a 31 2e 20 f0 b0 49 4f 20 69 6e 74 65 72 72 75 70 74 20 74 ┆nerated. 1. IO interrupt t┆
0x41c0…41e0 65 73 74 3a 20 6d 69 73 73 69 6e 67 20 69 6e 74 65 72 72 75 70 74 20 20 72 65 63 2e 3a 3c 30 30 ┆est: missing interrupt rec.:<00┆
0x41e0…4200 72 72 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 72 65 63 65 69 76 65 64 20 76 61 6c 75 65 20 64 69 73 70 ┆rr> The received value disp┆
0x4200…4220 (33,) 6c 61 79 20 74 68 65 20 74 79 70 65 20 6f 66 20 74 68 65 20 69 6e 74 65 72 72 75 70 74 20 6d 69 ┆lay the type of the interrupt mi┆
0x4220…4240 73 73 69 6e 67 2e 20 49 66 20 0a 74 68 65 20 69 6e 74 65 72 72 75 70 74 20 69 73 20 67 65 6e 65 ┆ssing. If the interrupt is gene┆
0x4240…4260 72 61 74 65 64 20 62 75 74 20 75 6e 61 62 6c 65 20 74 6f 20 72 65 73 65 74 20 61 6e 6f 74 68 65 ┆rated but unable to reset anothe┆
0x4260…4280 72 20 6d 65 73 73 61 67 65 20 69 73 20 0a 77 72 69 74 74 65 6e 2e 0d 0a 0d 0a 0d 0a 32 2e 20 b0 ┆r message is written. 2. ┆
0x4280…42a0 49 4f 20 69 6e 74 65 72 72 75 70 74 20 74 65 73 74 3a 20 63 61 6e 6e 6f 74 20 72 65 73 65 74 20 ┆IO interrupt test: cannot reset ┆
0x42a0…42b7 69 6e 74 65 72 72 75 70 74 20 72 65 63 2e 3a 3c 30 30 72 72 3e 0d 0a ┆interrupt rec.:<00rr> ┆
0x42b7…42ba FormFeed {
0x42b7…42ba 0c 81 88 ┆ ┆
0x42b7…42ba }
0x42ba…42c0 0a a1 b0 31 33 2e ┆ 13.┆
0x42c0…42e0 20 b0 54 45 53 54 20 38 f0 20 3d f0 20 4e 75 6d 65 72 69 63 20 50 72 6f 63 65 73 73 6f 72 20 45 ┆ TEST 8 = Numeric Processor E┆
0x42e0…4300 78 74 65 6e 73 69 6f 6e 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 4e 75 6d 65 72 69 63 20 ┆xtension Test. The Numeric ┆
0x4300…4320 50 72 6f 63 65 73 73 6f 72 20 45 78 74 65 6e 73 69 6f 6e 20 74 65 73 74 20 70 72 6f 67 72 61 6d ┆Processor Extension test program┆
0x4320…4340 20 61 70 70 6c 69 65 73 20 74 6f 20 74 68 65 20 0a 76 65 72 69 66 69 63 61 74 69 6f 6e 20 6f 66 ┆ applies to the verification of┆
0x4340…4360 20 74 68 65 20 38 30 32 38 37 20 63 6f 70 72 6f 63 65 73 73 6f 72 20 61 6e 64 20 69 74 73 20 69 ┆ the 80287 coprocessor and its i┆
0x4360…4380 6e 74 65 72 66 61 63 65 20 63 69 72 63 75 69 74 73 2e 20 0a 49 66 20 6e 6f 20 38 30 32 38 37 20 ┆nterface circuits. If no 80287 ┆
0x4380…43a0 63 6f 70 72 6f 63 65 73 73 6f 72 20 69 73 20 70 72 65 73 65 6e 74 20 28 62 69 74 20 32 20 4d 61 ┆coprocessor is present (bit 2 Ma┆
0x43a0…43c0 63 68 69 6e 65 20 53 74 61 74 75 73 20 57 6f 72 64 20 0a 22 30 22 29 20 74 68 65 6e 20 61 20 6d ┆chine Status Word "0") then a m┆
0x43c0…43e0 65 73 73 61 67 65 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 ┆essage is written to the console┆
0x43e0…4400 20 6c 69 6b 65 20 74 68 69 73 2e 0d 0a 0d 0a 31 2e 20 b0 38 30 32 38 37 20 4e 50 58 20 54 65 73 ┆ like this. 1. 80287 NPX Tes┆
0x4400…4420 (34,) 74 3a 20 4e 50 58 20 6e 6f 74 20 70 72 65 73 65 6e 74 3a 20 4f 4b 0d 0a 0d 0a 0d 0a 4f 74 68 65 ┆t: NPX not present: OK Othe┆
0x4420…4440 72 77 69 73 65 20 69 66 20 74 68 65 20 4e 50 58 20 69 73 20 70 72 65 73 65 6e 74 20 74 68 65 20 ┆rwise if the NPX is present the ┆
0x4440…4460 74 65 73 74 20 70 72 6f 63 65 65 64 73 20 61 6e 64 20 76 65 72 69 66 69 65 73 20 0a 74 68 65 20 ┆test proceeds and verifies the ┆
0x4460…4480 4e 50 58 27 73 20 66 75 6e 63 74 69 6f 6e 2e 20 49 66 20 61 6e 20 65 72 72 6f 72 20 69 73 20 64 ┆NPX's function. If an error is d┆
0x4480…44a0 69 73 63 6f 76 65 72 65 64 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 0a 6c 69 6b 65 ┆iscovered an error message like┆
0x44a0…44c0 20 74 68 69 73 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 2e ┆ this is written to the console.┆
0x44c0…44e0 0d 0a 0d 0a 0d 0a 32 2e 20 b0 38 30 32 38 37 20 4e 50 58 20 54 65 73 74 3a 20 38 30 32 38 37 20 ┆ 2. 80287 NPX Test: 80287 ┆
0x44e0…4500 4e 50 58 20 6e 6f 74 20 4f 4b 0d 0a 0d 0a 0d 0a 54 68 69 73 20 65 72 72 6f 72 20 6d 69 67 68 74 ┆NPX not OK This error might┆
0x4500…4520 20 62 65 20 63 61 75 73 65 64 20 62 79 20 6d 61 6c 66 75 6e 63 74 69 6f 6e 20 6f 66 20 74 68 65 ┆ be caused by malfunction of the┆
0x4520…4540 20 38 30 32 37 38 20 63 68 69 70 2c 20 62 79 20 61 20 0a 66 61 75 6c 74 20 6f 66 20 74 68 65 20 ┆ 80278 chip, by a fault of the ┆
0x4540…4560 69 6e 74 65 72 66 61 63 65 20 63 69 72 63 75 69 74 73 20 2c 20 6f 72 20 62 79 20 73 6f 6d 65 74 ┆interface circuits , or by somet┆
0x4560…456d 68 69 6e 67 20 65 6c 73 65 2e 20 0d 0a ┆hing else. ┆
0x456d…4570 FormFeed {
0x456d…4570 0c 81 a8 ┆ ┆
0x456d…4570 }
0x4570…4580 0a b0 a1 a1 31 34 2e 20 b0 54 45 53 54 20 39 f0 ┆ 14. TEST 9 ┆
0x4580…45a0 20 3d 20 44 69 73 6b 20 43 68 61 6e 6e 65 6c 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 ┆ = Disk Channel Test. This ┆
0x45a0…45c0 74 65 73 74 20 69 73 20 75 73 65 64 20 74 6f 20 65 78 65 72 63 69 73 65 20 61 6e 64 20 76 65 72 ┆test is used to exercise and ver┆
0x45c0…45e0 69 66 79 20 74 68 65 20 64 61 74 61 20 63 68 61 6e 6e 65 6c 20 62 65 74 77 65 65 6e 20 0a 43 50 ┆ify the data channel between CP┆
0x45e0…4600 55 20 36 31 30 20 61 6e 64 20 74 68 65 20 64 69 73 6b 20 63 6f 6e 74 72 6f 6c 6c 65 72 2e 0d 0a ┆U 610 and the disk controller. ┆
0x4600…4620 (35,) 0d 0a 0d 0a 54 68 65 20 66 69 72 73 74 20 70 61 72 74 20 6f 66 20 74 68 69 73 20 74 65 73 74 20 ┆ The first part of this test ┆
0x4620…4640 65 78 65 63 75 74 65 73 20 61 20 22 64 69 73 63 20 64 69 61 67 6e 6f 73 74 69 63 20 63 6f 6d 6d ┆executes a "disc diagnostic comm┆
0x4640…4660 61 6e 64 22 20 0a 74 6f 20 74 68 65 20 64 69 73 63 20 63 6f 6e 74 72 6f 6c 6c 65 72 2e 20 54 68 ┆and" to the disc controller. Th┆
0x4660…4680 69 73 20 63 6f 6d 6d 61 6e 64 20 6f 72 64 65 72 73 20 74 68 65 20 64 69 73 63 20 63 6f 6e 74 72 ┆is command orders the disc contr┆
0x4680…46a0 6f 6c 6c 65 72 20 0a 74 6f 20 76 65 72 69 66 79 20 69 74 73 20 73 65 63 74 6f 72 20 62 75 66 66 ┆oller to verify its sector buff┆
0x46a0…46c0 65 72 20 62 79 20 74 68 65 20 75 73 65 20 6f 66 20 73 65 76 65 72 61 6c 20 63 72 69 74 69 63 61 ┆er by the use of several critica┆
0x46c0…46e0 6c 20 64 61 74 61 20 0a 70 61 74 74 65 72 6e 73 2e 20 49 66 20 74 68 65 20 64 69 73 63 20 63 6f ┆l data patterns. If the disc co┆
0x46e0…4700 6e 74 72 6f 6c 6c 65 72 20 72 65 73 70 6f 6e 64 73 20 77 69 74 68 20 61 6e 20 65 72 72 6f 72 20 ┆ntroller responds with an error ┆
0x4700…4720 74 6f 20 74 68 69 73 20 0a 63 6f 6d 6d 61 6e 64 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 ┆to this command an error messag┆
0x4720…4740 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 31 2e 20 b0 44 69 73 63 20 43 68 ┆e is generated. 1. Disc Ch┆
0x4740…4760 61 6e 6e 65 6c 20 74 65 73 74 3a 20 64 69 73 63 20 64 69 61 67 6e 6f 73 74 69 63 20 65 72 72 6f ┆annel test: disc diagnostic erro┆
0x4760…4780 72 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 64 69 73 63 20 64 6f 65 73 27 6e 74 20 72 65 73 70 6f ┆r If the disc does'nt respo┆
0x4780…47a0 6e 64 20 74 6f 20 74 68 65 20 64 69 73 63 20 64 69 61 67 6e 6f 73 74 69 63 20 63 6f 6d 6d 61 6e ┆nd to the disc diagnostic comman┆
0x47a0…47c0 64 20 77 69 74 68 69 6e 20 0a 38 30 30 20 6d 69 6c 6c 69 73 65 63 6f 6e 64 73 20 61 6e 20 65 72 ┆d within 800 milliseconds an er┆
0x47c0…47e0 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 32 ┆ror message is generated. 2┆
0x47e0…4800 2e 20 b0 44 69 73 63 20 43 68 61 6e 6e 65 6c 20 74 65 73 74 3a 20 74 72 61 6e 73 66 65 72 20 74 ┆. Disc Channel test: transfer t┆
0x4800…4820 (36,) 69 6d 65 6f 75 74 20 6f 72 20 69 6e 74 65 72 72 75 70 74 20 6d 69 73 73 69 6e 67 0d 0a 0d 0a 0d ┆imeout or interrupt missing ┆
0x4820…4840 0a 54 68 65 20 73 65 63 6f 6e 64 20 70 61 72 74 20 6f 66 20 74 68 69 73 20 74 65 73 74 20 65 78 ┆ The second part of this test ex┆
0x4840…4860 65 63 75 74 65 73 20 61 20 22 77 72 69 74 65 20 73 65 63 74 6f 72 20 62 75 66 66 65 72 20 0a 63 ┆ecutes a "write sector buffer c┆
0x4860…4880 6f 6d 6d 61 6e 64 20 22 20 66 6f 6c 6c 6f 77 65 64 20 62 79 20 61 20 22 72 65 61 64 20 73 65 63 ┆ommand " followed by a "read sec┆
0x4880…48a0 74 6f 72 20 62 75 66 66 65 72 20 63 6f 6d 6d 61 6e 64 22 2e 20 54 68 65 20 64 61 74 61 20 0a 72 ┆tor buffer command". The data r┆
0x48a0…48c0 65 61 64 20 62 61 63 6b 20 61 72 65 20 63 6f 6d 70 61 72 65 64 20 74 6f 20 74 68 65 20 77 72 69 ┆ead back are compared to the wri┆
0x48c0…48e0 74 74 65 6e 20 70 61 74 74 65 72 6e 20 61 6e 64 20 69 66 20 6e 6f 74 20 65 71 75 61 6c 20 61 6e ┆tten pattern and if not equal an┆
0x48e0…4900 20 0a 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d ┆ error message is generated. ┆
0x4900…4920 0a 0d 0a b0 b0 f0 33 2e 20 b0 44 69 73 63 20 43 68 61 6e 6e 65 6c 20 74 65 73 74 3a 20 64 69 73 ┆ 3. Disc Channel test: dis┆
0x4920…4940 63 20 63 68 61 6e 6e 65 6c 20 65 72 72 6f 72 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 ┆c channel error segm.:<ssss> add┆
0x4940…4960 72 2e 3a 3c 61 61 61 61 3e 0d 0a 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆r.:<aaaa> ┆
0x4960…4980 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 b0 65 78 70 2e 3a 3c 65 65 65 65 3e 20 ┆ exp.:<eeee> ┆
0x4980…49a0 20 20 72 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 ┆ rec.:<rrrr> The secondary┆
0x49a0…49c0 20 65 72 72 6f 72 20 74 65 78 74 20 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 ┆ error text is interpreted like ┆
0x49c0…49e0 74 68 69 73 20 3a 0d 0a 0d 0a 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 73 65 67 6d 65 ┆this : <ssss> is the segme┆
0x49e0…4a00 6e 74 20 4c 44 54 20 73 65 6c 65 63 74 6f 72 20 28 75 73 65 20 52 43 20 33 39 20 4d 6f 6e 69 74 ┆nt LDT selector (use RC 39 Monit┆
0x4a00…4a20 (37,) 6f 72 20 74 6f 20 0a 19 87 80 80 64 65 74 65 72 6d 69 6e 65 20 74 68 65 20 70 68 79 73 69 63 61 ┆or to determine the physica┆
0x4a20…4a40 6c 20 61 64 64 72 65 73 73 20 2d 20 58 4c 44 54 20 3c 73 73 73 73 3e 29 0d 0a 3c 61 61 61 61 3e ┆l address - XLDT <ssss>) <aaaa>┆
0x4a40…4a60 20 69 73 20 74 68 65 20 73 65 67 6d 65 6e 74 20 6f 66 66 73 65 74 0d 0a 3c 65 65 65 65 3e 20 69 ┆ is the segment offset <eeee> i┆
0x4a60…4a80 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2c 20 73 68 6f 75 6c 64 20 61 ┆s the expected pattern, should a┆
0x4a80…4aa0 6c 6c 77 61 79 73 20 62 65 20 30 30 30 30 20 6f 72 20 46 46 46 46 2e 0d 0a 3c 72 72 72 72 3e 20 ┆llways be 0000 or FFFF. <rrrr> ┆
0x4aa0…4ac0 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e 0d 0a 0d 0a 0d 0a 4f 74 ┆is the received pattern. Ot┆
0x4ac0…4ae0 68 65 72 77 69 73 65 2e 20 49 66 20 61 6e 20 65 72 72 6f 72 20 6f 66 20 74 68 65 20 64 69 73 63 ┆herwise. If an error of the disc┆
0x4ae0…4b00 20 69 73 20 64 69 73 63 6f 76 65 72 65 64 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 ┆ is discovered an error message ┆
0x4b00…4b20 0a 6c 69 6b 65 20 74 68 69 73 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e ┆ like this is written to the con┆
0x4b20…4b40 73 6f 6c 65 2e 0d 0a 0d 0a 0d 0a 82 34 2e 20 b0 44 69 73 63 20 43 68 61 6e 6e 65 6c 20 74 65 73 ┆sole. 4. Disc Channel tes┆
0x4b40…4b60 74 3a 20 64 69 73 63 20 63 6f 6d 6d 61 6e 64 20 65 72 72 6f 72 0d 0a 0d 0a 0d 0a 54 68 69 73 20 ┆t: disc command error This ┆
0x4b60…4b80 65 72 72 6f 72 20 6d 69 67 68 74 20 62 65 20 63 61 75 73 65 64 20 62 79 20 6d 61 6c 66 75 6e 63 ┆error might be caused by malfunc┆
0x4b80…4ba0 74 69 6f 6e 20 6f 66 20 74 68 65 20 64 69 73 63 2c 20 62 79 20 61 20 66 61 75 6c 74 20 0a 6f 66 ┆tion of the disc, by a fault of┆
0x4ba0…4bc0 20 74 68 65 20 69 6e 74 65 72 66 61 63 65 20 63 69 72 63 75 69 74 73 20 2c 20 6f 72 20 62 79 20 ┆ the interface circuits , or by ┆
0x4bc0…4bd2 73 6f 6d 65 74 68 69 6e 67 20 65 6c 73 65 2e 20 0d 0a ┆something else. ┆
0x4bd2…4bd5 FormFeed {
0x4bd2…4bd5 0c 83 a8 ┆ ┆
0x4bd2…4bd5 }
0x4bd5…4be0 0a a1 a1 b0 31 35 2e 20 b0 54 45 ┆ 15. TE┆
0x4be0…4c00 53 54 20 31 30 f0 20 3d 20 57 69 6e 63 68 65 73 74 65 72 20 44 69 73 63 20 54 65 73 74 2e 0d 0a ┆ST 10 = Winchester Disc Test. ┆
0x4c00…4c20 (38,) 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 76 65 72 69 66 69 65 73 20 74 68 65 20 b0 f0 66 75 6e ┆ This test verifies the fun┆
0x4c20…4c40 63 74 69 6f 6e 61 6c 69 74 79 20 6f 66 20 74 68 65 20 77 69 6e 63 68 65 73 74 65 72 20 64 69 73 ┆ctionality of the winchester dis┆
0x4c40…4c60 6b 20 0a 19 80 81 80 64 72 69 76 65 20 61 6e 64 20 74 68 65 20 64 69 73 6b 20 63 6f 6e 74 72 6f ┆k drive and the disk contro┆
0x4c60…4c80 6c 6c 65 72 20 62 6f 61 72 64 2c 20 6e 6f 74 20 74 68 65 20 77 69 6e 63 68 65 73 74 65 72 20 6d ┆ller board, not the winchester m┆
0x4c80…4ca0 65 64 69 61 20 0a 19 80 81 80 69 74 73 65 6c 66 2e 20 54 68 65 20 66 6f 72 6d 61 74 20 6f 66 20 ┆edia itself. The format of ┆
0x4ca0…4cc0 74 68 65 20 77 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 74 72 61 63 6b 20 31 20 6d 75 73 74 ┆the winchester disk track 1 must┆
0x4cc0…4ce0 20 62 65 20 0a 19 80 81 80 66 6f 72 6d 61 74 74 65 64 20 70 72 6f 70 65 72 6c 79 20 70 72 69 6f ┆ be formatted properly prio┆
0x4ce0…4d00 72 20 74 6f 20 74 68 65 20 74 65 73 74 2c 20 69 74 20 69 73 20 66 69 78 65 64 20 61 6e 64 20 69 ┆r to the test, it is fixed and i┆
0x4d00…4d20 73 2e 0d 0a 0d 0a 0d 0a 09 09 09 84 31 30 32 34 20 62 79 74 65 73 2f 73 65 63 74 6f 72 2e 0d 0a ┆s. 1024 bytes/sector. ┆
0x4d20…4d40 09 09 09 39 20 73 65 63 74 6f 72 73 2f 74 72 61 63 6b 2e 0d 0a 09 09 09 32 20 68 65 61 64 73 2f ┆ 9 sectors/track. 2 heads/┆
0x4d40…4d60 63 79 6c 69 6e 64 65 72 2e 0d 0a 09 09 09 31 20 63 79 6c 69 6e 64 65 72 2f 64 69 73 6b 2e 0d 0a ┆cylinder. 1 cylinder/disk. ┆
0x4d60…4d80 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 76 65 72 69 66 69 65 73 20 6f 6e 6c 79 20 6f 6e 20 74 ┆ This test verifies only on t┆
0x4d80…4da0 72 61 63 6b 20 6f 66 20 74 68 65 20 77 69 6e 63 68 65 73 74 65 72 20 64 69 73 63 20 74 68 65 20 ┆rack of the winchester disc the ┆
0x4da0…4dc0 0a 22 74 65 73 74 2d 74 72 61 63 6b 22 20 67 69 76 65 6e 20 62 79 20 74 68 65 20 64 69 73 63 20 ┆ "test-track" given by the disc ┆
0x4dc0…4de0 64 65 73 63 72 69 70 74 69 6f 6e 20 6f 6e 20 74 72 61 63 6b 20 31 2e 20 0a 54 68 65 20 66 69 72 ┆description on track 1. The fir┆
0x4de0…4e00 73 74 20 70 61 72 74 20 6f 66 20 74 68 69 73 20 74 65 73 74 20 65 78 65 63 75 74 65 73 20 61 20 ┆st part of this test executes a ┆
0x4e00…4e20 (39,) 22 72 65 61 64 20 63 6f 6d 6d 61 6e 64 22 2c 20 74 68 69 73 20 0a 63 6f 6d 6d 61 6e 64 20 72 65 ┆"read command", this command re┆
0x4e20…4e40 61 64 73 20 20 64 69 73 63 20 63 68 61 72 61 63 74 65 72 69 73 74 69 63 20 70 61 72 61 6d 65 74 ┆ads disc characteristic paramet┆
0x4e40…4e60 72 65 73 20 77 68 69 63 68 20 73 70 65 63 69 66 69 65 73 20 61 20 0a 64 65 66 61 75 6c 74 20 6f ┆res which specifies a default o┆
0x4e60…4e80 72 20 63 75 72 72 65 6e 74 20 70 61 72 61 6d 65 74 65 72 20 76 61 6c 75 65 20 66 6f 72 20 64 69 ┆r current parameter value for di┆
0x4e80…4ea0 73 63 20 61 6e 64 20 69 73 20 70 6c 61 63 65 64 20 6f 6e 20 74 68 65 20 0a 73 65 63 74 6f 72 20 ┆sc and is placed on the sector ┆
0x4ea0…4ec0 30 20 6f 66 20 74 72 61 63 6b 20 31 2e 20 54 68 69 73 20 76 61 6c 75 65 20 72 65 6d 61 69 6e 73 ┆0 of track 1. This value remains┆
0x4ec0…4ee0 20 75 6e 63 68 61 6e 67 65 64 20 61 6e 64 20 69 73 20 75 73 65 64 20 74 6f 20 0a 69 6e 69 74 69 ┆ unchanged and is used to initi┆
0x4ee0…4f00 61 6c 69 7a 65 20 77 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 63 6f 6e 74 72 6f 6c 6c 65 72 ┆alize winchester disk controller┆
0x4f00…4f20 2e 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 64 69 73 63 20 63 6f 6e 74 72 6f 6c 6c 65 72 20 72 65 ┆. If the disc controller re┆
0x4f20…4f40 73 70 6f 6e 64 73 20 77 69 74 68 20 61 6e 20 65 72 72 6f 72 20 74 6f 20 74 68 69 73 20 63 6f 6d ┆sponds with an error to this com┆
0x4f40…4f60 6d 61 6e 64 20 61 6e 20 0a 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 ┆mand an error message is genera┆
0x4f60…4f80 74 65 64 2e 0d 0a 0d 0a 0d 0a 31 2e 20 b0 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 74 65 ┆ted. 1. Winchester disk te┆
0x4f80…4fa0 73 74 3a 20 57 69 6e 63 68 65 73 74 65 72 20 63 61 6e 20 6e 6f 74 20 72 65 61 64 20 20 20 20 20 ┆st: Winchester can not read ┆
0x4fa0…4fc0 72 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a 0d 0a 0d 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 65 ┆rec.:<rrrr> <rrrr> is the e┆
0x4fc0…4fe0 72 72 6f 72 20 63 6f 64 65 20 66 72 6f 6d 20 74 68 65 20 64 69 73 63 20 63 6f 6e 74 72 6f 6c 6c ┆rror code from the disc controll┆
0x4fe0…5000 65 72 2e 20 54 68 65 20 4f 4d 54 49 20 0a 52 65 66 65 72 65 6e 63 65 20 4d 61 6e 75 61 6c 20 28 ┆er. The OMTI Reference Manual (┆
0x5000…5020 (40,) 53 44 43 20 36 39 31 29 20 41 70 70 65 6e 64 69 78 20 42 20 67 69 76 65 73 20 74 68 65 20 69 6e ┆SDC 691) Appendix B gives the in┆
0x5020…5040 66 6f 72 6d 61 74 69 6f 6e 20 61 62 6f 75 74 20 0a 74 68 69 73 20 65 72 72 6f 72 20 63 6f 64 65 ┆formation about this error code┆
0x5040…5060 2e 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 64 69 73 6b 20 63 6f 6e 74 72 6f 6c 6c 65 72 20 64 6f ┆. If the disk controller do┆
0x5060…5080 65 73 27 6e 74 20 72 65 73 70 6f 6e 64 20 74 6f 20 61 20 64 69 73 6b 27 73 20 63 6f 6d 6d 61 6e ┆es'nt respond to a disk's comman┆
0x5080…50a0 64 20 77 69 74 68 69 6e 20 0a 31 20 73 65 63 6f 6e 64 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 ┆d within 1 second an error mess┆
0x50a0…50c0 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 32 b0 2e 20 57 69 6e 63 68 ┆age is generated. 2 . Winch┆
0x50c0…50e0 65 73 74 65 72 20 64 69 73 6b 20 74 65 73 74 3a 20 74 72 61 6e 73 66 65 72 20 74 69 6d 65 6f 75 ┆ester disk test: transfer timeou┆
0x50e0…5100 74 20 6f 72 20 69 6e 74 65 72 72 75 70 74 20 6d 69 73 73 69 6e 67 0d 0a 0d 0a 0d 0a 49 66 20 74 ┆t or interrupt missing If t┆
0x5100…5120 68 65 20 74 65 73 74 20 64 69 73 63 6f 76 65 72 73 20 74 68 61 74 20 74 68 65 20 77 69 6e 63 68 ┆he test discovers that the winch┆
0x5120…5140 65 73 74 65 72 20 64 69 73 6b 20 69 73 6e 27 74 20 66 6f 72 6d 61 74 74 65 64 20 20 61 20 0a 6d ┆ester disk isn't formatted a m┆
0x5140…5160 65 73 73 61 67 65 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 ┆essage is written to the console┆
0x5160…5180 20 6c 69 6b 65 20 74 68 69 73 2e 0d 0a 0d 0a 0d 0a b0 b0 57 69 6e 63 68 65 73 74 65 72 20 64 69 ┆ like this. Winchester di┆
0x5180…51a0 73 6b 20 74 65 73 74 3a 20 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 6e 6f 74 20 66 6f 72 ┆sk test: Winchester disk not for┆
0x51a0…51c0 6d 61 74 74 65 64 20 3a 20 4f 4b 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 66 69 72 73 74 20 73 74 ┆matted : OK If the first st┆
0x51c0…51e0 65 70 20 77 65 6e 74 20 73 75 63 63 65 73 66 75 6c 6c 20 74 68 65 20 74 65 73 74 20 67 6f 69 6e ┆ep went succesfull the test goin┆
0x51e0…5200 67 20 74 6f 20 74 68 65 20 73 65 63 6f 6e 64 20 0a 70 61 72 74 2e 20 54 68 65 20 73 65 63 6f 6e ┆g to the second part. The secon┆
0x5200…5220 (41,) 64 20 70 61 72 74 20 6f 66 20 74 68 69 73 20 74 65 73 74 20 65 78 65 63 75 74 65 73 20 61 20 22 ┆d part of this test executes a "┆
0x5220…5240 77 72 69 74 65 20 74 65 73 74 20 73 65 63 74 6f 72 20 0a 63 6f 6d 6d 61 6e 64 20 22 20 66 6f 6c ┆write test sector command " fol┆
0x5240…5260 6c 6f 77 65 64 20 62 79 20 61 20 22 72 65 61 64 20 74 65 73 74 20 73 65 63 74 6f 72 20 63 6f 6d ┆lowed by a "read test sector com┆
0x5260…5280 6d 61 6e 64 22 2e 20 41 20 70 61 74 74 65 72 6e 20 69 73 20 0a 77 72 69 74 74 65 6e 20 74 6f 20 ┆mand". A pattern is written to ┆
0x5280…52a0 74 68 65 20 74 65 73 74 20 73 65 63 74 6f 72 2c 20 61 6e 64 20 74 68 65 20 64 69 73 63 20 63 6f ┆the test sector, and the disc co┆
0x52a0…52c0 6e 74 72 6f 6c 6c 65 72 20 6d 61 79 20 72 65 73 70 6f 6e 64 20 0a 77 69 74 68 20 61 6e 20 65 72 ┆ntroller may respond with an er┆
0x52c0…52e0 72 6f 72 20 77 68 69 63 68 20 6d 61 6b 65 73 20 74 68 65 20 74 65 73 74 20 70 72 6f 67 72 61 6d ┆ror which makes the test program┆
0x52e0…5300 20 77 72 69 74 65 20 61 6e 20 65 72 72 6f 72 20 0a 6d 65 73 73 61 67 65 2e 0d 0a 0d 0a 0d 0a 8c ┆ write an error message. ┆
0x5300…5320 83 d0 0a 33 2e 20 b0 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 74 65 73 74 3a 20 57 69 6e ┆ 3. Winchester disk test: Win┆
0x5320…5340 63 68 65 73 74 65 72 20 63 61 6e 20 6e 6f 74 20 77 72 69 74 65 20 20 20 20 72 65 63 2e 3a 3c 72 ┆chester can not write rec.:<r┆
0x5340…5360 72 72 72 3e 0d 0a 0d 0a 0d 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 65 72 72 6f 72 20 63 6f ┆rrr> <rrrr> is the error co┆
0x5360…5380 64 65 20 66 72 6f 6d 20 74 68 65 20 64 69 73 63 20 63 6f 6e 74 72 6f 6c 6c 65 72 2e 20 54 68 65 ┆de from the disc controller. The┆
0x5380…53a0 20 4f 4d 54 49 20 0a 52 65 66 65 72 65 6e 63 65 20 4d 61 6e 75 61 6c 20 28 53 44 43 20 36 39 31 ┆ OMTI Reference Manual (SDC 691┆
0x53a0…53c0 29 20 41 70 70 65 6e 64 69 78 20 42 20 67 69 76 65 73 20 74 68 65 20 69 6e 66 6f 72 6d 61 74 69 ┆) Appendix B gives the informati┆
0x53c0…53e0 6f 6e 20 61 62 6f 75 74 20 0a 74 68 69 73 20 65 72 72 6f 72 20 63 6f 64 65 2e 0d 0a 0d 0a 0d 0a ┆on about this error code. ┆
0x53e0…5400 49 66 20 6e 6f 20 65 72 72 6f 72 20 68 61 73 20 68 61 70 70 65 6e 64 20 75 6e 74 69 6c 20 6e 6f ┆If no error has happend until no┆
0x5400…5420 (42,) 77 20 74 68 65 20 73 65 63 74 6f 72 20 69 73 20 72 65 61 64 20 62 61 63 6b 20 61 6e 64 20 0a 63 ┆w the sector is read back and c┆
0x5420…5440 6f 6d 70 61 72 65 64 20 74 6f 20 74 68 65 20 6f 72 69 67 69 6e 61 6c 20 6f 6e 65 2c 20 61 6e 64 ┆ompared to the original one, and┆
0x5440…5460 20 69 66 20 65 71 75 61 6c 20 74 68 65 20 74 65 73 74 20 69 73 20 72 65 70 65 61 74 65 64 20 0a ┆ if equal the test is repeated ┆
0x5460…5480 6f 6e 20 74 68 65 20 6e 65 78 74 20 73 65 63 74 6f 72 20 75 6e 74 69 6c 20 65 6e 64 20 6f 66 20 ┆on the next sector until end of ┆
0x5480…54a0 74 65 73 74 20 74 72 61 63 6b 20 2c 20 6f 74 68 65 72 77 69 73 65 20 61 6e 20 65 72 72 6f 72 20 ┆test track , otherwise an error ┆
0x54a0…54c0 0a 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 34 2e 20 b0 ┆ message is generated. 4. ┆
0x54c0…54e0 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 74 65 73 74 3a 20 62 61 64 20 74 65 73 74 20 73 ┆Winchester disk test: bad test s┆
0x54e0…5500 65 63 74 6f 72 20 73 65 63 74 6f 72 2e 3a 3c 64 64 64 64 3e 2c 20 0a 19 80 81 82 20 20 20 20 20 ┆ector sector.:<dddd>, ┆
0x5500…5520 20 20 20 20 20 20 20 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 2c b0 20 61 64 64 72 2e 3a 3c 61 61 ┆ segm.:<ssss>, addr.:<aa┆
0x5520…5540 61 61 3e 2c 20 65 78 70 2e 3a 3c 65 65 65 65 3e 2c 20 72 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a 0d ┆aa>, exp.:<eeee>, rec.:<rrrr> ┆
0x5540…5560 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 65 72 72 6f 72 20 74 65 78 74 20 69 73 20 69 ┆ The secondary error text is i┆
0x5560…5580 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d 0a 0d 0a 0d 0a 3c 64 64 64 ┆nterpreted like this : <ddd┆
0x5580…55a0 64 3e 20 67 69 76 65 73 20 74 68 65 20 61 64 64 72 65 73 73 20 6f 66 20 74 68 65 20 62 61 64 20 ┆d> gives the address of the bad ┆
0x55a0…55c0 74 65 73 74 20 73 65 63 74 6f 72 2e 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 73 65 67 ┆test sector. <ssss> is the seg┆
0x55c0…55e0 6d 65 6e 74 20 4c 44 54 20 73 65 6c 65 63 74 6f 72 20 28 75 73 65 20 52 43 20 33 39 20 4d 6f 6e ┆ment LDT selector (use RC 39 Mon┆
0x55e0…5600 69 74 6f 72 20 74 6f 20 0a 19 87 80 80 64 65 74 65 72 6d 69 6e 65 20 74 68 65 20 70 68 79 73 69 ┆itor to determine the physi┆
0x5600…5620 (43,) 63 61 6c 20 61 64 64 72 65 73 73 20 2d 20 58 4c 44 54 20 3c 73 73 73 73 3e 29 2e 0d 0a 3c 61 61 ┆cal address - XLDT <ssss>). <aa┆
0x5620…5640 61 61 3e 20 69 73 20 74 68 65 20 73 65 67 6d 65 6e 74 20 6f 66 66 73 65 74 2e 0d 0a 3c 65 65 65 ┆aa> is the segment offset. <eee┆
0x5640…5660 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2e 0d 0a 3c 72 72 ┆e> is the expected pattern. <rr┆
0x5660…5680 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e 0d 0a 0d 0a ┆rr> is the received pattern. ┆
0x5680…56a0 0d 0a 4f 74 68 65 72 77 69 73 65 2e 20 49 66 20 61 6e 20 65 72 72 6f 72 20 6f 66 20 74 68 65 20 ┆ Otherwise. If an error of the ┆
0x56a0…56c0 64 69 73 6b 20 63 6f 6e 74 72 6f 6c 6c 65 72 20 6f 72 20 6f 66 20 74 68 65 20 64 69 73 6b 20 0a ┆disk controller or of the disk ┆
0x56c0…56e0 64 72 69 76 65 20 69 73 20 64 69 73 63 6f 76 65 72 65 64 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 ┆drive is discovered an error mes┆
0x56e0…5700 73 61 67 65 20 6c 69 6b 65 20 74 68 69 73 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 ┆sage like this is written to the┆
0x5700…5720 20 0a 63 6f 6e 73 6f 6c 65 2e 0d 0a 0d 0a 0d 0a 82 35 2e 20 b0 57 69 6e 63 68 65 73 74 65 72 20 ┆ console. 5. Winchester ┆
0x5720…5740 64 69 73 6b 20 74 65 73 74 3a 20 64 69 73 6b 20 63 6f 6d 6d 61 6e 64 20 65 72 72 6f 72 0d 0a 0d ┆disk test: disk command error ┆
0x5740…5760 0a 0d 0a 54 68 69 73 20 65 72 72 6f 72 20 6d 69 67 68 74 20 62 65 20 63 61 75 73 65 64 20 62 79 ┆ This error might be caused by┆
0x5760…5780 20 6d 61 6c 66 75 6e 63 74 69 6f 6e 20 6f 66 20 74 68 65 20 64 69 73 63 2c 20 62 79 20 61 20 66 ┆ malfunction of the disc, by a f┆
0x5780…57a0 61 75 6c 74 20 0a 6f 66 20 74 68 65 20 69 6e 74 65 72 66 61 63 65 20 63 69 72 63 75 69 74 73 20 ┆ault of the interface circuits ┆
0x57a0…57b9 2c 20 6f 72 20 62 79 20 73 6f 6d 65 74 68 69 6e 67 20 65 6c 73 65 2e 0d 0a ┆, or by something else. ┆
0x57b9…57bc FormFeed {
0x57b9…57bc 0c 82 b8 ┆ ┆
0x57b9…57bc }
0x57bc…57c0 0a a1 b0 31 ┆ 1┆
0x57c0…57e0 36 2e 20 b0 54 45 53 54 20 31 31 20 3d f0 20 4d 75 6c 74 69 62 75 73 20 43 6f 6e 66 69 67 75 72 ┆6. TEST 11 = Multibus Configur┆
0x57e0…5800 61 74 69 6f 6e 2e 0d 0a 0d 0a 0d 0a 57 68 65 6e 20 74 68 65 20 43 50 55 20 36 31 30 20 68 61 73 ┆ation. When the CPU 610 has┆
0x5800…5820 (44,) 20 66 69 6e 69 73 68 65 64 20 69 74 73 20 6f 77 6e 20 73 65 6c 66 74 65 73 74 20 69 74 20 77 69 ┆ finished its own selftest it wi┆
0x5820…5840 6c 6c 20 6d 61 6b 65 20 61 20 0a 4d 75 6c 74 69 62 75 73 20 63 6f 6e 66 69 67 75 72 61 74 69 6f ┆ll make a Multibus configuratio┆
0x5840…5860 6e 2e 20 45 76 65 72 79 20 52 43 2d 6d 61 6e 75 66 61 63 74 75 72 65 64 20 53 42 43 20 63 61 72 ┆n. Every RC-manufactured SBC car┆
0x5860…5880 64 20 69 73 20 6c 6f 63 61 74 65 64 20 0a 77 69 74 68 20 69 74 73 20 44 75 61 6c 2d 50 6f 72 74 ┆d is located with its Dual-Port┆
0x5880…58a0 65 64 20 52 41 4d 20 65 6e 64 69 6e 67 20 6f 6e 20 61 20 36 34 20 4b 42 20 62 6f 75 6e 64 61 72 ┆ed RAM ending on a 64 KB boundar┆
0x58a0…58c0 79 20 61 64 64 72 65 73 73 2e 20 57 68 65 6e 20 0a 61 20 52 43 20 33 39 20 53 42 43 20 73 74 61 ┆y address. When a RC 39 SBC sta┆
0x58c0…58e0 72 74 73 20 74 68 65 20 65 78 65 63 75 74 69 6f 6e 20 6f 66 20 69 74 73 20 73 65 6c 66 74 65 73 ┆rts the execution of its selftes┆
0x58e0…5900 74 20 70 72 6f 67 72 61 6d 20 69 74 20 0a 69 6d 6d 65 64 69 61 74 65 6c 79 20 69 6e 69 74 69 61 ┆t program it immediately initia┆
0x5900…5920 6c 69 7a 65 73 20 74 68 65 20 6c 61 73 74 20 77 6f 72 64 20 69 6e 20 69 74 73 20 44 75 61 6c 2d ┆lizes the last word in its Dual-┆
0x5920…5940 50 6f 72 74 65 64 20 52 41 4d 20 77 69 74 68 20 0a 61 20 73 70 65 63 69 61 6c 20 70 61 74 74 65 ┆Ported RAM with a special patte┆
0x5940…5960 72 6e 20 63 6f 72 72 65 73 70 6f 6e 64 69 6e 67 20 74 6f 20 22 6e 6f 74 2d 72 65 61 64 79 22 2e ┆rn corresponding to "not-ready".┆
0x5960…5980 20 57 68 65 6e 20 74 68 65 20 74 65 73 74 20 69 73 20 0a 74 65 72 6d 69 6e 61 74 65 64 20 77 69 ┆ When the test is terminated wi┆
0x5980…59a0 74 68 20 6f 72 20 77 69 74 68 6f 75 74 20 61 6e 20 65 72 72 6f 72 20 74 68 65 20 70 61 74 74 65 ┆th or without an error the patte┆
0x59a0…59c0 72 6e 20 69 73 20 63 68 61 6e 67 65 64 20 74 6f 20 0a 22 72 65 61 64 79 22 2e 20 52 65 61 64 79 ┆rn is changed to "ready". Ready┆
0x59c0…59e0 20 69 6e 64 69 63 61 74 65 73 20 74 6f 20 74 68 65 20 22 74 65 73 74 2d 6d 61 73 74 65 72 22 20 ┆ indicates to the "test-master" ┆
0x59e0…5a00 74 68 61 74 20 74 68 65 20 53 42 43 20 69 73 20 0a 72 65 61 64 79 20 74 6f 20 63 6f 6d 6d 75 6e ┆that the SBC is ready to commun┆
0x5a00…5a20 (45,) 69 63 61 74 65 2e 20 42 6f 74 68 20 74 68 65 20 22 6e 6f 74 2d 72 65 61 64 79 22 20 70 61 74 74 ┆icate. Both the "not-ready" patt┆
0x5a20…5a40 65 72 6e 20 61 6e 64 20 74 68 65 20 0a 22 72 65 61 64 79 22 20 70 61 74 74 65 72 6e 20 6d 75 73 ┆ern and the "ready" pattern mus┆
0x5a40…5a60 74 20 6f 66 20 63 6f 75 72 73 65 20 62 65 20 64 69 66 66 65 72 65 6e 74 20 66 72 6f 6d 20 74 68 ┆t of course be different from th┆
0x5a60…5a80 65 20 70 61 74 74 65 72 6e 20 0a 77 68 69 63 68 20 69 73 20 72 65 61 64 20 62 79 20 74 68 65 20 ┆e pattern which is read by the ┆
0x5a80…5aa0 22 74 65 73 74 2d 6d 61 73 74 65 72 22 20 77 68 65 6e 20 72 65 61 64 69 6e 67 20 66 72 6f 6d 20 ┆"test-master" when reading from ┆
0x5aa0…5ac0 61 20 4d 75 6c 74 69 62 75 73 20 0a 61 64 64 72 65 73 73 20 77 69 74 68 20 6e 6f 6e 2d 65 78 69 ┆a Multibus address with non-exi┆
0x5ac0…5ae0 73 74 69 6e 67 20 52 41 4d 20 28 62 75 73 20 61 63 6b 6e 6f 77 6c 65 64 67 65 20 74 69 6d 65 6f ┆sting RAM (bus acknowledge timeo┆
0x5ae0…5b00 75 74 20 61 73 73 75 6d 65 64 29 2e 0d 0a 0d 0a 0d 0a 54 68 65 20 68 61 72 64 77 61 72 65 20 63 ┆ut assumed). The hardware c┆
0x5b00…5b20 6f 6e 66 69 67 75 72 61 74 69 6f 6e 20 70 72 6f 63 65 73 73 20 69 73 20 70 6f 73 73 69 62 6c 65 ┆onfiguration process is possible┆
0x5b20…5b40 20 64 75 65 20 74 6f 20 74 68 65 20 66 61 63 74 20 0a 74 68 61 74 20 61 6c 6c 20 74 68 65 20 22 ┆ due to the fact that all the "┆
0x5b40…5b60 74 65 73 74 2d 73 6c 61 76 65 73 22 20 63 6f 6d 6d 75 6e 69 63 61 74 65 73 20 77 69 74 68 20 74 ┆test-slaves" communicates with t┆
0x5b60…5b80 68 65 20 22 74 65 73 74 2d 6d 61 73 74 65 72 22 20 0a 74 72 6f 75 67 68 20 44 50 2d 52 41 4d 20 ┆he "test-master" trough DP-RAM ┆
0x5b80…5ba0 6c 6f 63 61 74 65 64 20 74 6f 20 65 6e 64 20 6f 6e 20 36 34 20 4b 20 62 6f 75 6e 64 61 72 69 65 ┆located to end on 64 K boundarie┆
0x5ba0…5bc0 73 2e 20 54 68 69 73 20 6d 69 6e 69 6d 69 7a 65 73 20 0a 74 68 65 20 63 6f 6e 66 69 67 75 72 61 ┆s. This minimizes the configura┆
0x5bc0…5be0 74 69 6f 6e 20 61 74 74 65 6d 70 74 73 20 74 6f 20 61 20 6d 61 78 69 6d 75 6d 20 6f 66 20 33 32 ┆tion attempts to a maximum of 32┆
0x5be0…5c00 20 65 6e 74 72 69 65 73 20 0a 28 63 6f 6e 74 72 6f 6c 6c 65 72 73 20 61 72 65 20 70 6c 61 63 65 ┆ entries (controllers are place┆
0x5c00…5c20 (46,) 64 20 62 65 74 77 65 65 6e 20 4d 75 6c 74 69 62 75 73 20 61 64 64 72 65 73 73 65 73 20 38 30 30 ┆d between Multibus addresses 800┆
0x5c20…5c40 30 30 30 2d 41 30 30 30 30 30 20 0a 68 65 78 65 64 65 63 69 6d 61 6c 29 2e 20 44 75 72 69 6e 67 ┆000-A00000 hexedecimal). During┆
0x5c40…5c60 20 74 68 65 20 63 6f 6e 66 69 67 75 72 61 74 69 6f 6e 20 70 72 6f 63 65 73 73 20 74 68 65 20 22 ┆ the configuration process the "┆
0x5c60…5c80 74 65 73 74 2d 6d 61 73 74 65 72 22 20 0a 73 74 61 72 74 73 20 72 65 61 64 69 6e 67 20 66 72 6f ┆test-master" starts reading fro┆
0x5c80…5ca0 6d 20 74 68 65 20 74 6f 70 20 6f 66 20 74 68 65 20 63 6f 6e 74 72 6f 6c 6c 65 72 20 61 64 64 72 ┆m the top of the controller addr┆
0x5ca0…5cc0 65 73 73 20 73 70 61 63 65 20 0a 28 61 64 64 72 65 73 73 20 39 46 46 46 46 46 20 68 65 78 61 64 ┆ess space (address 9FFFFF hexad┆
0x5cc0…5ce0 65 63 69 6d 61 6c 29 2e 20 49 66 20 61 20 70 61 74 74 65 72 6e 20 65 71 75 61 6c 20 74 6f 20 22 ┆ecimal). If a pattern equal to "┆
0x5ce0…5d00 6e 6f 74 2d 72 65 61 64 79 22 20 0a 6f 72 20 22 72 65 61 64 79 22 20 69 73 20 66 6f 75 6e 64 20 ┆not-ready" or "ready" is found ┆
0x5d00…5d20 74 68 65 20 73 65 6c 66 74 65 73 74 20 61 73 73 75 6d 65 73 20 74 68 61 74 20 61 6e 20 69 6e 74 ┆the selftest assumes that an int┆
0x5d20…5d40 65 6c 6c 69 67 65 6e 74 20 53 42 43 20 0a 63 61 72 64 20 69 73 20 70 72 65 73 65 6e 74 2c 20 61 ┆elligent SBC card is present, a┆
0x5d40…5d60 6e 64 20 72 65 61 64 73 20 73 6f 6d 20 66 75 72 74 68 65 72 20 70 61 72 61 6d 65 74 65 72 73 20 ┆nd reads som further parameters ┆
0x5d60…5d80 73 75 63 68 20 61 73 20 63 61 72 64 2d 0a 74 79 70 65 2c 20 52 41 4d 2d 73 69 7a 65 20 61 6e 64 ┆such as card- type, RAM-size and┆
0x5d80…5da0 20 73 65 6c 66 74 65 73 74 20 65 78 65 63 75 74 69 6f 6e 20 74 69 6d 65 20 69 6e 20 73 65 63 6f ┆ selftest execution time in seco┆
0x5da0…5dc0 6e 64 73 2e 20 49 66 20 74 68 65 20 0a 63 61 72 64 20 69 73 20 6d 61 72 6b 65 64 20 22 6e 6f 74 ┆nds. If the card is marked "not┆
0x5dc0…5de0 2d 72 65 61 64 79 22 20 74 68 65 20 22 74 65 73 74 2d 6d 61 73 74 65 72 22 20 6d 61 79 20 75 73 ┆-ready" the "test-master" may us┆
0x5de0…5e00 65 20 74 68 65 20 73 65 6c 66 74 65 73 74 20 0a 65 78 65 63 75 74 69 6f 6e 20 74 69 6d 65 20 74 ┆e the selftest execution time t┆
0x5e00…5e20 (47,) 6f 20 64 65 63 69 64 65 20 68 6f 77 20 6c 6f 6e 67 20 74 6f 20 77 61 69 74 20 66 6f 72 20 74 68 ┆o decide how long to wait for th┆
0x5e20…5e40 61 74 20 63 61 72 64 20 74 6f 20 62 65 63 6f 6d 65 20 0a 22 72 65 61 64 79 22 2e 20 41 6c 73 6f ┆at card to become "ready". Also┆
0x5e40…5e60 20 61 20 68 61 6e 64 73 68 61 6b 65 20 70 72 6f 74 6f 63 6f 6c 20 69 73 20 65 78 65 63 75 74 65 ┆ a handshake protocol is execute┆
0x5e60…5e80 64 20 74 6f 20 72 65 61 73 73 75 72 65 20 74 68 61 74 20 0a 74 68 65 20 22 72 65 61 64 79 22 20 ┆d to reassure that the "ready" ┆
0x5e80…5ea0 70 61 74 74 65 72 6e 20 77 61 73 20 6e 6f 74 20 72 65 61 64 20 62 79 20 72 61 6e 64 6f 6d 2e 20 ┆pattern was not read by random. ┆
0x5ea0…5ec0 46 72 6f 6d 20 74 68 65 20 6b 6e 6f 77 6c 65 64 67 65 20 74 6f 20 0a 74 68 65 20 52 41 4d 2d 73 ┆From the knowledge to the RAM-s┆
0x5ec0…5ee0 69 7a 65 20 74 68 65 20 22 74 65 73 74 2d 6d 61 73 74 65 72 22 20 63 61 6c 63 75 6c 61 74 65 73 ┆ize the "test-master" calculates┆
0x5ee0…5f00 20 74 68 65 20 61 64 64 72 65 73 73 20 77 68 65 72 65 20 74 6f 20 0a 63 6f 6e 74 69 6e 75 65 20 ┆ the address where to continue ┆
0x5f00…5f20 74 68 65 20 4d 75 6c 74 69 62 75 73 20 63 6f 6e 66 69 67 75 72 61 74 69 6f 6e 2e 20 49 66 20 6e ┆the Multibus configuration. If n┆
0x5f20…5f40 6f 20 22 72 65 61 64 79 22 20 6f 72 20 22 6e 6f 74 2d 72 65 61 64 79 22 20 0a 70 61 74 74 65 72 ┆o "ready" or "not-ready" patter┆
0x5f40…5f60 6e 20 69 73 20 72 65 63 65 69 76 65 64 20 74 68 65 6e 20 74 68 65 20 22 74 65 73 74 2d 6d 61 73 ┆n is received then the "test-mas┆
0x5f60…5f80 74 65 72 22 20 63 6f 6e 66 69 67 75 72 61 74 69 6f 6e 20 77 72 69 74 65 73 20 0a 74 6f 20 61 6e ┆ter" configuration writes to an┆
0x5f80…5fa0 64 20 72 65 61 64 73 20 62 61 63 6b 20 66 72 6f 6d 20 74 68 65 20 52 41 4d 20 63 65 6c 6c 20 74 ┆d reads back from the RAM cell t┆
0x5fa0…5fc0 6f 20 66 69 6e 64 20 6f 75 74 20 69 66 20 73 6f 6d 65 20 52 41 4d 20 0a 72 65 61 6c 6c 79 20 65 ┆o find out if some RAM really e┆
0x5fc0…5fe0 78 69 73 74 73 20 6f 6e 20 74 68 61 74 20 4d 75 6c 74 69 62 75 73 20 61 64 64 72 65 73 73 2e 20 ┆xists on that Multibus address. ┆
0x5fe0…6000 54 68 65 20 63 6f 6e 66 69 67 75 72 61 74 69 6f 6e 20 70 72 6f 67 72 61 6d 20 0a 65 6e 64 73 20 ┆The configuration program ends ┆
0x6000…6020 (48,) 77 69 74 68 20 77 72 69 74 69 6e 67 20 61 20 63 6f 6e 66 69 67 75 72 61 74 69 6f 6e 20 73 63 68 ┆with writing a configuration sch┆
0x6020…6040 65 64 75 6c 65 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 2e 20 54 68 65 20 0a 73 63 68 65 64 ┆edule to the console. The sched┆
0x6040…6060 75 6c 65 20 6d 69 67 68 74 20 6c 6f 6f 6b 20 6c 69 6b 65 20 74 68 69 73 3a 0d 0a 0d 0a b0 0d 0a ┆ule might look like this: ┆
0x6060…6099 Params {
0x6060…6099 04 00 2d 4e 0c 00 06 00 00 00 00 02 01 47 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N G1@ ┆
0x6060…6099 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4b 55 5f 69 73 7d ff ff 04 ┆ (08@KU_iså ┆
0x6060…6099 }
0x6099…60d2 Params {
0x6099…60d2 04 00 2d 4e 0a 00 06 00 00 00 00 02 01 41 31 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N A1 ┆
0x6099…60d2 00 00 00 00 00 00 00 00 05 0f 19 23 2d 37 41 4b 55 5f 69 73 7d 87 91 ff 04 ┆ #-7AKU_iså ┆
0x6099…60d2 }
0x60d2…60e0 0a b0 4d 75 6c 74 69 62 75 73 20 43 6f 6e ┆ Multibus Con┆
0x60e0…6100 66 69 67 75 72 61 74 69 6f 6e 3a 0d 0a b0 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d ┆figuration: ==================┆
0x6100…6120 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d ┆================================┆
0x6120…6140 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 0d 0a b0 b0 4d 42 20 65 6e 74 72 79 ┆==================== MB entry┆
0x6140…6160 20 2d 20 4d 42 20 61 64 64 72 65 73 73 20 2d 20 43 61 72 64 20 53 74 61 74 65 20 2d 20 43 61 72 ┆ - MB address - Card State - Car┆
0x6160…6180 64 20 49 44 20 2d 20 4d 42 20 52 41 4d 20 73 69 7a 65 20 2d 20 65 72 72 6f 72 20 6e 6f 2e 0d 0a ┆d ID - MB RAM size - error no. ┆
0x6180…61a0 b0 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d ┆ ===============================┆
0x61a0…61c0 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d 3d ┆================================┆
0x61c0…61e0 3d 3d 3d 3d 3d 3d 3d 0d 0a b0 30 30 30 30 30 09 20 20 20 20 30 30 30 30 30 30 20 20 20 20 20 20 ┆======= 00000 000000 ┆
0x61e0…6200 20 6d 61 73 74 65 72 09 20 20 20 20 20 20 43 50 55 20 36 31 30 20 20 20 30 32 30 34 38 20 20 20 ┆ master CPU 610 02048 ┆
0x6200…6220 (49,) 20 20 20 20 20 20 30 30 30 30 30 0d 0a b0 b0 30 30 30 30 31 09 20 20 20 20 39 45 30 30 30 30 09 ┆ 00000 00001 9E0000 ┆
0x6220…6240 20 72 65 61 64 79 09 20 20 20 20 20 20 49 54 43 20 36 30 32 20 20 20 30 30 30 36 34 09 20 20 20 ┆ ready ITC 602 00064 ┆
0x6240…6260 20 20 20 30 30 30 30 30 0d 0a b0 30 30 30 30 32 20 20 20 20 20 20 38 45 30 30 30 30 09 20 72 65 ┆ 00000 00002 8E0000 re┆
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0x719b…71a0 0a b0 4d 45 4d ┆ MEM┆
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0x71e5…721e 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4b 55 5f 69 73 7d ff ff 04 ┆ (08@KU_iså ┆
0x71e5…721e }
0x721e…7257 Params {
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0x721e…7257 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4b 55 5f 69 73 7d ff ff 04 ┆ (08@KU_iså ┆
0x721e…7257 }
0x7257…7260 0a b0 50 72 65 73 73 20 3c ┆ Press <┆
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0x7280…72a0 65 73 73 20 3c 63 74 6c 3e 3c 41 3e 3d 20 45 6e 74 65 72 20 44 65 62 75 67 67 65 72 20 4c 6f 61 ┆ess <ctl><A>= Enter Debugger Loa┆
0x72a0…72c0 64 65 72 0d 0a b0 50 72 65 73 73 20 3c 65 73 63 61 70 65 3e 3d 20 52 65 74 75 72 6e 20 74 6f 20 ┆der Press <escape>= Return to ┆
0x72c0…72e0 54 65 73 74 20 41 64 6d 69 6e 69 73 74 72 61 74 6f 72 0d 0a 0d 0a b0 53 55 42 54 45 53 54 0d 0a ┆Test Administrator SUBTEST ┆
0x72e0…7300 b0 20 20 20 30 2e 20 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 2d 20 57 4f 52 44 20 6d 6f 64 65 ┆ 0. Pattern test - WORD mode┆
0x7300…7320 2c 20 45 56 45 4e 20 61 6c 69 67 6e 6d 65 6e 74 0d 0a b0 20 20 20 31 2e 20 20 50 61 74 74 65 72 ┆, EVEN alignment 1. Patter┆
0x7320…7340 6e 20 74 65 73 74 20 2d 20 57 4f 52 44 20 6d 6f 64 65 2c 20 4f 44 44 20 61 6c 69 67 6e 6d 65 6e ┆n test - WORD mode, ODD alignmen┆
0x7340…7360 74 0d 0a b0 20 20 20 32 2e 20 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 2d 20 42 59 54 45 20 6d ┆t 2. Pattern test - BYTE m┆
0x7360…7380 6f 64 65 2c 20 41 4c 4c 20 62 79 74 65 73 0d 0a b0 20 20 20 33 2e 20 20 50 61 74 74 65 72 6e 20 ┆ode, ALL bytes 3. Pattern ┆
0x7380…73a0 74 65 73 74 20 2d 20 42 59 54 45 20 6d 6f 64 65 2c 20 45 56 45 4e 20 62 79 74 65 73 20 6f 6e 6c ┆test - BYTE mode, EVEN bytes onl┆
0x73a0…73c0 79 0d 0a b0 20 20 20 34 2e 20 20 50 61 74 74 65 72 6e 20 74 65 73 74 20 2d 20 42 59 54 45 20 6d ┆y 4. Pattern test - BYTE m┆
0x73c0…73e0 6f 64 65 2c 20 4f 44 44 20 62 79 74 65 73 20 6f 6e 6c 79 0d 0a b0 20 20 20 35 2e 20 20 45 43 43 ┆ode, ODD bytes only 5. ECC┆
0x73e0…7400 20 65 72 72 6f 72 20 63 6f 72 72 65 63 74 69 6f 6e 20 74 65 73 74 0d 0a b0 20 20 20 36 2e 20 20 ┆ error correction test 6. ┆
0x7400…7420 (58,) 45 43 43 20 65 72 72 6f 72 20 64 65 74 65 63 74 69 6f 6e 20 74 65 73 74 0d 0a 0d 0a 0d 0a 57 68 ┆ECC error detection test Wh┆
0x7420…7440 65 6e 20 61 20 3c 63 74 6c 3e 3c 58 3e 20 69 73 20 65 6e 74 65 72 65 64 20 74 68 65 20 71 75 65 ┆en a <ctl><X> is entered the que┆
0x7440…7460 73 74 69 6f 6e 73 20 62 65 6c 6f 77 20 77 69 6c 6c 20 62 65 20 61 73 6b 65 64 20 6c 69 6e 65 20 ┆stions below will be asked line ┆
0x7460…7480 0a 62 79 20 6c 69 6e 65 20 62 79 20 74 68 65 20 74 65 73 74 20 70 72 6f 67 72 61 6d 2e 20 51 75 ┆ by line by the test program. Qu┆
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0x74c0…74e0 20 61 6e 73 77 65 72 65 64 20 77 69 74 68 20 79 65 73 20 28 59 29 2e 0d 0a 0d 0a 0d 0a b0 45 6e ┆ answered with yes (Y). En┆
0x74e0…7500 74 65 72 20 6e 6f 72 6d 61 6c 20 4d 45 4d 20 36 30 58 20 6f 70 65 72 61 74 69 6e 67 20 6d 6f 64 ┆ter normal MEM 60X operating mod┆
0x7500…7520 65 20 28 45 43 52 20 70 6f 72 74 29 20 3f 20 30 46 48 2f 0d 0a b0 45 6e 74 65 72 20 74 65 73 74 ┆e (ECR port) ? 0FH/ Enter test┆
0x7520…7540 20 53 54 41 52 54 20 36 34 20 4b 42 20 42 6c 6f 63 6b 20 6e 75 6d 62 65 72 20 3f 20 3c 31 2d 46 ┆ START 64 KB Block number ? <1-F┆
0x7540…7560 46 3e 2c 20 31 48 2f 0d 0a b0 45 6e 74 65 72 20 74 65 73 74 20 53 54 41 52 54 20 4f 66 66 73 65 ┆F>, 1H/ Enter test START Offse┆
0x7560…7580 74 20 61 64 64 72 65 73 73 20 3f 20 3c 30 2d 46 46 46 46 3e 2c 20 30 48 2f 0d 0a b0 45 6e 74 65 ┆t address ? <0-FFFF>, 0H/ Ente┆
0x7580…75a0 72 20 74 65 73 74 20 45 4e 44 20 36 34 20 4b 42 20 42 6c 6f 63 6b 20 6e 75 6d 62 65 72 20 3f 20 ┆r test END 64 KB Block number ? ┆
0x75a0…75c0 3c 31 2d 46 46 3e 2c 20 31 48 2f 0d 0a b0 45 6e 74 65 72 20 74 65 73 74 20 45 4e 44 20 4f 66 66 ┆<1-FF>, 1H/ Enter test END Off┆
0x75c0…75e0 73 65 74 20 61 64 64 72 65 73 73 20 3f 20 3c 30 2d 46 46 46 46 3e 2c 20 30 48 2f 0d 0a b0 45 6e ┆set address ? <0-FFFF>, 0H/ En┆
0x75e0…7600 74 65 72 20 4d 45 4d 20 36 30 58 20 50 4f 52 54 20 61 64 64 72 65 73 73 20 3f 20 3c 30 2d 46 46 ┆ter MEM 60X PORT address ? <0-FF┆
0x7600…7620 (59,) 46 46 3e 2c 20 31 43 30 2f 0d 0a b0 43 68 61 6e 67 65 20 70 61 74 74 65 72 6e 20 3f 20 3c 59 2f ┆FF>, 1C0/ Change pattern ? <Y/┆
0x7620…7640 4e 3e 2c 20 4e 2f 0d 0a b0 28 45 6e 74 65 72 20 59 6f 75 72 20 50 61 74 74 65 72 6e 20 21 21 20 ┆N>, N/ (Enter Your Pattern !! ┆
0x7640…7660 20 2f 29 0d 0a b0 52 75 6e 20 53 75 62 74 65 73 74 20 3f 20 3c 59 2f 4e 3e 2c 20 4e 2f 0d 0a b0 ┆ /) Run Subtest ? <Y/N>, N/ ┆
0x7660…7680 28 45 6e 74 65 72 20 53 75 62 74 65 73 74 20 4e 75 6d 62 65 72 20 3f 20 3c 30 2d 37 3e 2c 20 30 ┆(Enter Subtest Number ? <0-7>, 0┆
0x7680…76a0 2f 29 0d 0a b0 42 75 73 20 4c 4f 43 4b 20 61 63 74 69 76 65 20 3f 20 3c 59 2f 4e 3e 2c 20 4e 2f ┆/) Bus LOCK active ? <Y/N>, N/┆
0x76a0…76c0 0d 0a b0 69 4c 42 58 20 42 55 53 20 73 65 6c 65 63 74 65 64 20 3f 20 3c 59 2f 4e 3e 2c 20 59 2f ┆ iLBX BUS selected ? <Y/N>, Y/┆
0x76c0…76e0 0d 0a 0d 0a 0d 0a 56 61 6c 69 64 20 61 6e 73 77 65 72 73 20 69 73 20 73 68 6f 77 6e 20 69 6e 20 ┆ Valid answers is shown in ┆
0x76e0…7700 62 72 61 63 6b 65 74 73 20 28 3c 3e 29 2c 20 65 78 63 65 70 74 20 66 6f 72 20 74 68 65 20 6f 70 ┆brackets (<>), except for the op┆
0x7700…7720 65 72 61 74 69 6e 67 20 0a 6d 6f 64 65 2e 20 49 66 20 61 20 63 61 72 72 69 61 67 65 20 72 65 74 ┆erating mode. If a carriage ret┆
0x7720…7740 75 72 6e 20 69 73 20 65 6e 74 65 72 65 64 20 74 68 65 20 76 61 6c 75 65 20 6c 65 66 74 20 74 6f ┆urn is entered the value left to┆
0x7740…7760 20 74 68 65 20 73 6c 61 73 68 20 0a 69 73 20 74 61 6b 65 6e 20 62 79 20 64 65 66 61 75 6c 74 2e ┆ the slash is taken by default.┆
0x7760…7766 0d 0a 0d 0a 0d 0a ┆ ┆
0x7766…7769 FormFeed {
0x7766…7769 0c 83 c0 ┆ ┆
0x7766…7769 }
0x7769…7780 0a a1 b0 32 30 2e 31 2e 31 20 4f 70 65 72 61 74 69 6e 67 20 4d 6f 64 ┆ 20.1.1 Operating Mod┆
0x7780…77a0 65 2e 0d 0a 0d 0a 0d 0a 49 74 20 69 73 20 6e 6f 74 20 72 65 63 6f 6d 6d 65 6e 64 65 64 20 74 6f ┆e. It is not recommended to┆
0x77a0…77c0 20 63 68 61 6e 67 65 20 74 68 65 20 6f 70 65 72 61 74 69 6e 67 20 6d 6f 64 65 2c 20 65 78 63 65 ┆ change the operating mode, exce┆
0x77c0…77e0 70 74 20 66 6f 72 20 0a 64 69 73 61 62 65 6c 69 6e 67 20 74 68 65 20 65 72 72 6f 72 20 63 6f 72 ┆pt for disabeling the error cor┆
0x77e0…7800 72 65 63 74 69 6f 6e 20 6c 6f 67 69 63 20 28 6d 6f 64 65 20 30 42 48 29 20 64 75 72 69 6e 67 20 ┆rection logic (mode 0BH) during ┆
0x7800…7820 (60,) 74 68 65 20 0a 65 78 65 63 75 74 69 6f 6e 20 6f 66 20 73 75 62 74 65 73 74 20 30 2d 34 2e 20 53 ┆the execution of subtest 0-4. S┆
0x7820…7840 75 62 74 65 73 74 20 35 20 69 73 20 75 6e 61 62 6c 65 20 74 6f 20 65 78 65 63 75 74 65 20 0a 73 ┆ubtest 5 is unable to execute s┆
0x7840…7860 75 63 63 65 73 66 75 6c 6c 79 20 77 69 74 68 20 65 72 72 6f 72 20 63 6f 72 72 65 63 74 69 6f 6e ┆uccesfully with error correction┆
0x7860…7880 20 64 69 73 61 62 65 6c 65 64 2e 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 31 2e 32 20 41 64 64 72 65 73 ┆ disabeled. 20.1.2 Addres┆
0x7880…78a0 73 20 52 61 6e 67 65 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 64 69 76 69 64 65 73 20 ┆s Range. This test divides ┆
0x78a0…78c0 74 68 65 20 31 36 20 4d 20 42 79 74 65 20 70 68 79 73 69 63 61 6c 20 6d 65 6d 6f 72 79 20 73 70 ┆the 16 M Byte physical memory sp┆
0x78c0…78e0 61 63 65 20 69 6e 74 6f 20 32 35 36 20 0a 62 6c 6f 63 6b 73 20 6f 66 20 36 34 20 4b 20 62 79 74 ┆ace into 256 blocks of 64 K byt┆
0x78e0…7900 65 20 65 61 63 68 2e 20 49 74 20 69 73 20 69 6d 70 6f 73 73 69 62 6c 65 20 74 6f 20 65 78 65 63 ┆e each. It is impossible to exec┆
0x7900…7920 75 74 65 20 74 68 69 73 20 74 65 73 74 20 0a 69 6e 20 74 68 65 20 6c 6f 77 65 73 74 20 36 34 20 ┆ute this test in the lowest 64 ┆
0x7920…7940 4b 20 62 79 74 65 20 62 6c 6f 63 6b 2e 20 54 68 61 74 20 62 6c 6f 63 6b 20 69 73 20 75 73 65 64 ┆K byte block. That block is used┆
0x7940…7960 20 66 6f 72 20 73 65 6c 66 74 65 73 74 20 0a 73 74 61 63 6b 20 61 6e 64 20 76 61 72 69 61 62 6c ┆ for selftest stack and variabl┆
0x7960…7980 65 73 2e 20 54 68 65 20 70 68 79 73 69 63 61 6c 20 73 74 61 72 74 20 6f 72 20 65 6e 64 20 61 64 ┆es. The physical start or end ad┆
0x7980…79a0 64 72 65 73 73 20 66 6f 72 20 74 68 65 20 0a 74 65 73 74 20 69 73 20 67 69 76 65 6e 20 61 73 20 ┆dress for the test is given as ┆
0x79a0…79c0 61 20 62 6c 6f 63 6b 20 6e 75 6d 62 65 72 20 31 2d 32 35 35 20 70 6c 75 73 20 61 6e 20 6f 66 66 ┆a block number 1-255 plus an off┆
0x79c0…79e0 73 65 74 20 30 2d 36 35 35 33 36 20 0a 77 68 69 63 68 20 6d 75 73 74 20 62 65 20 65 6e 74 65 72 ┆set 0-65536 which must be enter┆
0x79e0…7a00 65 64 20 69 6e 20 68 65 78 61 64 65 63 69 6d 61 6c 2e 20 4e 6f 72 6d 61 6c 6c 79 20 74 68 65 20 ┆ed in hexadecimal. Normally the ┆
0x7a00…7a20 (61,) 61 64 64 72 65 73 73 20 72 61 6e 67 65 20 0a 69 73 20 73 65 6c 65 63 74 65 64 20 6e 6f 74 20 74 ┆address range is selected not t┆
0x7a20…7a40 6f 20 67 6f 20 61 63 72 6f 73 73 20 4d 75 6c 74 69 62 75 73 20 6d 65 6d 6f 72 79 20 62 6f 61 72 ┆o go across Multibus memory boar┆
0x7a40…7a60 64 20 62 6f 75 6e 64 61 72 69 65 73 2c 20 0a 62 75 74 20 69 66 20 73 75 62 74 65 73 74 20 30 2d ┆d boundaries, but if subtest 0-┆
0x7a60…7a80 34 20 69 73 20 65 78 65 63 75 74 65 64 20 61 6c 6f 6e 65 20 69 74 20 69 73 20 70 6f 73 73 69 62 ┆4 is executed alone it is possib┆
0x7a80…7aa0 6c 65 20 74 6f 20 65 78 65 63 75 74 65 20 0a 74 68 65 20 74 65 73 74 20 61 63 72 6f 73 73 20 63 ┆le to execute the test across c┆
0x7aa0…7ac0 6f 6e 74 69 67 75 6f 75 73 20 6d 65 6d 6f 72 79 20 62 6f 61 72 64 20 62 6f 75 6e 64 61 72 69 65 ┆ontiguous memory board boundarie┆
0x7ac0…7ae0 73 2e 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 31 2e 33 20 43 68 61 6e 67 65 20 50 61 74 74 65 72 6e 2e ┆s. 20.1.3 Change Pattern.┆
0x7ae0…7b00 0d 0a 0d 0a 0d 0a 54 68 65 20 70 61 74 74 65 72 6e 20 75 73 65 64 20 62 79 20 74 68 65 20 73 65 ┆ The pattern used by the se┆
0x7b00…7b20 6c 66 74 65 73 74 20 69 73 20 62 79 20 64 65 66 61 75 6c 74 20 36 20 77 6f 72 64 73 20 6c 6f 6e ┆lftest is by default 6 words lon┆
0x7b20…7b40 67 20 28 33 20 0a 74 69 6d 65 73 20 30 30 30 30 20 61 6e 64 20 33 20 74 69 6d 65 73 20 46 46 46 ┆g (3 times 0000 and 3 times FFF┆
0x7b40…7b60 46 20 68 65 78 61 64 65 63 69 6d 61 6c 29 2e 20 49 66 20 74 68 65 20 63 68 61 6e 67 65 20 70 61 ┆F hexadecimal). If the change pa┆
0x7b60…7b80 74 74 65 72 6e 20 0a 71 75 65 73 74 69 6f 6e 20 69 73 20 61 6e 73 77 65 72 65 64 20 77 69 74 68 ┆ttern question is answered with┆
0x7b80…7ba0 20 61 20 79 65 73 2c 20 74 68 65 6e 20 69 74 20 77 69 6c 6c 20 62 65 20 70 6f 73 73 69 62 6c 65 ┆ a yes, then it will be possible┆
0x7ba0…7bc0 20 74 6f 20 0a 63 68 61 6e 67 65 20 74 68 65 20 70 61 74 74 65 72 6e 20 69 74 73 65 6c 66 20 61 ┆ to change the pattern itself a┆
0x7bc0…7be0 6e 64 20 74 68 65 20 6c 65 6e 67 74 68 20 6f 66 20 74 68 65 20 70 61 74 74 65 72 6e 20 61 6c 73 ┆nd the length of the pattern als┆
0x7be0…7c00 6f 2e 20 54 68 65 20 0a 6d 69 6e 69 6d 75 6d 20 6c 65 6e 67 74 68 20 6f 66 20 74 68 65 20 70 61 ┆o. The minimum length of the pa┆
0x7c00…7c20 (62,) 74 74 65 72 6e 20 69 73 20 6f 6e 65 20 77 6f 72 64 20 61 6e 64 20 74 68 65 20 6d 61 78 69 6d 75 ┆ttern is one word and the maximu┆
0x7c20…7c40 6d 20 6c 65 6e 67 74 68 20 0a 69 73 20 73 69 78 20 77 6f 72 64 73 2e 20 54 68 65 20 22 45 6e 74 ┆m length is six words. The "Ent┆
0x7c40…7c60 65 72 20 79 6f 75 72 20 70 61 74 74 65 72 6e 22 20 71 75 65 73 74 69 6f 6e 20 6d 61 79 20 62 65 ┆er your pattern" question may be┆
0x7c60…7c80 20 74 65 72 6d 69 6e 61 74 65 64 20 0a 62 79 20 74 68 65 20 3c 65 73 63 61 70 65 3e 20 62 75 74 ┆ terminated by the <escape> but┆
0x7c80…7ca0 74 6f 6e 20 61 66 74 65 72 20 31 2c 32 2c 33 2c 34 20 6f 72 20 35 20 77 6f 72 64 73 2c 20 74 68 ┆ton after 1,2,3,4 or 5 words, th┆
0x7ca0…7cc0 65 20 6e 75 6d 62 65 72 20 6f 66 20 0a 77 6f 72 64 73 20 67 69 76 69 6e 67 20 74 68 65 20 6c 65 ┆e number of words giving the le┆
0x7cc0…7ce0 6e 67 74 68 20 6f 66 20 74 68 65 20 70 61 74 74 65 72 6e 2e 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 31 ┆ngth of the pattern. 20.1┆
0x7ce0…7d00 2e 34 20 45 78 65 63 75 74 65 20 53 75 62 74 65 73 74 20 41 6c 6f 6e 65 2e 0d 0a 0d 0a 0d 0a 49 ┆.4 Execute Subtest Alone. I┆
0x7d00…7d20 66 20 74 68 65 20 52 75 6e 20 53 75 62 74 65 73 74 20 71 75 65 73 74 69 6f 6e 20 69 73 20 61 6e ┆f the Run Subtest question is an┆
0x7d20…7d40 73 77 65 72 65 64 20 77 69 74 68 20 61 20 79 65 73 2c 20 61 6e 20 61 64 64 69 74 69 6f 6e 61 6c ┆swered with a yes, an additional┆
0x7d40…7d60 20 0a 71 75 65 73 74 69 6f 6e 20 61 62 6f 75 74 20 74 68 65 20 73 75 62 74 65 73 74 20 6e 75 6d ┆ question about the subtest num┆
0x7d60…7d80 62 65 72 20 69 73 20 61 73 6b 65 64 2e 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 31 2e 35 20 42 75 73 20 ┆ber is asked. 20.1.5 Bus ┆
0x7d80…7da0 4c 4f 43 4b 2e 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 42 75 73 20 4c 6f 63 6b 20 71 75 65 73 74 ┆LOCK. If the Bus Lock quest┆
0x7da0…7dc0 69 6f 6e 20 69 73 20 61 6e 73 77 65 72 65 64 20 77 69 74 68 20 61 20 79 65 73 2c 20 74 68 65 6e ┆ion is answered with a yes, then┆
0x7dc0…7de0 20 73 75 62 74 65 73 74 20 30 2d 34 20 0a 65 78 65 63 75 74 65 73 20 61 6c 6c 20 6d 65 6d 6f 72 ┆ subtest 0-4 executes all memor┆
0x7de0…7e00 79 20 72 65 61 64 20 6f 72 20 77 72 69 74 65 20 63 6f 6d 6d 61 6e 64 73 20 77 69 74 68 20 74 68 ┆y read or write commands with th┆
0x7e00…7e20 (63,) 65 20 42 75 73 20 4c 6f 63 6b 20 0a 50 72 65 66 69 78 2e 20 49 74 20 69 73 20 69 6d 70 6f 73 73 ┆e Bus Lock Prefix. It is imposs┆
0x7e20…7e40 69 62 6c 65 20 74 6f 20 6c 6f 63 6b 20 74 68 65 20 62 75 73 20 66 6f 72 20 6d 6f 72 65 20 74 68 ┆ible to lock the bus for more th┆
0x7e40…7e60 61 6e 20 74 68 65 20 0a 64 75 72 61 74 69 6f 6e 20 6f 66 20 6f 6e 65 20 69 6e 73 74 72 75 63 74 ┆an the duration of one instruct┆
0x7e60…7e80 69 6f 6e 2e a1 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 31 2e 36 20 42 55 53 20 53 65 6c 65 63 74 2e 0d ┆ion. 20.1.6 BUS Select. ┆
0x7e80…7ea0 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 6c 61 73 74 20 71 75 65 73 74 69 6f 6e 20 61 62 6f 75 74 20 ┆ If the last question about ┆
0x7ea0…7ec0 69 4c 42 58 20 62 75 73 20 73 65 6c 65 63 74 65 64 20 69 73 20 61 6e 73 77 65 72 65 64 20 77 69 ┆iLBX bus selected is answered wi┆
0x7ec0…7ee0 74 68 20 61 20 0a 6e 6f 20 28 4e 29 2c 20 74 68 65 6e 20 43 50 55 20 36 31 30 20 75 73 65 73 20 ┆th a no (N), then CPU 610 uses ┆
0x7ee0…7f00 74 68 65 20 4d 75 6c 74 69 62 75 73 20 64 75 72 69 6e 67 20 74 68 69 73 20 74 65 73 74 2e 0d 0a ┆the Multibus during this test. ┆
0x7f00…7f04 0d 0a 0d 0a ┆ ┆
0x7f04…7f07 FormFeed {
0x7f04…7f07 0c 83 d8 ┆ ┆
0x7f04…7f07 }
0x7f07…7f20 0a a1 b0 32 30 2e 32 20 53 75 62 74 65 73 74 20 30 20 3d 20 50 61 74 74 65 ┆ 20.2 Subtest 0 = Patte┆
0x7f20…7f40 72 6e 20 74 65 73 74 20 2d 20 57 4f 52 44 20 6d 6f 64 65 2c 20 45 56 45 4e 20 61 6c 69 67 6e 6d ┆rn test - WORD mode, EVEN alignm┆
0x7f40…7f60 65 6e 74 2e 0d 0a 0d 0a 0d 0a 53 75 62 74 65 73 74 20 30 20 77 72 69 74 65 73 20 74 68 65 20 70 ┆ent. Subtest 0 writes the p┆
0x7f60…7f80 61 74 74 65 72 6e 20 77 6f 72 64 20 62 79 20 77 6f 72 64 20 66 72 6f 6d 20 74 68 65 20 70 61 74 ┆attern word by word from the pat┆
0x7f80…7fa0 74 65 72 6e 20 62 75 66 66 65 72 20 0a 74 6f 20 6d 65 6d 6f 72 79 20 66 72 6f 6d 20 74 68 65 20 ┆tern buffer to memory from the ┆
0x7fa0…7fc0 73 74 61 72 74 20 61 64 64 72 65 73 73 20 74 6f 20 74 68 65 20 65 6e 64 20 61 64 64 72 65 73 73 ┆start address to the end address┆
0x7fc0…7fe0 2e 20 45 56 45 4e 20 0a 61 6c 69 67 6e 6d 65 6e 74 20 69 73 20 66 6f 72 63 65 64 20 6f 6e 20 74 ┆. EVEN alignment is forced on t┆
0x7fe0…8000 68 65 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 28 73 74 61 72 74 20 61 64 64 72 65 73 73 20 ┆he start address (start address ┆
0x8000…8020 (64,) 0a 64 65 63 72 65 6d 65 6e 74 65 64 20 69 66 20 4f 44 44 29 2e 20 54 68 65 20 70 61 74 74 65 72 ┆ decremented if ODD). The patter┆
0x8020…8040 6e 20 69 73 20 72 65 61 64 20 62 61 63 6b 20 61 6e 64 20 63 6f 6d 70 61 72 65 64 20 74 6f 20 74 ┆n is read back and compared to t┆
0x8040…8060 68 65 20 0a 6f 72 69 67 69 6e 61 6c 20 6f 6e 65 2c 20 61 6e 64 20 69 66 20 65 71 75 61 6c 20 74 ┆he original one, and if equal t┆
0x8060…8080 68 65 20 74 65 73 74 20 69 73 20 72 65 70 65 61 74 65 64 20 77 69 74 68 20 74 68 65 20 69 6e 76 ┆he test is repeated with the inv┆
0x8080…80a0 65 72 73 65 64 20 0a 70 61 74 74 65 72 6e 2c 20 6f 74 68 65 72 77 69 73 65 20 61 6e 20 65 72 72 ┆ersed pattern, otherwise an err┆
0x80a0…80c0 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 31 2e ┆or message is generated. 1.┆
0x80c0…80e0 20 b0 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 30 20 2d 20 52 41 4d ┆ MEM 60X Test: Subtest: 0 - RAM┆
0x80e0…8100 20 65 72 72 6f 72 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 72 2e 3a 3c 61 61 61 61 3e ┆ error segm.:<ssss> addr.:<aaaa>┆
0x8100…8120 0d 0a 19 80 81 82 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆ ┆
0x8120…8140 20 20 20 20 20 20 20 20 20 20 20 20 20 20 65 78 70 2e 3a 3c 65 65 65 65 3e 20 20 20 72 65 63 2e ┆ exp.:<eeee> rec.┆
0x8140…8160 3a 3c 72 72 72 72 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 74 65 78 74 20 ┆:<rrrr> The secondary text ┆
0x8160…8180 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d 0a 0d 0a 0d 0a ┆is interpreted like this : ┆
0x8180…81a0 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 36 34 20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 6e ┆<ssss> is the 64 K byte block n┆
0x81a0…81c0 75 6d 62 65 72 20 28 31 2d 46 46 29 2e 0d 0a 3c 61 61 61 61 3e 20 69 73 20 74 68 65 20 6f 66 66 ┆umber (1-FF). <aaaa> is the off┆
0x81c0…81e0 73 65 74 20 77 69 74 68 69 6e 20 74 68 65 20 62 6c 6f 63 6b 20 28 30 2d 46 46 46 46 29 2e 0d 0a ┆set within the block (0-FFFF). ┆
0x81e0…8200 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2e 0d ┆<eeee> is the expected pattern. ┆
0x8200…8220 (65,) 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e ┆ <rrrr> is the received pattern.┆
0x8220…8240 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 33 20 53 75 62 74 65 73 74 20 31 20 3d 20 50 61 74 74 65 72 6e ┆ 20.3 Subtest 1 = Pattern┆
0x8240…8260 20 74 65 73 74 20 2d 20 57 4f 52 44 20 6d 6f 64 65 2c 20 4f 44 44 20 61 6c 69 67 6e 6d 65 6e 74 ┆ test - WORD mode, ODD alignment┆
0x8260…8280 2e 0d 0a 0d 0a 0d 0a 53 75 62 74 65 73 74 20 31 20 77 72 69 74 65 73 20 74 68 65 20 70 61 74 74 ┆. Subtest 1 writes the patt┆
0x8280…82a0 65 72 6e 20 77 6f 72 64 20 62 79 20 77 6f 72 64 20 66 72 6f 6d 20 74 68 65 20 70 61 74 74 65 72 ┆ern word by word from the patter┆
0x82a0…82c0 6e 20 62 75 66 66 65 72 20 0a 74 6f 20 6d 65 6d 6f 72 79 20 66 72 6f 6d 20 74 68 65 20 73 74 61 ┆n buffer to memory from the sta┆
0x82c0…82e0 72 74 20 61 64 64 72 65 73 73 20 74 6f 20 74 68 65 20 65 6e 64 20 61 64 64 72 65 73 73 2e 20 4f ┆rt address to the end address. O┆
0x82e0…8300 44 44 20 0a 61 6c 69 67 6e 6d 65 6e 74 20 69 73 20 66 6f 72 63 65 64 20 6f 6e 20 74 68 65 20 73 ┆DD alignment is forced on the s┆
0x8300…8320 74 61 72 74 20 61 64 64 72 65 73 73 20 28 73 74 61 72 74 20 61 64 64 72 65 73 73 20 0a 69 6e 63 ┆tart address (start address inc┆
0x8320…8340 72 65 6d 65 6e 74 65 64 20 69 66 20 45 56 45 4e 29 2e 20 54 68 65 20 70 61 74 74 65 72 6e 20 69 ┆remented if EVEN). The pattern i┆
0x8340…8360 73 20 72 65 61 64 20 62 61 63 6b 20 61 6e 64 20 63 6f 6d 70 61 72 65 64 20 74 6f 20 0a 74 68 65 ┆s read back and compared to the┆
0x8360…8380 20 6f 72 69 67 69 6e 61 6c 20 6f 6e 65 2c 20 61 6e 64 20 69 66 20 65 71 75 61 6c 20 74 68 65 20 ┆ original one, and if equal the ┆
0x8380…83a0 74 65 73 74 20 69 73 20 72 65 70 65 61 74 65 64 20 77 69 74 68 20 74 68 65 20 0a 69 6e 76 65 72 ┆test is repeated with the inver┆
0x83a0…83c0 73 65 64 20 70 61 74 74 65 72 6e 2c 20 6f 74 68 65 72 77 69 73 65 20 61 6e 20 65 72 72 6f 72 20 ┆sed pattern, otherwise an error ┆
0x83c0…83e0 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 31 2e 20 b0 4d ┆message is generated. 1. M┆
0x83e0…8400 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 31 20 2d 20 52 41 4d 20 65 72 ┆EM 60X Test: Subtest: 1 - RAM er┆
0x8400…8420 (66,) 72 6f 72 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 72 2e 3a 3c 61 61 61 61 3e 0d 0a 19 ┆ror segm.:<ssss> addr.:<aaaa> ┆
0x8420…8440 80 81 82 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆ ┆
0x8440…8460 20 20 20 20 20 20 20 20 20 20 20 65 78 70 2e 3a 3c 65 65 65 65 3e 20 20 20 72 65 63 2e 3a 3c 72 ┆ exp.:<eeee> rec.:<r┆
0x8460…8480 72 72 72 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 74 65 78 74 20 69 73 20 ┆rrr> The secondary text is ┆
0x8480…84a0 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d 0a 0d 0a 0d 0a 3c 73 73 ┆interpreted like this : <ss┆
0x84a0…84c0 73 73 3e 20 84 69 73 20 74 68 65 20 36 34 20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 6e 75 6d 62 ┆ss> is the 64 K byte block numb┆
0x84c0…84e0 65 72 20 28 31 2d 46 46 29 2e 0d 0a 3c 61 61 61 61 3e 20 69 73 20 74 68 65 20 6f 66 66 73 65 74 ┆er (1-FF). <aaaa> is the offset┆
0x84e0…8500 20 77 69 74 68 69 6e 20 74 68 65 20 62 6c 6f 63 6b 20 28 30 2d 46 46 46 46 29 2e 0d 0a 3c 65 65 ┆ within the block (0-FFFF). <ee┆
0x8500…8520 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2e 0d 0a 3c 72 ┆ee> is the expected pattern. <r┆
0x8520…8540 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e 0d 0a 0d ┆rrr> is the received pattern. ┆
0x8540…8560 0a 0d 0a a1 b0 32 30 2e 34 20 53 75 62 74 65 73 74 20 32 20 3d 20 50 61 74 74 65 72 6e 20 74 65 ┆ 20.4 Subtest 2 = Pattern te┆
0x8560…8580 73 74 20 2d 20 42 59 54 45 20 6d 6f 64 65 2c 20 41 4c 4c 20 62 79 74 65 73 2e 0d 0a 0d 0a 0d 0a ┆st - BYTE mode, ALL bytes. ┆
0x8580…85a0 53 75 62 74 65 73 74 20 32 20 77 72 69 74 65 73 20 74 68 65 20 70 61 74 74 65 72 6e 20 62 79 74 ┆Subtest 2 writes the pattern byt┆
0x85a0…85c0 65 20 62 79 20 62 79 74 65 20 66 72 6f 6d 20 74 68 65 20 70 61 74 74 65 72 6e 20 62 75 66 66 65 ┆e by byte from the pattern buffe┆
0x85c0…85e0 72 20 0a 74 6f 20 6d 65 6d 6f 72 79 20 66 72 6f 6d 20 74 68 65 20 73 74 61 72 74 20 61 64 64 72 ┆r to memory from the start addr┆
0x85e0…8600 65 73 73 20 74 6f 20 74 68 65 20 65 6e 64 20 61 64 64 72 65 73 73 2e 20 54 68 65 20 70 61 74 74 ┆ess to the end address. The patt┆
0x8600…8620 (67,) 65 72 6e 20 0a 69 73 20 72 65 61 64 20 62 61 63 6b 20 61 6e 64 20 63 6f 6d 70 61 72 65 64 20 74 ┆ern is read back and compared t┆
0x8620…8640 6f 20 74 68 65 20 6f 72 69 67 69 6e 61 6c 20 6f 6e 65 2c 20 61 6e 64 20 69 66 20 65 71 75 61 6c ┆o the original one, and if equal┆
0x8640…8660 20 74 68 65 20 0a 74 65 73 74 20 69 73 20 72 65 70 65 61 74 65 64 20 77 69 74 68 20 74 68 65 20 ┆ the test is repeated with the ┆
0x8660…8680 69 6e 76 65 72 73 65 64 20 70 61 74 74 65 72 6e 2c 20 6f 74 68 65 72 77 69 73 65 20 61 6e 20 65 ┆inversed pattern, otherwise an e┆
0x8680…86a0 72 72 6f 72 20 0a 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d ┆rror message is generated. ┆
0x86a0…86c0 0a 31 2e 20 b0 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 32 20 52 41 ┆ 1. MEM 60X Test: Subtest: 2 RA┆
0x86c0…86e0 4d 20 65 72 72 6f 72 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 72 2e 3a 3c 61 61 61 61 ┆M error segm.:<ssss> addr.:<aaaa┆
0x86e0…8700 3e 0d 0a b0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆> ┆
0x8700…8720 20 20 20 20 20 20 20 20 20 20 65 78 70 2e 3a 3c 65 65 65 65 3e 20 20 20 72 65 63 2e 3a 3c 72 72 ┆ exp.:<eeee> rec.:<rr┆
0x8720…8740 72 72 3e 0d 0a 0d 0a 0d 0a 8c 83 f0 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 74 65 78 74 20 ┆rr> The secondary text ┆
0x8740…8760 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d 0a 0d 0a 0d 0a ┆is interpreted like this : ┆
0x8760…8780 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 36 34 20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 6e ┆<ssss> is the 64 K byte block n┆
0x8780…87a0 75 6d 62 65 72 20 28 31 2d 46 46 29 2e 0d 0a 3c 61 61 61 61 3e 20 69 73 20 74 68 65 20 6f 66 66 ┆umber (1-FF). <aaaa> is the off┆
0x87a0…87c0 73 65 74 20 77 69 74 68 69 6e 20 74 68 65 20 62 6c 6f 63 6b 20 28 30 2d 46 46 46 46 29 2e 0d 0a ┆set within the block (0-FFFF). ┆
0x87c0…87e0 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2e 0d ┆<eeee> is the expected pattern. ┆
0x87e0…8800 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e ┆ <rrrr> is the received pattern.┆
0x8800…8820 (68,) 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 35 20 53 75 62 74 65 73 74 20 33 20 3d 20 50 61 74 74 65 72 6e ┆ 20.5 Subtest 3 = Pattern┆
0x8820…8840 20 74 65 73 74 20 2d 20 42 59 54 45 20 6d 6f 64 65 2c 20 45 56 45 4e 20 62 79 74 65 73 20 6f 6e ┆ test - BYTE mode, EVEN bytes on┆
0x8840…8860 6c 79 2e 0d 0a 0d 0a 0d 0a 53 75 62 74 65 73 74 20 33 20 77 72 69 74 65 73 20 74 68 65 20 70 61 ┆ly. Subtest 3 writes the pa┆
0x8860…8880 74 74 65 72 6e 20 62 79 74 65 20 62 79 20 62 79 74 65 20 66 72 6f 6d 20 74 68 65 20 70 61 74 74 ┆ttern byte by byte from the patt┆
0x8880…88a0 65 72 6e 20 62 75 66 66 65 72 20 0a 74 6f 20 74 68 65 20 45 56 45 4e 20 6d 65 6d 6f 72 79 20 63 ┆ern buffer to the EVEN memory c┆
0x88a0…88c0 65 6c 6c 73 20 66 72 6f 6d 20 74 68 65 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 74 6f 20 74 ┆ells from the start address to t┆
0x88c0…88e0 68 65 20 65 6e 64 20 0a 61 64 64 72 65 73 73 2e 20 45 56 45 4e 20 61 6c 69 67 6e 6d 65 6e 74 20 ┆he end address. EVEN alignment ┆
0x88e0…8900 69 73 20 66 6f 72 63 65 64 20 6f 6e 20 74 68 65 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 28 ┆is forced on the start address (┆
0x8900…8920 73 74 61 72 74 20 0a 61 64 64 72 65 73 73 20 64 65 63 72 65 6d 65 6e 74 65 64 20 69 66 20 4f 44 ┆start address decremented if OD┆
0x8920…8940 44 29 2e 20 42 65 66 6f 72 65 20 74 68 65 20 45 56 45 4e 20 62 79 74 65 20 69 73 20 77 72 69 74 ┆D). Before the EVEN byte is writ┆
0x8940…8960 74 65 6e 20 74 68 65 20 0a 69 6e 76 65 72 73 65 64 20 70 61 74 74 65 72 6e 20 69 73 20 77 72 69 ┆ten the inversed pattern is wri┆
0x8960…8980 74 74 65 6e 20 74 6f 20 74 68 65 20 4f 44 44 20 62 79 74 65 20 28 45 56 45 4e 20 61 64 64 72 65 ┆tten to the ODD byte (EVEN addre┆
0x8980…89a0 73 73 20 2b 20 31 29 2e 20 0a 54 68 65 20 70 61 74 74 65 72 6e 20 69 73 20 72 65 61 64 20 62 61 ┆ss + 1). The pattern is read ba┆
0x89a0…89c0 63 6b 20 61 6e 64 20 63 6f 6d 70 61 72 65 64 20 74 6f 20 74 68 65 20 6f 72 69 67 69 6e 61 6c 20 ┆ck and compared to the original ┆
0x89c0…89e0 6f 6e 65 2c 20 61 6e 64 20 69 66 20 0a 65 71 75 61 6c 20 74 68 65 20 74 65 73 74 20 69 73 20 72 ┆one, and if equal the test is r┆
0x89e0…8a00 65 70 65 61 74 65 64 20 77 69 74 68 20 74 68 65 20 69 6e 76 65 72 73 65 64 20 70 61 74 74 65 72 ┆epeated with the inversed patter┆
0x8a00…8a20 (69,) 6e 2c 20 6f 74 68 65 72 77 69 73 65 20 0a 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 ┆n, otherwise an error message i┆
0x8a20…8a40 73 20 67 65 6e 65 72 61 74 65 64 2e 20 49 74 20 69 73 20 61 6c 73 6f 20 63 68 65 63 6b 65 64 20 ┆s generated. It is also checked ┆
0x8a40…8a60 69 66 20 74 68 65 20 77 72 69 74 69 6e 67 20 0a 6f 66 20 74 68 65 20 45 56 45 4e 20 6d 65 6d 6f ┆if the writing of the EVEN memo┆
0x8a60…8a80 72 79 20 63 65 6c 6c 20 64 69 73 74 75 72 62 65 64 20 74 68 65 20 63 6f 6e 74 65 6e 74 20 6f 66 ┆ry cell disturbed the content of┆
0x8a80…8aa0 20 74 68 65 20 4f 44 44 20 6d 65 6d 6f 72 79 20 0a 63 65 6c 6c 20 61 6e 64 20 69 66 20 74 72 75 ┆ the ODD memory cell and if tru┆
0x8aa0…8ac0 65 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e ┆e an error message is generated.┆
0x8ac0…8ae0 0d 0a 0d 0a 0d 0a 31 2e 20 b0 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a ┆ 1. MEM 60X Test: Subtest:┆
0x8ae0…8b00 20 33 20 2d 20 52 41 4d 20 65 72 72 6f 72 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 72 ┆ 3 - RAM error segm.:<ssss> addr┆
0x8b00…8b20 2e 3a 3c 61 61 61 61 3e 0d 0a b0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆.:<aaaa> ┆
0x8b20…8b40 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 65 78 70 2e 3a 3c 65 65 65 65 3e 20 20 ┆ exp.:<eeee> ┆
0x8b40…8b60 20 72 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 ┆ rec.:<rrrr> The secondary ┆
0x8b60…8b80 74 65 78 74 20 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d ┆text is interpreted like this : ┆
0x8b80…8ba0 0a 0d 0a 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 36 34 20 4b 20 62 79 74 65 20 62 6c ┆ <ssss> is the 64 K byte bl┆
0x8ba0…8bc0 6f 63 6b 20 6e 75 6d 62 65 72 20 28 31 2d 46 46 29 2e 0d 0a 3c 61 61 61 61 3e 20 69 73 20 74 68 ┆ock number (1-FF). <aaaa> is th┆
0x8bc0…8be0 65 20 6f 66 66 73 65 74 20 77 69 74 68 69 6e 20 74 68 65 20 62 6c 6f 63 6b 20 28 30 2d 46 46 46 ┆e offset within the block (0-FFF┆
0x8be0…8c00 46 29 2e 0d 0a 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 ┆F). <eeee> is the expected patt┆
0x8c00…8c20 (70,) 65 72 6e 2e 0d 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 ┆ern. <rrrr> is the received pat┆
0x8c20…8c40 74 65 72 6e 2e 0d 0a 0d 0a 0d 0a a1 b0 32 30 2e 36 20 53 75 62 74 65 73 74 20 34 20 3d 20 50 61 ┆tern. 20.6 Subtest 4 = Pa┆
0x8c40…8c60 74 74 65 72 6e 20 74 65 73 74 20 2d 20 42 59 54 45 20 6d 6f 64 65 2c 20 4f 44 44 20 62 79 74 65 ┆ttern test - BYTE mode, ODD byte┆
0x8c60…8c80 73 20 6f 6e 6c 79 2e 0d 0a 0d 0a 0d 0a 53 75 62 74 65 73 74 20 34 20 77 72 69 74 65 73 20 74 68 ┆s only. Subtest 4 writes th┆
0x8c80…8ca0 65 20 70 61 74 74 65 72 6e 20 62 79 74 65 20 62 79 20 62 79 74 65 20 66 72 6f 6d 20 74 68 65 20 ┆e pattern byte by byte from the ┆
0x8ca0…8cc0 70 61 74 74 65 72 6e 20 62 75 66 66 65 72 20 0a 74 6f 20 74 68 65 20 4f 44 44 20 6d 65 6d 6f 72 ┆pattern buffer to the ODD memor┆
0x8cc0…8ce0 79 20 63 65 6c 6c 73 20 66 72 6f 6d 20 74 68 65 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 74 ┆y cells from the start address t┆
0x8ce0…8d00 6f 20 74 68 65 20 65 6e 64 20 0a 61 64 64 72 65 73 73 2e 20 4f 44 44 20 61 6c 69 67 6e 6d 65 6e ┆o the end address. ODD alignmen┆
0x8d00…8d20 74 20 69 73 20 66 6f 72 63 65 64 20 6f 6e 20 74 68 65 20 73 74 61 72 74 20 61 64 64 72 65 73 73 ┆t is forced on the start address┆
0x8d20…8d40 20 28 73 74 61 72 74 20 0a 61 64 64 72 65 73 73 20 69 6e 63 72 65 6d 65 6e 74 65 64 20 69 66 20 ┆ (start address incremented if ┆
0x8d40…8d60 4f 44 44 29 2e 20 42 65 66 6f 72 65 20 74 68 65 20 4f 44 44 20 62 79 74 65 20 69 73 20 77 72 69 ┆ODD). Before the ODD byte is wri┆
0x8d60…8d80 74 74 65 6e 20 74 68 65 20 0a 69 6e 76 65 72 73 65 64 20 70 61 74 74 65 72 6e 20 69 73 20 77 72 ┆tten the inversed pattern is wr┆
0x8d80…8da0 69 74 74 65 6e 20 74 6f 20 74 68 65 20 45 56 45 4e 20 62 79 74 65 20 28 4f 44 44 20 61 64 64 72 ┆itten to the EVEN byte (ODD addr┆
0x8da0…8dc0 65 73 73 20 2d 20 31 29 2e 20 0a 54 68 65 20 70 61 74 74 65 72 6e 20 69 73 20 72 65 61 64 20 62 ┆ess - 1). The pattern is read b┆
0x8dc0…8de0 61 63 6b 20 61 6e 64 20 63 6f 6d 70 61 72 65 64 20 74 6f 20 74 68 65 20 6f 72 69 67 69 6e 61 6c ┆ack and compared to the original┆
0x8de0…8e00 20 6f 6e 65 2c 20 61 6e 64 20 69 66 20 0a 65 71 75 61 6c 20 74 68 65 20 74 65 73 74 20 69 73 20 ┆ one, and if equal the test is ┆
0x8e00…8e20 (71,) 72 65 70 65 61 74 65 64 20 77 69 74 68 20 74 68 65 20 69 6e 76 65 72 73 65 64 20 70 61 74 74 65 ┆repeated with the inversed patte┆
0x8e20…8e40 72 6e 2c 20 6f 74 68 65 72 77 69 73 65 20 0a 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 ┆rn, otherwise an error message ┆
0x8e40…8e60 69 73 20 67 65 6e 65 72 61 74 65 64 2e 20 49 74 20 69 73 20 61 6c 73 6f 20 63 68 65 63 6b 65 64 ┆is generated. It is also checked┆
0x8e60…8e80 20 69 66 20 74 68 65 20 77 72 69 74 69 6e 67 20 0a 6f 66 20 74 68 65 20 4f 44 44 20 6d 65 6d 6f ┆ if the writing of the ODD memo┆
0x8e80…8ea0 72 79 20 63 65 6c 6c 20 64 69 73 74 75 72 62 65 64 20 74 68 65 20 63 6f 6e 74 65 6e 74 20 6f 66 ┆ry cell disturbed the content of┆
0x8ea0…8ec0 20 74 68 65 20 45 56 45 4e 20 6d 65 6d 6f 72 79 20 0a 63 65 6c 6c 20 61 6e 64 20 69 66 20 74 72 ┆ the EVEN memory cell and if tr┆
0x8ec0…8ee0 75 65 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 ┆ue an error message is generated┆
0x8ee0…8f00 2e 0d 0a 0d 0a 0d 0a 31 2e 20 b0 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 ┆. 1. MEM 60X Test: Subtest┆
0x8f00…8f20 3a 20 34 20 2d 20 52 41 4d 20 65 72 72 6f 72 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 ┆: 4 - RAM error segm.:<ssss> add┆
0x8f20…8f40 72 2e 3a 3c 61 61 61 61 3e 0d 0a b0 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆r.:<aaaa> ┆
0x8f40…8f60 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 65 78 70 2e 3a 3c 65 65 65 65 3e 20 ┆ exp.:<eeee> ┆
0x8f60…8f73 20 20 72 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a 0d 0a 0d 0a ┆ rec.:<rrrr> ┆
0x8f73…8f76 FormFeed {
0x8f73…8f76 0c 83 c0 ┆ ┆
0x8f73…8f76 }
0x8f76…8f80 0a 54 68 65 20 73 65 63 6f 6e ┆ The secon┆
0x8f80…8fa0 64 61 72 79 20 74 65 78 74 20 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 ┆dary text is interpreted like th┆
0x8fa0…8fc0 69 73 20 3a 0d 0a 0d 0a 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 36 34 20 4b 20 62 79 ┆is : <ssss> is the 64 K by┆
0x8fc0…8fe0 74 65 20 62 6c 6f 63 6b 20 6e 75 6d 62 65 72 20 28 31 2d 46 46 29 2e 0d 0a 3c 61 61 61 61 3e 20 ┆te block number (1-FF). <aaaa> ┆
0x8fe0…9000 69 73 20 74 68 65 20 6f 66 66 73 65 74 20 77 69 74 68 69 6e 20 74 68 65 20 62 6c 6f 63 6b 20 28 ┆is the offset within the block (┆
0x9000…9020 (72,) 30 2d 46 46 46 46 29 2e 0d 0a 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 ┆0-FFFF). <eeee> is the expected┆
0x9020…9040 20 70 61 74 74 65 72 6e 2e 0d 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 ┆ pattern. <rrrr> is the receive┆
0x9040…9060 64 20 70 61 74 74 65 72 6e 2e 0d 0a 0d 0a 0d 0a a1 a1 b0 32 30 2e 37 20 53 75 62 74 65 73 74 20 ┆d pattern. 20.7 Subtest ┆
0x9060…9080 35 20 3d 20 45 43 43 20 45 72 72 6f 72 20 43 6f 72 72 65 63 74 69 6f 6e 20 54 65 73 74 2e 0d 0a ┆5 = ECC Error Correction Test. ┆
0x9080…90a0 0d 0a 0d 0a 53 75 62 74 65 73 74 20 35 20 76 65 72 69 66 69 65 73 20 74 68 65 20 61 62 69 6c 69 ┆ Subtest 5 verifies the abili┆
0x90a0…90c0 74 79 20 6f 66 20 74 68 65 20 45 43 43 20 68 61 72 64 77 61 72 65 20 63 69 72 63 69 75 74 72 79 ┆ty of the ECC hardware circiutry┆
0x90c0…90e0 20 74 6f 20 0a 63 6f 72 72 65 63 74 20 73 69 6e 67 6c 65 20 62 69 74 20 65 72 72 6f 72 73 2e 0d ┆ to correct single bit errors. ┆
0x90e0…9100 0a 0d 0a 0d 0a 46 69 72 73 74 20 74 68 65 20 74 65 73 74 20 72 65 73 65 74 73 20 61 6c 6c 20 6d ┆ First the test resets all m┆
0x9100…9120 65 6d 6f 72 79 20 63 65 6c 6c 73 20 66 72 6f 6d 20 74 68 65 20 73 74 61 72 74 20 61 64 64 72 65 ┆emory cells from the start addre┆
0x9120…9140 73 73 20 74 6f 20 0a 74 68 65 20 65 6e 64 20 61 64 64 72 65 73 73 2c 20 61 6e 64 20 69 66 20 75 ┆ss to the end address, and if u┆
0x9140…9160 6e 61 62 6c 65 20 74 6f 20 72 65 73 65 74 20 6d 65 6d 6f 72 79 20 67 65 6e 65 72 61 74 65 73 20 ┆nable to reset memory generates ┆
0x9160…9180 61 6e 20 65 72 72 6f 72 20 0a 6d 65 73 73 61 67 65 20 6c 69 6b 65 20 74 68 69 73 2e 0d 0a 0d 0a ┆an error message like this. ┆
0x9180…91a0 0d 0a 31 2e 20 b0 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 35 20 2d ┆ 1. MEM 60X Test: Subtest: 5 -┆
0x91a0…91c0 20 43 6f 75 6c 64 20 6e 6f 74 20 72 65 73 65 74 20 52 41 4d 0d 0a 0d 0a 0d 0a 49 66 20 52 41 4d ┆ Could not reset RAM If RAM┆
0x91c0…91e0 20 69 73 20 72 65 73 65 74 20 73 75 63 63 65 73 66 75 6c 6c 79 20 74 68 65 20 74 68 65 6e 20 74 ┆ is reset succesfully the then t┆
0x91e0…9200 65 73 74 20 70 72 6f 63 65 65 64 73 20 61 6e 64 20 6d 61 6b 65 73 20 74 68 65 20 0a 73 74 61 72 ┆est proceeds and makes the star┆
0x9200…9220 (73,) 74 20 61 64 64 72 65 73 73 20 45 56 45 4e 20 61 6c 69 67 6e 65 64 20 28 64 65 63 72 65 6d 65 6e ┆t address EVEN aligned (decremen┆
0x9220…9240 74 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 69 66 20 4f 44 44 29 2e 20 54 68 65 6e 20 0a 61 ┆t start address if ODD). Then a┆
0x9240…9260 20 70 61 74 74 65 72 6e 20 65 71 75 61 6c 20 74 6f 20 30 30 30 30 30 30 30 30 30 30 30 30 30 30 ┆ pattern equal to 00000000000000┆
0x9260…9280 30 31 20 62 69 6e 61 72 79 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 0a 66 69 72 ┆01 binary is written to the fir┆
0x9280…92a0 73 74 20 6d 65 6d 6f 72 79 20 63 65 6c 6c 20 69 6e 20 64 69 61 67 6e 6f 73 74 69 63 20 6d 6f 64 ┆st memory cell in diagnostic mod┆
0x92a0…92c0 65 20 28 77 72 69 74 69 6e 67 20 6f 66 20 63 68 65 63 6b 62 69 74 73 20 0a 69 6e 68 69 62 69 74 ┆e (writing of checkbits inhibit┆
0x92c0…92e0 65 64 29 2c 20 74 68 65 20 63 68 65 63 6b 62 69 74 73 20 69 73 20 72 65 61 64 20 61 6e 64 20 73 ┆ed), the checkbits is read and s┆
0x92e0…9300 61 76 65 64 20 66 6f 72 20 61 6e 20 65 76 65 6e 74 75 61 6c 6c 79 20 0a 65 72 72 6f 72 20 6d 65 ┆aved for an eventually error me┆
0x9300…9320 73 73 61 67 65 2e 20 54 68 65 20 6f 70 65 72 61 74 69 6e 67 20 6d 6f 64 65 20 69 73 20 72 65 73 ┆ssage. The operating mode is res┆
0x9320…9340 74 6f 72 65 64 20 61 6e 64 20 74 68 65 20 64 61 74 61 20 69 73 20 0a 72 65 61 64 20 62 61 63 6b ┆tored and the data is read back┆
0x9340…9360 2e 20 54 68 65 20 73 79 6e 64 72 6f 6d 65 20 62 69 74 73 20 61 72 65 20 72 65 61 64 20 61 6e 64 ┆. The syndrome bits are read and┆
0x9360…9380 20 69 66 20 74 68 65 79 20 64 6f 65 73 27 6e 74 20 0a 69 6e 64 69 63 61 74 65 20 61 6e 20 65 72 ┆ if they does'nt indicate an er┆
0x9380…93a0 72 6f 72 20 63 6f 72 72 65 63 74 20 63 6f 72 72 65 63 74 69 6f 6e 20 28 74 68 65 20 62 69 74 20 ┆ror correct correction (the bit ┆
0x93a0…93c0 73 65 74 20 69 6e 20 74 68 65 20 70 61 74 74 65 72 6e 20 0a 73 68 6f 75 6c 64 20 67 65 74 20 63 ┆set in the pattern should get c┆
0x93c0…93e0 6f 72 72 65 63 74 65 64 20 74 6f 20 61 20 30 29 20 74 68 65 6e 20 61 6e 20 65 72 72 6f 72 20 6d ┆orrected to a 0) then an error m┆
0x93e0…9400 65 73 73 61 67 65 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 0a 74 68 65 20 63 6f 6e 73 6f 6c ┆essage is written to the consol┆
0x9400…9420 (74,) 65 2e 0d 0a 0d 0a 0d 0a 32 2e 20 b0 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 ┆e. 2. MEM 60X Test: Subtes┆
0x9420…9440 74 3a 20 35 20 2d 20 65 72 72 6f 72 20 63 6f 72 72 65 63 74 69 6f 6e 20 65 72 72 6f 72 0d 0a 20 ┆t: 5 - error correction error ┆
0x9440…9460 20 20 b0 73 79 6e 62 69 74 20 3c 79 79 79 79 3e 20 63 68 6b 62 69 74 20 3c 63 63 63 63 3e 20 73 ┆ synbit <yyyy> chkbit <cccc> s┆
0x9460…9480 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 72 2e 3a 3c 61 61 61 61 3e 0d 0a 19 80 81 82 20 20 ┆egm.:<ssss> addr.:<aaaa> ┆
0x9480…94a0 20 65 78 70 2e 3a 3c 65 65 65 65 3e 20 72 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a a1 0d 0a 0d 0a 54 ┆ exp.:<eeee> rec.:<rrrr> T┆
0x94a0…94c0 68 65 20 73 65 63 6f 6e 64 61 72 79 20 74 65 78 74 20 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 ┆he secondary text is interpreted┆
0x94c0…94e0 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d 0a 0d 0a 0d 0a 3c 79 79 79 79 3e 20 84 69 73 20 74 68 65 ┆ like this : <yyyy> is the┆
0x94e0…9500 20 73 79 6e 64 72 6f 6d 65 20 62 69 74 73 20 74 68 61 74 20 73 68 6f 75 64 20 69 6e 64 69 63 61 ┆ syndrome bits that shoud indica┆
0x9500…9520 74 65 20 61 20 6f 6e 65 20 62 69 74 20 65 72 72 6f 72 20 20 20 20 20 20 20 20 0a 19 87 80 80 63 ┆te a one bit error c┆
0x9520…9540 6f 72 72 65 63 74 69 6f 6e 2e 0d 0a 3c 63 63 63 63 3e 20 84 69 73 20 74 68 65 20 63 68 65 63 6b ┆orrection. <cccc> is the check┆
0x9540…9560 62 69 74 73 20 74 68 61 74 20 77 61 73 20 6e 6f 74 20 77 72 69 74 74 65 6e 20 62 65 63 61 75 73 ┆bits that was not written becaus┆
0x9560…9580 65 20 64 69 61 67 6e 6f 73 74 69 63 20 0a 19 87 80 80 6d 6f 64 65 20 77 61 73 20 73 65 6c 65 63 ┆e diagnostic mode was selec┆
0x9580…95a0 74 65 64 2e 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 20 36 34 20 4b 20 62 79 74 65 20 62 ┆ted. <ssss> is the 64 K byte b┆
0x95a0…95c0 6c 6f 63 6b 20 6e 75 6d 62 65 72 20 28 31 2d 46 46 29 2e 0d 0a 3c 61 61 61 61 3e 20 69 73 20 74 ┆lock number (1-FF). <aaaa> is t┆
0x95c0…95e0 68 65 20 6f 66 66 73 65 74 20 77 69 74 68 69 6e 20 74 68 65 20 62 6c 6f 63 6b 20 28 30 2d 46 46 ┆he offset within the block (0-FF┆
0x95e0…9600 46 46 29 2e 0d 0a 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 ┆FF). <eeee> is the expected pat┆
0x9600…9620 (75,) 74 65 72 6e 2c 20 61 6c 77 61 79 73 20 30 30 30 30 2e 0d 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 ┆tern, always 0000. <rrrr> is th┆
0x9620…9640 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e 0d 0a 0d 0a 0d 0a 49 66 20 6e 6f 20 65 ┆e received pattern. If no e┆
0x9640…9660 72 72 6f 72 20 6f 63 63 75 72 20 74 68 65 6e 20 74 68 65 20 70 61 74 74 65 72 6e 20 69 73 20 73 ┆rror occur then the pattern is s┆
0x9660…9680 68 69 66 74 65 64 20 6f 6e 65 20 70 6f 73 69 74 69 6f 6e 20 6c 65 66 74 20 0a 75 6e 74 69 6c 20 ┆hifted one position left until ┆
0x9680…96a0 61 20 63 61 72 72 79 20 61 6e 64 20 74 68 65 20 74 65 73 74 20 69 73 20 72 65 70 65 61 74 65 64 ┆a carry and the test is repeated┆
0x96a0…96c0 20 66 6f 72 20 65 76 65 72 79 20 6d 65 6d 6f 72 79 20 63 65 6c 6c 20 66 72 6f 6d 20 0a 74 68 65 ┆ for every memory cell from the┆
0x96c0…96e0 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 74 6f 20 74 68 65 20 65 6e 64 20 61 64 64 72 65 73 ┆ start address to the end addres┆
0x96e0…96ea 73 2e 0d 0a a1 82 0d 0a 0d 0a ┆s. ┆
0x96ea…96ed FormFeed {
0x96ea…96ed 0c 83 d8 ┆ ┆
0x96ea…96ed }
0x96ed…9700 0a a1 b0 32 30 2e 38 20 53 75 62 74 65 73 74 20 36 20 3d ┆ 20.8 Subtest 6 =┆
0x9700…9720 20 45 43 43 20 45 72 72 6f 72 20 44 65 74 65 63 74 69 6f 6e 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a ┆ ECC Error Detection Test. ┆
0x9720…9740 53 75 62 74 65 73 74 20 36 20 76 65 72 69 66 69 65 73 20 74 68 65 20 61 62 69 6c 69 74 79 20 6f ┆Subtest 6 verifies the ability o┆
0x9740…9760 66 20 74 68 65 20 45 43 43 20 68 61 72 64 77 61 72 65 20 63 69 72 63 69 75 74 72 79 20 74 6f 20 ┆f the ECC hardware circiutry to ┆
0x9760…9780 0a 64 65 74 65 63 74 20 64 6f 75 62 6c 65 20 62 69 74 20 65 72 72 6f 72 73 2e 0d 0a 0d 0a 0d 0a ┆ detect double bit errors. ┆
0x9780…97a0 46 69 72 73 74 20 74 68 65 20 74 65 73 74 20 72 65 73 65 74 73 20 61 6c 6c 20 6d 65 6d 6f 72 79 ┆First the test resets all memory┆
0x97a0…97c0 20 63 65 6c 6c 73 20 66 72 6f 6d 20 74 68 65 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 74 6f ┆ cells from the start address to┆
0x97c0…97e0 20 0a 74 68 65 20 65 6e 64 20 61 64 64 72 65 73 73 2c 20 61 6e 64 20 69 66 20 75 6e 61 62 6c 65 ┆ the end address, and if unable┆
0x97e0…9800 20 74 6f 20 72 65 73 65 74 20 6d 65 6d 6f 72 79 20 67 65 6e 65 72 61 74 65 73 20 61 6e 20 65 72 ┆ to reset memory generates an er┆
0x9800…9820 (76,) 72 6f 72 20 0a 6d 65 73 73 61 67 65 20 6c 69 6b 65 20 74 68 69 73 2e 0d 0a 0d 0a 0d 0a 31 2e 20 ┆ror message like this. 1. ┆
0x9820…9840 b0 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 36 20 2d 20 43 6f 75 6c ┆ MEM 60X Test: Subtest: 6 - Coul┆
0x9840…9860 64 20 6e 6f 74 20 72 65 73 65 74 20 52 41 4d 0d 0a 0d 0a 0d 0a 49 66 20 52 41 4d 20 69 73 20 72 ┆d not reset RAM If RAM is r┆
0x9860…9880 65 73 65 74 20 73 75 63 63 65 73 66 75 6c 6c 79 20 74 68 65 6e 20 74 68 65 20 74 65 73 74 20 70 ┆eset succesfully then the test p┆
0x9880…98a0 72 6f 63 65 65 64 73 20 61 6e 64 20 6d 61 6b 65 73 20 74 68 65 20 0a 73 74 61 72 74 20 61 64 64 ┆roceeds and makes the start add┆
0x98a0…98c0 72 65 73 73 20 45 56 45 4e 20 61 6c 69 67 6e 65 64 20 28 64 65 63 72 65 6d 65 6e 74 20 73 74 61 ┆ress EVEN aligned (decrement sta┆
0x98c0…98e0 72 74 20 61 64 64 72 65 73 73 20 69 66 20 4f 44 44 29 2e 20 54 68 65 6e 20 0a 61 20 70 61 74 74 ┆rt address if ODD). Then a patt┆
0x98e0…9900 65 72 6e 20 65 71 75 61 6c 20 74 6f 20 30 30 30 30 30 30 30 30 30 30 30 30 30 31 30 31 20 62 69 ┆ern equal to 0000000000000101 bi┆
0x9900…9920 6e 61 72 79 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 74 68 65 20 0a 6d 65 6d 6f 72 79 20 69 ┆nary is written to the memory i┆
0x9920…9940 6e 20 64 69 61 67 6e 6f 73 74 69 63 20 6d 6f 64 65 20 28 77 72 69 74 69 6e 67 20 6f 66 20 63 68 ┆n diagnostic mode (writing of ch┆
0x9940…9960 65 63 6b 62 69 74 73 20 69 6e 68 69 62 69 74 65 64 29 2c 20 74 68 65 20 0a 63 68 65 63 6b 62 69 ┆eckbits inhibited), the checkbi┆
0x9960…9980 74 73 20 69 73 20 72 65 61 64 20 61 6e 64 20 73 61 76 65 64 20 66 6f 72 20 61 6e 20 65 76 65 6e ┆ts is read and saved for an even┆
0x9980…99a0 74 75 61 6c 6c 79 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 2e 20 54 68 65 20 0a 6f 70 65 72 61 ┆tually error message. The opera┆
0x99a0…99c0 74 69 6e 67 20 6d 6f 64 65 20 69 73 20 72 65 73 74 6f 72 65 64 20 61 6e 64 20 74 68 65 20 64 61 ┆ting mode is restored and the da┆
0x99c0…99e0 74 61 20 69 73 20 72 65 61 64 20 62 61 63 6b 2e 20 54 68 65 20 0a 73 79 6e 64 72 6f 6d 65 20 62 ┆ta is read back. The syndrome b┆
0x99e0…9a00 69 74 73 20 61 72 65 20 72 65 61 64 20 61 6e 64 20 69 66 20 74 68 65 79 20 64 6f 65 73 27 6e 74 ┆its are read and if they does'nt┆
0x9a00…9a20 (77,) 20 69 6e 64 69 63 61 74 65 20 61 20 64 6f 75 62 6c 65 20 0a 65 72 72 6f 72 20 64 65 74 65 63 74 ┆ indicate a double error detect┆
0x9a20…9a40 69 6f 6e 20 74 68 65 6e 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 77 72 69 ┆ion then an error message is wri┆
0x9a40…9a60 74 74 65 6e 20 74 6f 20 74 68 65 20 63 6f 6e 73 6f 6c 65 2e 0d 0a 0d 0a 0d 0a 32 2e 20 b0 4d 45 ┆tten to the console. 2. ME┆
0x9a60…9a80 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 36 20 2d 20 65 72 72 6f 72 20 64 ┆M 60X Test: Subtest: 6 - error d┆
0x9a80…9aa0 65 74 65 63 74 69 6f 6e 20 65 72 72 6f 72 0d 0a b0 20 20 20 73 79 6e 62 69 74 20 3c 79 79 79 79 ┆etection error synbit <yyyy┆
0x9aa0…9ac0 3e 20 63 68 6b 62 69 74 20 3c 63 63 63 63 3e 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 20 61 64 64 ┆> chkbit <cccc> segm.:<ssss> add┆
0x9ac0…9ae0 72 2e 3a 3c 61 61 61 61 3e 20 0d 0a 19 80 81 82 20 20 20 65 78 70 2e 3a 3c 65 65 65 65 3e 20 72 ┆r.:<aaaa> exp.:<eeee> r┆
0x9ae0…9b00 65 63 2e 3a 3c 72 72 72 72 3e 0d 0a a1 0d 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 74 ┆ec.:<rrrr> The secondary t┆
0x9b00…9b20 65 78 74 20 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d 0a ┆ext is interpreted like this : ┆
0x9b20…9b40 0d 0a 0d 0a 3c 79 79 79 79 3e 20 84 69 73 20 74 68 65 20 73 79 6e 64 72 6f 6d 65 20 62 69 74 73 ┆ <yyyy> is the syndrome bits┆
0x9b40…9b60 20 74 68 61 74 20 73 68 6f 75 64 20 69 6e 64 69 63 61 74 65 20 61 20 64 6f 75 62 6c 65 20 62 69 ┆ that shoud indicate a double bi┆
0x9b60…9b80 74 20 0a 19 87 80 80 65 72 72 6f 72 20 64 65 74 65 63 74 69 6f 6e 0d 0a 3c 63 63 63 63 3e 20 84 ┆t error detection <cccc> ┆
0x9b80…9ba0 69 73 20 74 68 65 20 63 68 65 63 6b 62 69 74 73 20 74 68 61 74 20 77 61 73 20 6e 6f 74 20 77 72 ┆is the checkbits that was not wr┆
0x9ba0…9bc0 69 74 74 65 6e 20 62 65 63 61 75 73 65 20 64 69 61 67 6e 6f 73 74 69 63 20 0a 19 87 80 80 6d 6f ┆itten because diagnostic mo┆
0x9bc0…9be0 64 65 20 77 61 73 20 73 65 6c 65 63 74 65 64 2e 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 ┆de was selected. <ssss> is the┆
0x9be0…9c00 20 36 34 20 4b 20 62 79 74 65 20 62 6c 6f 63 6b 20 6e 75 6d 62 65 72 20 28 31 2d 46 46 29 2e 0d ┆ 64 K byte block number (1-FF). ┆
0x9c00…9c20 (78,) 0a 3c 61 61 61 61 3e 20 69 73 20 74 68 65 20 6f 66 66 73 65 74 20 77 69 74 68 69 6e 20 74 68 65 ┆ <aaaa> is the offset within the┆
0x9c20…9c40 20 62 6c 6f 63 6b 20 28 30 2d 46 46 46 46 29 2e 0d 0a 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 ┆ block (0-FFFF). <eeee> is the ┆
0x9c40…9c60 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2c 20 61 6c 77 61 79 73 20 30 30 30 30 2e 0d 0a ┆expected pattern, always 0000. ┆
0x9c60…9c80 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e 0d ┆<rrrr> is the received pattern. ┆
0x9c80…9ca0 0a 0d 0a 0d 0a 49 66 20 6e 6f 20 65 72 72 6f 72 20 6f 63 63 75 72 20 74 68 65 6e 20 74 68 65 20 ┆ If no error occur then the ┆
0x9ca0…9cc0 70 61 74 74 65 72 6e 20 69 73 20 73 68 69 66 74 65 64 20 6f 6e 65 20 70 6f 73 69 74 69 6f 6e 20 ┆pattern is shifted one position ┆
0x9cc0…9ce0 6c 65 66 74 20 0a 75 6e 74 69 6c 20 61 20 63 61 72 72 79 20 61 6e 64 20 74 68 65 20 74 65 73 74 ┆left until a carry and the test┆
0x9ce0…9d00 20 69 73 20 72 65 70 65 61 74 65 64 20 66 6f 72 20 65 76 65 72 79 20 6d 65 6d 6f 72 79 20 63 65 ┆ is repeated for every memory ce┆
0x9d00…9d20 6c 6c 20 66 72 6f 6d 20 0a 74 68 65 20 73 74 61 72 74 20 61 64 64 72 65 73 73 20 74 6f 20 74 68 ┆ll from the start address to th┆
0x9d20…9d33 65 20 65 6e 64 20 61 64 64 72 65 73 73 2e 0d 0a a1 82 0a ┆e end address. ┆
0x9d33…9d36 FormFeed {
0x9d33…9d36 0c 82 f8 ┆ ┆
0x9d33…9d36 }
0x9d36…9d40 0a a1 b0 32 31 2e 20 b0 54 45 ┆ 21. TE┆
0x9d40…9d60 53 54 20 31 36 f0 20 f0 3d 20 46 6c 6f 70 70 79 20 54 65 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 ┆ST 16 = Floppy Test. This┆
0x9d60…9d80 20 69 73 20 61 20 b0 73 65 70 65 72 61 74 65 6c 79 20 f0 72 75 6e 20 74 65 73 74 20 73 75 70 70 ┆ is a seperately run test supp┆
0x9d80…9da0 6c 69 65 64 20 74 6f 20 76 65 72 69 66 79 20 74 68 65 20 0a 19 80 81 80 66 75 6e 63 74 69 6f 6e ┆lied to verify the function┆
0x9da0…9dc0 61 6c 69 74 79 20 6f 66 20 74 68 65 20 66 6c 6f 70 70 79 20 64 69 73 6b 20 64 72 69 76 65 2c 20 ┆ality of the floppy disk drive, ┆
0x9dc0…9de0 6e 6f 74 20 74 68 65 20 66 6c 6f 70 70 79 20 6d 65 64 69 61 20 0a 19 80 81 80 69 74 73 65 6c 66 ┆not the floppy media itself┆
0x9de0…9e00 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 77 69 6c 6c 2c 20 69 66 20 6e 6f 74 20 74 65 ┆. This test will, if not te┆
0x9e00…9e20 (79,) 72 6d 69 6e 61 74 65 64 20 62 65 66 6f 72 65 20 74 68 65 20 65 6e 64 2c 20 76 65 72 69 66 79 20 ┆rminated before the end, verify ┆
0x9e20…9e40 65 76 65 72 79 20 0a 73 69 6e 67 6c 65 20 73 65 63 74 6f 72 20 6f 6e 20 74 68 65 20 66 6c 6f 70 ┆every single sector on the flop┆
0x9e40…9e60 70 79 20 64 69 73 63 2e 20 54 68 65 20 66 6f 72 6d 61 74 20 6f 66 20 74 68 65 20 66 6c 6f 70 70 ┆py disc. The format of the flopp┆
0x9e60…9e80 79 20 64 69 73 63 2c 20 0a 77 68 69 63 68 20 6d 75 73 74 20 62 65 20 66 6f 72 6d 61 74 74 65 64 ┆y disc, which must be formatted┆
0x9e80…9ea0 20 70 72 6f 70 65 72 6c 79 20 70 72 69 6f 20 74 6f 20 74 68 65 20 74 65 73 74 2c 20 69 73 20 66 ┆ properly prio to the test, is f┆
0x9ea0…9ec0 69 78 65 64 20 61 6e 64 20 0a 69 73 2e 0d 0a 0d 0a 0d 0a 09 09 09 84 31 30 32 34 20 62 79 74 65 ┆ixed and is. 1024 byte┆
0x9ec0…9ee0 73 2f 73 65 63 74 6f 72 2e 0d 0a 09 09 09 38 20 73 65 63 74 6f 72 73 2f 74 72 61 63 6b 2e 0d 0a ┆s/sector. 8 sectors/track. ┆
0x9ee0…9f00 09 09 09 32 20 68 65 61 64 73 2f 63 79 6c 69 6e 64 65 72 2e 0d 0a 09 09 09 37 37 20 63 79 6c 69 ┆ 2 heads/cylinder. 77 cyli┆
0x9f00…9f20 6e 64 65 72 73 2f 64 69 73 6b 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 74 65 73 74 20 76 65 72 69 66 ┆nders/disk. This test verif┆
0x9f20…9f40 69 65 73 20 74 68 65 20 66 6c 6f 70 70 79 20 64 72 69 76 65 20 73 65 63 74 6f 72 20 66 6f 72 20 ┆ies the floppy drive sector for ┆
0x9f40…9f60 73 65 63 74 6f 72 2c 20 62 65 67 69 6e 6e 69 6e 67 20 0a 77 69 74 68 20 73 65 63 74 6f 72 20 30 ┆sector, beginning with sector 0┆
0x9f60…9f80 20 28 68 65 61 64 20 30 20 74 72 61 63 6b 20 30 20 73 65 63 74 6f 72 20 30 29 2e 20 42 65 66 6f ┆ (head 0 track 0 sector 0). Befo┆
0x9f80…9fa0 72 65 20 74 68 65 20 73 65 63 74 6f 72 20 69 73 20 0a 77 72 69 74 74 65 6e 20 74 68 65 20 63 6f ┆re the sector is written the co┆
0x9fa0…9fc0 6e 74 65 6e 74 20 6f 66 20 74 68 65 20 73 65 63 74 6f 72 20 69 73 20 72 65 61 64 20 74 6f 20 61 ┆ntent of the sector is read to a┆
0x9fc0…9fe0 20 73 61 76 65 20 62 75 66 66 65 72 2c 20 77 68 69 63 68 20 0a 69 73 20 72 65 73 74 6f 72 65 64 ┆ save buffer, which is restored┆
0x9fe0…a000 20 69 66 20 6e 6f 20 64 69 73 6b 20 65 72 72 6f 72 20 6f 63 63 75 72 2e 20 54 68 69 73 20 6d 61 ┆ if no disk error occur. This ma┆
0xa000…a020 (80,) 6b 65 73 20 74 68 65 20 66 6c 6f 70 70 79 20 74 65 73 74 2c 20 0a 69 66 20 74 68 65 20 66 6c 6f ┆kes the floppy test, if the flo┆
0xa020…a040 70 70 79 20 64 72 69 76 65 73 20 69 73 20 6f 6b 2c 20 6e 6f 6e 20 6d 65 64 69 61 20 64 65 73 74 ┆ppy drives is ok, non media dest┆
0xa040…a060 72 75 63 74 69 76 65 2e 20 49 66 20 74 68 65 20 74 65 73 74 20 0a 63 61 6e 6e 6f 74 20 72 65 61 ┆ructive. If the test cannot rea┆
0xa060…a080 64 20 61 20 73 65 63 74 6f 72 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 ┆d a sector an error message is g┆
0xa080…a0a0 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 31 2e 20 b0 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 ┆enerated. 1. Floppy test: ┆
0xa0a0…a0c0 46 6c 6f 70 70 79 20 63 61 6e 20 6e 6f 74 20 72 65 61 64 20 09 09 72 65 63 2e 3a 3c 72 72 72 72 ┆Floppy can not read rec.:<rrrr┆
0xa0c0…a0e0 3e 0d 0a 0d 0a 0d 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 65 72 72 6f 72 20 63 6f 64 65 20 ┆> <rrrr> is the error code ┆
0xa0e0…a100 66 72 6f 6d 20 74 68 65 20 64 69 73 63 20 63 6f 6e 74 72 6f 6c 6c 65 72 2e 20 54 68 65 20 4f 4d ┆from the disc controller. The OM┆
0xa100…a120 54 49 20 52 65 66 65 72 65 6e 63 65 20 0a 4d 61 6e 75 61 6c 20 28 53 44 43 20 36 39 31 29 20 41 ┆TI Reference Manual (SDC 691) A┆
0xa120…a140 70 70 65 6e 64 69 78 20 42 20 67 69 76 65 73 20 74 68 65 20 69 6e 66 6f 72 6d 61 74 69 6f 6e 20 ┆ppendix B gives the information ┆
0xa140…a160 61 62 6f 75 74 20 74 68 69 73 20 0a 65 72 72 6f 72 20 63 6f 64 65 2e 0d 0a 0d 0a 0d 0a 49 66 20 ┆about this error code. If ┆
0xa160…a180 74 68 65 20 64 69 73 6b 20 63 6f 6e 74 72 6f 6c 6c 65 72 20 64 6f 65 73 27 6e 74 20 72 65 73 70 ┆the disk controller does'nt resp┆
0xa180…a1a0 6f 6e 64 20 74 6f 20 61 20 64 69 73 6b 27 73 20 63 6f 6d 6d 61 6e 64 20 77 69 74 68 69 6e 20 0a ┆ond to a disk's command within ┆
0xa1a0…a1c0 31 20 73 65 63 6f 6e 64 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e ┆1 second an error message is gen┆
0xa1c0…a1e0 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 32 2e 20 b0 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 74 72 ┆erated. 2. Floppy test: tr┆
0xa1e0…a200 61 6e 73 66 65 72 20 74 69 6d 65 6f 75 74 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 66 69 72 73 74 ┆ansfer timeout If the first┆
0xa200…a220 (81,) 20 73 74 65 70 20 77 65 6e 74 20 73 75 63 63 65 73 66 75 6c 6c 2c 20 74 68 65 6e 20 61 20 70 61 ┆ step went succesfull, then a pa┆
0xa220…a240 74 74 65 72 6e 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f 20 0a 74 68 65 20 73 65 63 74 6f 72 2c ┆ttern is written to the sector,┆
0xa240…a260 20 61 6e 64 20 74 68 65 20 64 69 73 63 20 63 6f 6e 74 72 6f 6c 6c 65 72 20 6d 61 79 20 72 65 73 ┆ and the disc controller may res┆
0xa260…a280 70 6f 6e 64 20 77 69 74 68 20 61 6e 20 65 72 72 6f 72 20 0a 77 68 69 63 68 20 6d 61 6b 65 73 20 ┆pond with an error which makes ┆
0xa280…a2a0 74 68 65 20 74 65 73 74 20 70 72 6f 67 72 61 6d 20 77 72 69 74 65 20 61 6e 20 65 72 72 6f 72 20 ┆the test program write an error ┆
0xa2a0…a2c0 6d 65 73 73 61 67 65 2e 0d 0a 0d 0a 0d 0a 33 2e 20 b0 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 46 ┆message. 3. Floppy test: F┆
0xa2c0…a2e0 6c 6f 70 70 79 20 63 61 6e 20 6e 6f 74 20 77 72 69 74 65 20 09 09 72 65 63 2e 3a 3c 72 72 72 72 ┆loppy can not write rec.:<rrrr┆
0xa2e0…a300 3e 0d 0a 0d 0a 0d 0a 49 66 20 6e 6f 20 65 72 72 6f 72 20 68 61 73 20 68 61 70 70 65 6e 64 20 75 ┆> If no error has happend u┆
0xa300…a320 6e 74 69 6c 20 6e 6f 77 20 74 68 65 20 73 65 63 74 6f 72 20 69 73 20 72 65 61 64 20 62 61 63 6b ┆ntil now the sector is read back┆
0xa320…a340 20 61 6e 64 20 0a 63 6f 6d 70 61 72 65 64 20 74 6f 20 74 68 65 20 6f 72 69 67 69 6e 61 6c 20 6f ┆ and compared to the original o┆
0xa340…a360 6e 65 2c 20 61 6e 64 20 69 66 20 65 71 75 61 6c 20 74 68 65 20 74 65 73 74 20 69 73 20 72 65 70 ┆ne, and if equal the test is rep┆
0xa360…a380 65 61 74 65 64 20 0a 6f 6e 20 74 68 65 20 6e 65 78 74 20 73 65 63 74 6f 72 20 75 6e 74 69 6c 20 ┆eated on the next sector until ┆
0xa380…a3a0 65 6e 64 20 6f 66 20 64 69 73 6b 2c 20 6f 74 68 65 72 77 69 73 65 20 61 6e 20 65 72 72 6f 72 20 ┆end of disk, otherwise an error ┆
0xa3a0…a3c0 6d 65 73 73 61 67 65 20 0a 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 8c 83 c8 0a ┆message is generated. ┆
0xa3c0…a3e0 34 2e 20 b0 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 62 61 64 20 73 65 63 74 6f 72 20 20 73 65 63 ┆4. Floppy test: bad sector sec┆
0xa3e0…a400 74 6f 72 3a 3c 64 64 64 64 3e 2c 20 73 65 67 6d 2e 3a 3c 73 73 73 73 3e 2c 0d 0a 09 09 20 20 b0 ┆tor:<dddd>, segm.:<ssss>, ┆
0xa400…a420 (82,) 61 64 64 72 2e 3a 3c 61 61 61 61 3e 2c 20 65 78 70 2e 3a 3c 65 65 65 65 3e 2c 20 72 65 63 2e 3a ┆addr.:<aaaa>, exp.:<eeee>, rec.:┆
0xa420…a440 3c 72 72 72 72 3e 0d 0a 0d 0a 0d 0a 54 68 65 20 73 65 63 6f 6e 64 61 72 79 20 65 72 72 6f 72 20 ┆<rrrr> The secondary error ┆
0xa440…a460 74 65 78 74 20 69 73 20 69 6e 74 65 72 70 72 65 74 65 64 20 6c 69 6b 65 20 74 68 69 73 20 3a 0d ┆text is interpreted like this : ┆
0xa460…a480 0a 0d 0a 0d 0a 3c 64 64 64 64 3e 20 67 69 76 65 73 20 74 68 65 20 61 64 64 72 65 73 73 20 6f 66 ┆ <dddd> gives the address of┆
0xa480…a4a0 20 74 68 65 20 62 61 64 20 73 65 63 74 6f 72 2e 0d 0a 3c 73 73 73 73 3e 20 84 69 73 20 74 68 65 ┆ the bad sector. <ssss> is the┆
0xa4a0…a4c0 20 73 65 67 6d 65 6e 74 20 4c 44 54 20 73 65 6c 65 63 74 6f 72 20 28 75 73 65 20 52 43 20 33 39 ┆ segment LDT selector (use RC 39┆
0xa4c0…a4e0 20 4d 6f 6e 69 74 6f 72 20 74 6f 20 0a 19 87 80 80 64 65 74 65 72 6d 69 6e 65 20 74 68 65 20 70 ┆ Monitor to determine the p┆
0xa4e0…a500 68 79 73 69 63 61 6c 20 61 64 64 72 65 73 73 20 2d 20 58 4c 44 54 20 3c 73 73 73 73 3e 29 2e 0d ┆hysical address - XLDT <ssss>). ┆
0xa500…a520 0a 3c 61 61 61 61 3e 20 69 73 20 74 68 65 20 73 65 67 6d 65 6e 74 20 6f 66 66 73 65 74 2e 0d 0a ┆ <aaaa> is the segment offset. ┆
0xa520…a540 3c 65 65 65 65 3e 20 69 73 20 74 68 65 20 65 78 70 65 63 74 65 64 20 70 61 74 74 65 72 6e 2e 0d ┆<eeee> is the expected pattern. ┆
0xa540…a560 0a 3c 72 72 72 72 3e 20 69 73 20 74 68 65 20 72 65 63 65 69 76 65 64 20 70 61 74 74 65 72 6e 2e ┆ <rrrr> is the received pattern.┆
0xa560…a580 0d 0a 0d 0a 0d 0a 4f 74 68 65 72 77 69 73 65 2e 20 49 66 20 61 6e 20 65 72 72 6f 72 20 6f 66 20 ┆ Otherwise. If an error of ┆
0xa580…a5a0 74 68 65 20 64 69 73 6b 20 63 6f 6e 74 72 6f 6c 6c 65 72 20 6f 72 20 6f 66 20 74 68 65 20 64 69 ┆the disk controller or of the di┆
0xa5a0…a5c0 73 6b 20 0a 64 72 69 76 65 20 69 73 20 64 69 73 63 6f 76 65 72 65 64 20 61 6e 20 65 72 72 6f 72 ┆sk drive is discovered an error┆
0xa5c0…a5e0 20 6d 65 73 73 61 67 65 20 6c 69 6b 65 20 74 68 69 73 20 69 73 20 77 72 69 74 74 65 6e 20 74 6f ┆ message like this is written to┆
0xa5e0…a600 20 74 68 65 20 0a 63 6f 6e 73 6f 6c 65 2e 0d 0a 0d 0a 0d 0a 82 35 2e 20 b0 46 6c 6f 70 70 79 20 ┆ the console. 5. Floppy ┆
0xa600…a620 (83,) 74 65 73 74 3a 20 66 6c 6f 70 70 79 20 63 6f 6d 6d 61 6e 64 20 65 72 72 6f 72 0d 0a 0d 0a 0d 0a ┆test: floppy command error ┆
0xa620…a640 54 68 69 73 20 65 72 72 6f 72 20 6d 69 67 68 74 20 62 65 20 63 61 75 73 65 64 20 62 79 20 6d 61 ┆This error might be caused by ma┆
0xa640…a660 6c 66 75 6e 63 74 69 6f 6e 20 6f 66 20 74 68 65 20 64 69 73 63 2c 20 62 79 20 61 20 66 61 75 6c ┆lfunction of the disc, by a faul┆
0xa660…a680 74 20 0a 6f 66 20 74 68 65 20 69 6e 74 65 72 66 61 63 65 20 63 69 72 63 75 69 74 73 20 2c 20 6f ┆t of the interface circuits , o┆
0xa680…a6a0 72 20 62 79 20 73 6f 6d 65 74 68 69 6e 67 20 65 6c 73 65 2e 20 0d 0a 0d 0a 0d 0a 49 66 20 6e 6f ┆r by something else. If no┆
0xa6a0…a6c0 20 65 72 72 6f 72 20 68 61 70 70 65 6e 73 2c 20 74 68 65 6e 20 74 68 65 20 66 6c 6f 70 70 79 20 ┆ error happens, then the floppy ┆
0xa6c0…a6e0 74 65 73 74 20 77 72 69 74 65 73 20 61 20 27 2e 27 20 28 70 65 72 69 6f 64 29 20 0a 74 6f 20 74 ┆test writes a '.' (period) to t┆
0xa6e0…a700 68 65 20 63 6f 6e 73 6f 6c 65 20 6f 75 74 70 75 74 20 66 6f 72 20 65 76 65 72 79 20 63 79 6c 69 ┆he console output for every cyli┆
0xa700…a720 6e 64 65 72 20 76 65 72 69 66 69 65 64 20 6c 69 6b 65 20 74 68 69 73 2e 0d 0a 0d 0a 0d 0a b0 46 ┆nder verified like this. F┆
0xa720…a740 6c 6f 70 70 79 20 74 65 73 74 3a 20 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 2e 20 20 61 6e 64 20 73 6f 20 ┆loppy test: ........... and so ┆
0xa740…a760 6f 6e 0d 0a 0d 0a 0d 0a 54 68 65 20 46 6c 6f 70 70 79 20 74 65 73 74 20 69 73 20 74 65 72 6d 69 ┆on The Floppy test is termi┆
0xa760…a77d 6e 61 74 65 64 20 62 79 20 74 68 65 20 65 73 63 61 70 65 20 62 75 74 74 6f 6e 2e 0d 0a ┆nated by the escape button. ┆
0xa77d…a780 FormFeed {
0xa77d…a780 0c 82 98 ┆ ┆
0xa77d…a780 }
0xa780…a7a0 0a a1 b0 32 32 2e b0 20 54 45 53 54 20 31 37 f0 20 3d 20 50 72 69 6e 74 65 72 20 54 65 73 74 2e ┆ 22. TEST 17 = Printer Test.┆
0xa7a0…a7c0 0d 0a 0d 0a 0d 0a 41 20 b0 73 65 70 65 72 61 74 65 6c 79 20 f0 72 75 6e 20 74 65 73 74 20 69 73 ┆ A seperately run test is┆
0xa7c0…a7e0 20 73 75 70 70 6c 69 65 64 20 74 6f 20 76 65 72 69 66 79 20 74 68 65 20 66 75 6e 63 74 69 6f 6e ┆ supplied to verify the function┆
0xa7e0…a800 61 6c 69 74 79 20 6f 66 20 0a 19 80 81 80 74 68 65 20 43 65 6e 74 72 6f 6e 69 78 20 50 72 69 6e ┆ality of the Centronix Prin┆
0xa800…a820 (84,) 74 65 72 20 49 6e 74 65 72 66 61 63 65 2e 20 54 68 65 20 74 65 73 74 20 77 72 69 74 65 73 20 61 ┆ter Interface. The test writes a┆
0xa820…a840 20 70 61 74 74 65 72 6e 20 74 6f 20 74 68 65 20 0a 19 80 81 80 70 72 69 6e 74 65 72 20 6c 69 6b ┆ pattern to the printer lik┆
0xa840…a84d 65 20 74 68 69 73 3a 0d 0a 0d 0a 0d 0a ┆e this: ┆
0xa84d…a886 Params {
0xa84d…a886 04 00 2d 4e 0c 00 06 00 00 00 00 02 01 4b 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N K1@ ┆
0xa84d…a886 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4a 4b 55 5f 69 73 7d ff 04 ┆ (08@JKU_iså ┆
0xa84d…a886 }
0xa886…a8bf Params {
0xa886…a8bf 04 00 2d 4e 0a 00 06 00 00 00 00 02 01 41 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N A1@ ┆
0xa886…a8bf 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4b 55 5f 69 73 7d ff ff 04 ┆ (08@KU_iså ┆
0xa886…a8bf }
0xa8bf…a8c0 0a ┆ ┆
0xa8c0…a8e0 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 ┆!"#$%&'()*+,-./0123456789!"#$%&'┆
0xa8e0…a900 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e ┆()*+,-./0123456789!"#$%&'()*+,-.┆
0xa900…a920 2f 30 31 32 33 34 35 36 0d 0a 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 ┆/0123456 789!"#$%&'()*+,-./0123┆
0xa920…a940 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 ┆456789!"#$%&'()*+,-./0123456789!┆
0xa940…a960 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 0d 0a 33 34 35 36 37 38 39 21 22 23 24 25 26 ┆"#$%&'()*+,-./012 3456789!"#$%&┆
0xa960…a980 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d ┆'()*+,-./0123456789!"#$%&'()*+,-┆
0xa980…a9a0 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 0d 0a 2f 30 31 32 ┆./0123456789!"#$%&'()*+,-. /012┆
0xa9a0…a9c0 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 ┆3456789!"#$%&'()*+,-./0123456789┆
0xa9c0…a9e0 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 ┆!"#$%&'()*+,-./0123456789!"#$%&'┆
0xa9e0…aa00 28 29 2a 0d 0a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c ┆()* +,-./0123456789!"#$%&'()*+,┆
0xaa00…aa20 (85,) 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 ┆-./0123456789!"#$%&'()*+,-./0123┆
0xaa20…aa40 34 35 36 37 38 39 21 22 23 24 25 26 0d 0a 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 ┆456789!"#$%& '()*+,-./012345678┆
0xaa40…aa60 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 ┆9!"#$%&'()*+,-./0123456789!"#$%&┆
0xaa60…aa80 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 0d 0a 23 24 25 26 27 28 29 2a 2b ┆'()*+,-./0123456789!" #$%&'()*+┆
0xaa80…aaa0 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 ┆,-./0123456789!"#$%&'()*+,-./012┆
0xaaa0…aac0 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 ┆3456789!"#$%&'()*+,-./0123456789┆
0xaac0…aae0 0d 0a 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 ┆ !"#$%&'()*+,-./0123456789!"#$%┆
0xaae0…ab00 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c ┆&'()*+,-./0123456789!"#$%&'()*+,┆
0xab00…ab20 2d 2e 2f 30 31 32 33 34 35 36 0d 0a 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 ┆-./0123456 789!"#$%&'()*+,-./01┆
0xab20…ab40 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 ┆23456789!"#$%&'()*+,-./012345678┆
0xab40…ab60 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 0d 0a 33 34 35 36 37 38 39 21 22 23 24 ┆9!"#$%&'()*+,-./012 3456789!"#$┆
0xab60…ab80 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b ┆%&'()*+,-./0123456789!"#$%&'()*+┆
0xab80…aba0 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 0d 0a 2f 30 ┆,-./0123456789!"#$%&'()*+,-. /0┆
0xaba0…abc0 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 ┆123456789!"#$%&'()*+,-./01234567┆
0xabc0…abe0 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 ┆89!"#$%&'()*+,-./0123456789!"#$%┆
0xabe0…ac00 26 27 28 29 2a 0d 0a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a ┆&'()* +,-./0123456789!"#$%&'()*┆
0xac00…ac20 (86,) 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 ┆+,-./0123456789!"#$%&'()*+,-./01┆
0xac20…ac40 32 33 34 35 36 37 38 39 21 22 23 24 25 26 0d 0a 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 ┆23456789!"#$%& '()*+,-./0123456┆
0xac40…ac60 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 ┆789!"#$%&'()*+,-./0123456789!"#$┆
0xac60…ac80 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 0d 0a 23 24 25 26 27 28 29 ┆%&'()*+,-./0123456789!" #$%&'()┆
0xac80…aca0 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 ┆*+,-./0123456789!"#$%&'()*+,-./0┆
0xaca0…acc0 31 32 33 34 35 36 37 38 39 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 ┆123456789!"#$%&'()*+,-./01234567┆
0xacc0…acd2 38 39 0d 0a 0d 0a 61 6e 64 20 73 6f 20 6f 6e 2e 0d 0a ┆89 and so on. ┆
0xacd2…ad0b Params {
0xacd2…ad0b 04 00 2d 4e 0a 00 06 00 00 00 00 02 01 41 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N A1@ ┆
0xacd2…ad0b 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4a 4b 55 5f 69 73 7d ff 04 ┆ (08@JKU_iså ┆
0xacd2…ad0b }
0xad0b…ad44 Params {
0xad0b…ad44 04 00 2d 4e 0c 00 06 00 00 00 00 02 01 4b 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N K1@ ┆
0xad0b…ad44 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4a 4b 55 5f 69 73 7d ff 04 ┆ (08@JKU_iså ┆
0xad0b…ad44 }
0xad44…ad60 0a 0d 0a 0d 0a 54 68 65 20 70 72 69 6e 74 65 72 20 74 65 73 74 20 69 73 20 74 65 72 ┆ The printer test is ter┆
0xad60…ad80 6d 69 6e 61 74 65 64 20 62 79 20 74 68 65 20 65 73 63 61 70 65 20 62 75 74 74 6f 6e 2e 0d 0a 0d ┆minated by the escape button. ┆
0xad80…ada0 0a 0d 0a 49 66 20 74 68 65 20 70 72 69 6e 74 65 72 20 69 73 27 6e 74 20 73 65 6c 65 63 74 65 64 ┆ If the printer is'nt selected┆
0xada0…adc0 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 65 6e 65 72 61 74 65 64 2e 0d ┆ an error message is generated. ┆
0xadc0…ade0 0a 0d 0a 0d 0a 31 2e 20 b0 50 72 69 6e 74 65 72 20 54 65 73 74 3a 20 70 72 69 6e 74 65 72 20 6e ┆ 1. Printer Test: printer n┆
0xade0…ae00 6f 74 20 73 65 6c 65 63 74 65 64 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 64 6f 65 73 27 6e 74 20 ┆ot selected If the does'nt ┆
0xae00…ae20 (87,) 72 65 73 70 6f 6e 64 20 74 6f 20 61 20 63 68 61 72 61 63 74 65 72 20 28 53 54 52 4f 42 45 20 73 ┆respond to a character (STROBE s┆
0xae20…ae40 69 67 6e 61 6c 29 20 77 69 74 68 20 61 6e 20 0a 61 63 6b 6e 6f 77 6c 65 64 67 65 20 69 6e 74 65 ┆ignal) with an acknowledge inte┆
0xae40…ae60 72 72 75 70 74 20 74 68 65 6e 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 67 ┆rrupt then an error message is g┆
0xae60…ae80 65 6e 65 72 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 32 2e 20 b0 50 72 69 6e 74 65 72 20 54 65 73 74 3a ┆enerated. 2. Printer Test:┆
0xae80…aea0 20 6d 69 73 73 69 6e 67 20 69 6e 74 65 72 72 75 70 74 0d 0a 0d 0a 0d 0a 49 66 20 74 68 65 20 70 ┆ missing interrupt If the p┆
0xaea0…aec0 72 69 6e 74 65 72 20 69 73 20 62 75 73 79 20 66 6f 72 20 6d 6f 72 65 20 74 68 61 6e 20 31 20 6d ┆rinter is busy for more than 1 m┆
0xaec0…aee0 69 6e 75 74 65 20 61 6e 20 65 72 72 6f 72 20 6d 65 73 73 61 67 65 20 69 73 20 0a 67 65 6e 65 72 ┆inute an error message is gener┆
0xaee0…af00 61 74 65 64 2e 0d 0a 0d 0a 0d 0a 33 2e 20 b0 50 72 69 6e 74 65 72 20 54 65 73 74 3a 20 70 72 69 ┆ated. 3. Printer Test: pri┆
0xaf00…af0d 6e 74 65 72 20 62 75 73 79 0d 0a 0a 0a ┆nter busy ┆
0xaf0d…af10 FormFeed {
0xaf0d…af10 0c 83 88 ┆ ┆
0xaf0d…af10 }
0xaf10…af20 0a a1 b0 32 32 2e 20 b0 54 45 53 54 20 31 38 f0 ┆ 22. TEST 18 ┆
0xaf20…af40 20 3d 20 52 65 61 6c 20 54 69 6d 65 20 43 6c 6f 63 6b 20 41 64 6a 75 73 74 6d 65 6e 74 20 54 65 ┆ = Real Time Clock Adjustment Te┆
0xaf40…af60 73 74 2e 0d 0a 0d 0a 0d 0a 54 68 69 73 20 b0 73 65 70 65 72 61 74 65 6c 79 20 f0 74 65 73 74 20 ┆st. This seperately test ┆
0xaf60…af80 6d 75 73 74 20 65 78 65 63 75 74 65 20 64 75 72 69 6e 67 20 52 65 61 6c 20 54 69 6d 65 20 43 6c ┆must execute during Real Time Cl┆
0xaf80…afa0 6f 63 6b 20 0a 19 80 81 80 61 64 6a 75 73 74 6d 65 6e 74 2e 20 54 68 65 20 52 54 43 20 69 73 20 ┆ock adjustment. The RTC is ┆
0xafa0…afc0 70 72 6f 67 72 61 6d 6d 65 64 20 74 6f 20 67 65 6e 65 72 61 74 65 20 69 6e 74 65 72 72 75 70 74 ┆programmed to generate interrupt┆
0xafc0…afe0 20 65 76 65 72 79 20 0a 19 80 81 80 73 65 63 6f 6e 64 2c 20 61 6e 64 20 74 68 69 73 20 70 72 6f ┆ every second, and this pro┆
0xafe0…b000 67 72 61 6d 20 6d 75 73 74 20 65 78 65 63 75 74 65 20 69 6e 20 6f 72 64 65 72 20 74 6f 20 72 65 ┆gram must execute in order to re┆
0xb000…b020 (88,) 73 65 74 73 20 74 68 65 20 0a 19 80 81 80 69 6e 74 65 72 72 75 70 74 20 65 76 65 72 79 20 73 65 ┆sets the interrupt every se┆
0xb020…b040 63 6f 6e 64 2e 20 54 68 65 20 74 65 73 74 20 69 73 20 74 65 72 6d 69 6e 61 74 65 64 20 62 79 20 ┆cond. The test is terminated by ┆
0xb040…b05a 74 68 65 20 3c 65 73 63 61 70 65 3e 20 0a 19 80 81 80 62 75 74 74 6f 6e 2e 0a ┆the <escape> button. ┆
0xb05a…b05d FormFeed {
0xb05a…b05d 0c 80 c0 ┆ ┆
0xb05a…b05d }
0xb05d…b060 0a a1 b0 ┆ ┆
0xb060…b080 32 33 2e 20 4c 45 44 20 4f 55 54 50 55 54 2e 0d 0a 0d 0a 0d 0a 44 75 72 69 6e 67 20 74 68 65 20 ┆23. LED OUTPUT. During the ┆
0xb080…b0a0 65 78 65 63 75 74 69 6f 6e 20 6f 66 20 73 65 6c 66 74 65 73 74 20 74 68 65 20 4c 45 44 20 6e 61 ┆execution of selftest the LED na┆
0xb0a0…b0c0 6d 65 64 20 22 54 45 53 54 22 20 63 6f 6e 6e 65 63 74 65 64 20 0a 74 6f 20 62 69 74 20 31 20 6f ┆med "TEST" connected to bit 1 o┆
0xb0c0…b0e0 6e 20 74 68 65 20 38 32 35 35 20 50 50 49 20 70 6f 72 74 20 43 20 28 49 2f 4f 20 61 64 64 72 65 ┆n the 8255 PPI port C (I/O addre┆
0xb0e0…b100 73 73 20 43 43 20 68 65 78 2e 29 20 69 73 20 6c 69 74 2e 20 49 66 20 0a 61 6e 20 65 72 72 6f 72 ┆ss CC hex.) is lit. If an error┆
0xb100…b120 20 6f 63 63 75 72 2c 20 65 78 63 65 70 74 20 63 68 65 63 6b 73 75 6d 20 65 72 72 6f 72 20 61 6e ┆ occur, except checksum error an┆
0xb120…b140 64 20 69 6e 69 74 69 61 6c 20 52 41 4d 20 65 72 72 6f 72 2c 20 74 68 65 6e 20 0a 74 68 65 20 4c ┆d initial RAM error, then the L┆
0xb140…b160 45 44 20 69 73 20 6d 61 64 65 20 66 6c 61 73 68 69 6e 67 2e 20 54 68 69 73 20 4c 45 44 20 69 73 ┆ED is made flashing. This LED is┆
0xb160…b180 20 70 6c 61 63 65 64 20 6f 6e 20 74 68 65 20 66 72 6f 6e 74 20 6f 66 20 74 68 65 20 0a 52 43 20 ┆ placed on the front of the RC ┆
0xb180…b18d 33 39 20 63 61 62 69 6e 65 74 2e 0d 0a ┆39 cabinet. ┆
0xb18d…b190 FormFeed {
0xb18d…b190 0c 80 c0 ┆ ┆
0xb18d…b190 }
0xb190…b193 0a 0d 0a ┆ ┆
0xb193…b196 FormFeed {
0xb193…b196 0c 80 88 ┆ ┆
0xb193…b196 }
0xb196…b1a0 0a a1 b0 41 2e 20 52 45 46 45 ┆ A. REFE┆
0xb1a0…b1c0 52 45 4e 43 45 53 0d 0a 0d 0a 0d 0a 52 43 20 33 39 20 53 65 6c 66 74 65 73 74 20 43 6f 6e 63 65 ┆RENCES RC 39 Selftest Conce┆
0xb1c0…b1e0 70 74 2c 20 55 73 65 72 27 73 20 6d 61 6e 75 61 6c 20 09 20 20 20 20 20 20 20 20 20 20 52 43 53 ┆pt, User's manual RCS┆
0xb1e0…b200 4c 2e 20 39 39 31 20 31 30 30 39 32 0d 0a 0d 0a 52 43 20 33 39 33 31 20 45 54 43 36 31 31 20 68 ┆L. 991 10092 RC 3931 ETC611 h┆
0xb200…b220 (89,) 61 72 64 77 61 72 65 20 73 65 6c 66 74 65 73 74 2c 20 55 73 65 72 27 73 20 6d 61 6e 75 61 6c 20 ┆ardware selftest, User's manual ┆
0xb220…b240 20 52 43 53 4c 2e 20 39 39 31 20 31 30 30 39 36 0d 0a 0d 0a 46 36 34 31 20 43 4f 4d 20 36 30 31 ┆ RCSL. 991 10096 F641 COM 601┆
0xb240…b260 20 68 61 72 64 77 61 72 65 20 73 65 6c 66 74 65 73 74 2c 20 55 73 65 72 27 73 20 6d 61 6e 75 61 ┆ hardware selftest, User's manua┆
0xb260…b280 6c 20 20 20 20 52 43 53 4c 2e 20 39 39 31 20 31 30 30 39 37 0d 0a 0d 0a 49 54 43 20 36 30 32 20 ┆l RCSL. 991 10097 ITC 602 ┆
0xb280…b2a0 68 61 72 64 77 61 72 65 20 73 65 6c 66 74 65 73 74 2c 20 55 73 65 72 27 73 20 6d 61 6e 75 61 6c ┆hardware selftest, User's manual┆
0xb2a0…b2c0 09 20 20 52 43 53 4c 2e 20 39 39 31 20 31 30 30 39 35 0d 0a a1 0d 0a 52 43 33 39 20 6d 6f 6e 69 ┆ RCSL. 991 10095 RC39 moni┆
0xb2c0…b2e0 74 6f 72 20 38 30 38 36 20 76 65 72 73 69 6f 6e 2c 20 52 65 66 65 72 65 6e 63 65 20 6d 61 6e 75 ┆tor 8086 version, Reference manu┆
0xb2e0…b300 61 6c 09 20 20 52 43 53 4c 2e 20 39 39 31 20 31 30 31 33 34 0d 0a 0d 0a 52 43 33 39 20 6d 6f 6e ┆al RCSL. 991 10134 RC39 mon┆
0xb300…b320 69 74 6f 72 20 38 30 32 38 36 20 76 65 72 73 69 6f 6e 2c 20 52 65 66 65 72 65 6e 63 65 20 6d 61 ┆itor 80286 version, Reference ma┆
0xb320…b340 6e 75 61 6c 20 20 20 20 20 52 43 53 4c 2e 20 39 39 31 20 31 30 30 39 33 0d 0a 0d 0a 52 43 20 33 ┆nual RCSL. 991 10093 RC 3┆
0xb340…b360 39 30 32 20 28 43 50 55 20 36 39 31 29 20 68 61 72 64 77 61 72 65 20 73 65 6c 66 74 65 73 74 2c ┆902 (CPU 691) hardware selftest,┆
0xb360…b380 20 55 73 65 72 27 73 20 6d 61 6e 2e 20 52 43 53 4c 2e 20 39 39 31 20 31 30 30 39 34 0d 0a 0d 0a ┆ User's man. RCSL. 991 10094 ┆
0xb380…b3a0 4d 45 4d 20 36 30 32 2c 20 4d 45 4d 20 36 30 33 20 47 65 6e 65 72 61 6c 20 49 6e 66 6f 72 6d 61 ┆MEM 602, MEM 603 General Informa┆
0xb3a0…b3c0 74 69 6f 6e 09 09 20 20 52 43 53 4c 2e 20 39 39 31 20 31 30 30 38 33 0d 0a 0d 0a 4d 45 4d 20 36 ┆tion RCSL. 991 10083 MEM 6┆
0xb3c0…b3e0 30 32 2c 20 4d 45 4d 20 36 30 33 20 54 65 63 68 6e 69 63 61 6c 20 44 65 73 63 72 69 70 74 69 6f ┆02, MEM 603 Technical Descriptio┆
0xb3e0…b3f6 6e 09 09 20 20 52 43 53 4c 2e 20 39 39 31 20 31 30 30 38 34 0d 0a ┆n RCSL. 991 10084 ┆
0xb3f6…b3f9 FormFeed {
0xb3f6…b3f9 0c 81 a0 ┆ ┆
0xb3f6…b3f9 }
0xb3f9…b3fa 0a ┆ ┆
0xb3fa…b433 Params {
0xb3fa…b433 04 00 2d 4e 0c 00 06 00 00 00 00 02 01 50 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N P1@ ┆
0xb3fa…b433 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4a 4b 55 5f 69 73 7d ff 04 ┆ (08@JKU_iså ┆
0xb3fa…b433 }
0xb433…b46c Params {
0xb433…b46c 04 00 2d 4e 0a 00 06 00 00 00 00 02 01 41 31 40 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ┆ -N A1@ ┆
0xb433…b46c 00 00 00 00 00 00 00 00 08 10 18 20 28 30 38 40 4a 4b 55 5f 69 73 7d ff 04 ┆ (08@JKU_iså ┆
0xb433…b46c }
0xb46c…b480 0a a1 b0 42 2e 20 a1 43 4f 4d 50 4c 45 54 45 20 45 52 52 4f ┆ B. COMPLETE ERRO┆
0xb480…b4a0 52 20 4c 49 53 54 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆R LIST !-------------------┆
0xb4a0…b4c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xb4c0…b4e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 45 ┆--------------------------! ! E┆
0xb4e0…b500 72 72 2e 20 4e 6f 20 21 09 09 09 09 20 20 20 45 72 72 6f 72 20 54 65 78 74 20 20 20 20 20 20 20 ┆rr. No ! Error Text ┆
0xb500…b520 20 20 20 20 20 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !-----------------┆
0xb520…b540 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xb540…b560 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 ┆----------------------------! !┆
0xb560…b580 20 20 20 20 30 20 20 20 20 21 20 4f 4b 09 09 09 09 09 09 09 09 09 09 09 09 20 21 0d 0a 21 2d 2d ┆ 0 ! OK ! !--┆
0xb580…b5a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xb5c0…b5e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-----------! !-------------┆
0xb5e0…b600 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xb620…b640 21 0d 0a 21 20 20 20 20 31 20 20 20 20 21 20 43 68 65 63 6b 73 75 6d 20 54 65 73 74 3a 20 73 75 ┆! ! 1 ! Checksum Test: su┆
0xb640…b660 6d 20 65 72 72 6f 72 20 20 20 20 09 09 09 09 09 09 09 09 09 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d ┆m error ! !--------┆
0xb660…b680 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xb6a0…b6c0 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-----! !-------------------┆
0xb6c0…b6e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xb6e0…b700 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 ┆--------------------------! ! ┆
0xb700…b720 20 20 32 09 20 20 20 21 20 49 6e 69 74 69 61 6c 20 4d 65 6d 6f 72 79 20 54 65 73 74 3a 20 52 41 ┆ 2 ! Initial Memory Test: RA┆
0xb720…b740 4d 20 65 72 72 6f 72 09 09 09 09 09 09 09 09 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆M error ! !------------┆
0xb740…b760 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xb780…b7a0 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-! !-----------------------┆
0xb7a0…b7c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xb7c0…b7e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 32 09 ┆----------------------! ! 2 ┆
0xb7e0…b800 20 20 20 21 20 52 41 4d 20 54 65 73 74 3a 20 52 41 4d 20 65 72 72 6f 72 09 09 09 09 09 09 09 09 ┆ ! RAM Test: RAM error ┆
0xb800…b820 (92,) 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !--------------------------┆
0xb820…b840 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xb840…b860 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d ┆-------------------! !-----┆
0xb860…b880 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xb8a0…b8c0 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 35 20 20 20 20 21 20 50 50 49 20 74 65 73 74 3a ┆--------! ! 5 ! PPI test:┆
0xb8c0…b8e0 20 70 6f 72 74 20 65 72 72 6f 72 20 20 20 20 09 09 09 09 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d ┆ port error ! !---┆
0xb8e0…b900 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xb920…b940 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆----------! !--------------┆
0xb940…b960 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xb960…b980 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 ┆-------------------------------!┆
0xb980…b9a0 0d 0a 21 20 20 20 20 36 20 20 20 20 21 20 50 49 54 20 74 65 73 74 3a 20 6d 69 73 73 69 6e 67 20 ┆ ! 6 ! PIT test: missing ┆
0xb9a0…b9c0 74 69 6d 65 72 20 30 20 69 6e 74 65 72 72 75 70 74 09 09 09 09 09 09 09 20 21 0d 0a 21 2d 2d 2d ┆timer 0 interrupt ! !---┆
0xb9c0…b9e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xba00…ba20 (93,) 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆----------! !--------------┆
0xba20…ba40 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xba40…ba60 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 ┆-------------------------------!┆
0xba60…ba80 0d 0a 21 20 20 20 20 31 31 20 20 20 21 20 52 53 20 34 32 32 20 74 65 73 74 3a 20 52 53 34 32 32 ┆ ! 11 ! RS 422 test: RS422┆
0xba80…baa0 20 43 6c 65 61 72 20 74 6f 20 53 65 6e 64 20 65 72 72 6f 72 09 09 09 09 20 20 20 20 21 0d 0a 21 ┆ Clear to Send error ! !┆
0xbaa0…bac0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbae0…bb00 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-------------! !-----------┆
0xbb00…bb20 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbb40…bb60 2d 2d 21 0d 0a 21 20 20 20 20 31 32 20 20 20 21 20 52 53 20 34 32 32 20 74 65 73 74 3a 20 64 61 ┆--! ! 12 ! RS 422 test: da┆
0xbb60…bb80 74 61 20 65 72 72 6f 72 09 09 09 09 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d ┆ta error ! !-┆
0xbb80…bba0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbbc0…bbe0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆------------! !------------┆
0xbbe0…bc00 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbc20…bc40 2d 21 0d 0a 21 20 20 20 20 31 33 20 20 20 21 20 52 53 20 34 32 32 20 74 65 73 74 3a 20 74 72 61 ┆-! ! 13 ! RS 422 test: tra┆
0xbc40…bc60 6e 73 66 65 72 20 74 69 6d 65 6f 75 74 20 20 20 20 20 09 09 09 09 20 20 20 20 20 21 0d 0a 21 2d ┆nsfer timeout ! !-┆
0xbc60…bc80 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbca0…bcc0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆------------! !------------┆
0xbcc0…bce0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbd00…bd20 2d 21 0d 0a 21 20 20 20 20 31 34 20 20 20 21 20 52 53 20 34 32 32 20 74 65 73 74 3a 20 70 61 72 ┆-! ! 14 ! RS 422 test: par┆
0xbd20…bd40 69 74 79 20 69 6e 74 65 72 72 75 70 74 20 65 72 72 6f 72 09 09 09 09 20 20 20 20 21 0d 0a 21 2d ┆ity interrupt error ! !-┆
0xbd40…bd60 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbd80…bda0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 8c 83 b8 0a 21 2d 2d 2d 2d 2d 2d 2d 2d ┆------------! !--------┆
0xbda0…bdc0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbde0…be00 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 31 35 20 20 20 21 20 50 72 69 6e 74 65 72 20 54 65 73 74 ┆-----! ! 15 ! Printer Test┆
0xbe00…be20 (95,) 3a 20 6d 69 73 73 69 6e 67 20 69 6e 74 65 72 72 75 70 74 09 09 09 09 09 09 09 20 20 21 0d 0a 21 ┆: missing interrupt ! !┆
0xbe20…be40 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbe60…be80 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-------------! !-----------┆
0xbe80…bea0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbec0…bee0 2d 2d 21 0d 0a 21 20 20 20 20 31 36 20 20 20 21 20 50 72 69 6e 74 65 72 20 54 65 73 74 3a 20 70 ┆--! ! 16 ! Printer Test: p┆
0xbee0…bf00 72 69 6e 74 65 72 20 6e 6f 74 20 73 65 6c 65 63 74 65 64 09 09 09 09 09 09 09 20 20 21 0d 0a 21 ┆rinter not selected ! !┆
0xbf00…bf20 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbf40…bf60 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-------------! !-----------┆
0xbf60…bf80 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xbfa0…bfc0 2d 2d 3b 0d 0a 21 20 20 20 20 31 37 20 20 20 21 20 50 72 69 6e 74 65 72 20 54 65 73 74 3a 20 70 ┆--; ! 17 ! Printer Test: p┆
0xbfc0…bfe0 72 69 6e 74 65 72 20 62 75 73 79 09 09 09 09 09 09 09 09 09 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d ┆rinter busy ! !-------┆
0xbfe0…c000 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc020…c040 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆------! !------------------┆
0xc040…c060 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc060…c080 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 ┆---------------------------! ! ┆
0xc080…c0a0 20 20 20 32 30 20 20 20 21 20 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a ┆ 20 ! MEM 60X Test: Subtest:┆
0xc0a0…c0c0 20 6e 20 2d 20 52 41 4d 20 65 72 72 6f 72 09 09 09 09 09 09 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d ┆ n - RAM error ! !------┆
0xc0c0…c0e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc100…c120 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-------! !-----------------┆
0xc120…c140 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc140…c160 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 ┆----------------------------! !┆
0xc160…c180 20 20 20 20 32 31 20 20 20 21 20 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 ┆ 21 ! MEM 60X Test: Subtest┆
0xc180…c1a0 3a 20 6e 20 2d 20 43 6f 75 6c 64 20 6e 6f 74 20 72 65 73 65 74 20 52 41 4d 20 20 20 20 20 20 20 ┆: n - Could not reset RAM ┆
0xc1a0…c1c0 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !---------------┆
0xc1c0…c1e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc1e0…c200 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d ┆------------------------------! ┆
0xc200…c220 (97,) 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ !--------------------------┆
0xc220…c240 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc240…c260 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 32 32 20 20 20 ┆-------------------! ! 22 ┆
0xc260…c280 21 20 4d 45 4d 20 36 30 58 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 35 20 2d 20 64 61 74 ┆! MEM 60X Test: Subtest: 5 - dat┆
0xc280…c2a0 61 20 63 6f 72 72 65 63 74 69 6f 6e 20 65 72 72 6f 72 20 20 20 20 20 20 20 20 20 20 20 20 20 09 ┆a correction error ┆
0xc2a0…c2c0 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !------------------------┆
0xc2c0…c2e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc2e0…c300 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d ┆---------------------! !---┆
0xc300…c320 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc340…c360 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 32 33 20 20 20 21 20 4d 45 4d 20 36 30 58 ┆----------! ! 23 ! MEM 60X┆
0xc360…c380 20 54 65 73 74 3a 20 53 75 62 74 65 73 74 3a 20 36 20 2d 20 65 72 72 6f 72 20 64 65 74 65 63 74 ┆ Test: Subtest: 6 - error detect┆
0xc380…c3a0 69 6f 6e 20 65 72 72 6f 72 20 20 20 20 20 09 09 09 09 09 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d ┆ion error ! !--------┆
0xc3a0…c3c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc3e0…c400 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-----! !-------------------┆
0xc400…c420 (98,) 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc420…c440 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 ┆--------------------------! ! ┆
0xc440…c460 20 20 32 35 20 20 20 21 20 49 4f 20 69 6e 74 65 72 72 75 70 74 20 74 65 73 74 3a 20 6d 69 73 73 ┆ 25 ! IO interrupt test: miss┆
0xc460…c480 69 6e 67 20 69 6e 74 65 72 72 75 70 74 09 09 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d ┆ing interrupt ! !-------┆
0xc480…c4a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc4c0…c4e0 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆------! !------------------┆
0xc4e0…c500 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc500…c520 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 ┆---------------------------! ! ┆
0xc520…c540 20 20 20 32 36 20 20 20 21 20 49 4f 20 69 6e 74 65 72 72 75 70 74 20 74 65 73 74 3a 20 63 61 6e ┆ 26 ! IO interrupt test: can┆
0xc540…c560 6e 6f 74 20 72 65 73 65 74 20 69 6e 74 65 72 72 75 70 74 09 09 09 09 20 20 20 20 21 0d 0a 21 2d ┆not reset interrupt ! !-┆
0xc560…c580 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc5a0…c5c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆------------! !------------┆
0xc5c0…c5e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc600…c620 (99,) 2d 21 0d 0a 21 20 20 20 20 32 37 20 20 20 21 20 54 69 6d 65 6f 75 74 20 69 6e 74 65 72 72 75 70 ┆-! ! 27 ! Timeout interrup┆
0xc620…c640 74 20 74 65 73 74 3a 20 6d 69 73 73 69 6e 67 20 69 6e 74 65 72 72 75 70 74 09 09 09 09 20 20 20 ┆t test: missing interrupt ┆
0xc640…c660 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !---------------------------┆
0xc660…c680 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc680…c6a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d ┆------------------! !------┆
0xc6a0…c6c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc6e0…c700 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 32 38 20 20 20 21 20 54 69 6d 65 6f 75 74 20 69 6e ┆-------! ! 28 ! Timeout in┆
0xc700…c720 74 65 72 72 75 70 74 20 74 65 73 74 3a 20 63 61 6e 6e 6f 74 20 72 65 73 65 74 20 69 6e 74 65 72 ┆terrupt test: cannot reset inter┆
0xc720…c740 72 75 70 74 09 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆rupt ! !-----------------┆
0xc740…c760 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc760…c780 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d ┆----------------------------! ┆
0xc780…c7a0 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ !----------------------------┆
0xc7a0…c7c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc7c0…c7e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 33 30 20 20 20 21 20 ┆-----------------! ! 30 ! ┆
0xc7e0…c800 52 54 43 20 74 65 73 74 3a 20 49 20 54 68 69 6e 6b 20 69 74 20 69 73 3a 20 73 74 61 74 75 73 20 ┆RTC test: I Think it is: status ┆
0xc800…c820 (100,) 65 72 72 6f 72 09 09 20 20 20 09 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆error ! !------------┆
0xc820…c840 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc860…c864 2d 21 0d 0a ┆-! ┆
0xc864…c867 FormFeed {
0xc864…c867 0c 83 d0 ┆ ┆
0xc864…c867 }
0xc867…c880 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ !-------------------┆
0xc880…c8a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc8a0…c8c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 ┆--------------------------! ! ┆
0xc8c0…c8e0 20 20 33 31 20 20 20 21 20 52 54 43 20 74 65 73 74 3a 20 69 20 54 68 69 6e 6b 20 69 74 20 69 73 ┆ 31 ! RTC test: i Think it is┆
0xc8e0…c900 3a 20 72 65 61 64 20 65 72 72 6f 72 09 09 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d ┆: read error ! !--------┆
0xc900…c920 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xc940…c960 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-----! !-------------------┆
0xc960…c980 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xc980…c9a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 ┆--------------------------! ! ┆
0xc9a0…c9c0 20 20 34 30 20 20 20 21 20 44 69 73 63 20 43 68 61 6e 6e 65 6c 20 74 65 73 74 3a 20 74 72 61 6e ┆ 40 ! Disc Channel test: tran┆
0xc9c0…c9e0 73 66 65 72 20 74 69 6d 65 6f 75 74 20 6f 72 20 69 6e 74 65 72 72 75 70 74 20 6d 69 73 73 69 6e ┆sfer timeout or interrupt missin┆
0xc9e0…ca00 67 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆g ! !---------------------┆
0xca00…ca20 (101,) 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xca20…ca40 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 ┆------------------------! !┆
0xca40…ca60 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xca80…caa0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 34 31 20 20 20 21 20 44 69 73 63 ┆-------------! ! 41 ! Disc┆
0xcaa0…cac0 20 43 68 61 6e 6e 65 6c 20 74 65 73 74 3a 20 64 69 73 63 20 64 69 61 67 6e 6f 73 74 69 63 20 65 ┆ Channel test: disc diagnostic e┆
0xcac0…cae0 72 72 6f 72 09 09 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d ┆rror ! !-------┆
0xcae0…cb00 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xcb20…cb40 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆------! !------------------┆
0xcb40…cb60 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xcb60…cb80 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 ┆---------------------------! ! ┆
0xcb80…cba0 20 20 20 34 32 20 20 20 21 20 44 69 73 63 20 43 68 61 6e 6e 65 6c 20 74 65 73 74 3a 20 64 69 73 ┆ 42 ! Disc Channel test: dis┆
0xcba0…cbc0 63 20 63 6f 6d 6d 61 6e 64 20 65 72 72 6f 72 09 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆c command error ┆
0xcbc0…cbe0 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !---------------------┆
0xcbe0…cc00 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xcc00…cc20 (102,) 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 ┆------------------------! !┆
0xcc20…cc40 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xcc60…cc80 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 34 33 20 20 20 21 20 44 69 73 63 ┆-------------! ! 43 ! Disc┆
0xcc80…cca0 20 43 68 61 6e 6e 65 6c 20 74 65 73 74 3a 20 64 69 73 63 20 63 68 61 6e 6e 65 6c 20 65 72 72 6f ┆ Channel test: disc channel erro┆
0xcca0…ccc0 72 09 09 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆r ! !----------┆
0xccc0…cce0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xcd00…cd20 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆---! !---------------------┆
0xcd20…cd40 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xcd40…cd60 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 ┆------------------------! ! ┆
0xcd60…cd80 34 35 20 20 20 21 20 4d 42 20 6f 75 74 20 69 6e 74 65 72 72 75 70 74 20 74 65 73 74 3a 20 6d 69 ┆45 ! MB out interrupt test: mi┆
0xcd80…cda0 73 73 69 6e 67 20 69 6e 74 65 72 72 75 70 74 09 09 20 20 20 20 09 20 20 20 20 20 21 0d 0a 21 2d ┆ssing interrupt ! !-┆
0xcda0…cdc0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xcde0…ce00 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆------------! !------------┆
0xce00…ce20 (103,) 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xce40…ce60 2d 21 0d 0a 21 20 20 20 20 34 36 20 20 20 21 20 4d 42 20 6f 75 74 20 69 6e 74 65 72 72 75 70 74 ┆-! ! 46 ! MB out interrupt┆
0xce60…ce80 20 74 65 73 74 3a 20 63 61 6e 6e 6f 74 20 72 65 73 65 74 20 69 6e 74 65 72 72 75 70 74 20 09 09 ┆ test: cannot reset interrupt ┆
0xce80…cea0 09 09 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !-----------------------┆
0xcea0…cec0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xcec0…cee0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d ┆----------------------! !--┆
0xcee0…cf00 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xcf20…cf40 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 35 30 20 20 20 21 20 38 30 32 38 37 20 ┆-----------! ! 50 ! 80287 ┆
0xcf40…cf60 4e 50 58 20 74 65 73 74 3a 20 38 30 32 38 37 20 6e 6f 74 20 4f 4b 20 20 20 20 20 20 20 09 09 20 ┆NPX test: 80287 not OK ┆
0xcf60…cf80 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !--------------┆
0xcf80…cfa0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xcfa0…cfc0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 ┆-------------------------------!┆
0xcfc0…cfe0 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ !-------------------------┆
0xcfe0…d000 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd000…d020 (104,) 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 36 30 20 20 ┆--------------------! ! 60 ┆
0xd020…d040 20 21 20 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 74 65 73 74 3a 20 74 72 61 6e 73 66 65 ┆ ! Winchester disk test: transfe┆
0xd040…d060 72 20 74 69 6d 65 6f 75 74 20 6f 72 20 69 6e 74 65 72 72 75 70 74 20 6d 69 73 73 69 6e 67 20 20 ┆r timeout or interrupt missing ┆
0xd060…d080 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !-----------------------┆
0xd080…d0a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd0a0…d0c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d ┆----------------------! !--┆
0xd0c0…d0e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xd100…d120 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 36 31 20 20 20 21 20 57 69 6e 63 68 65 ┆-----------! ! 61 ! Winche┆
0xd120…d140 73 74 65 72 20 64 69 73 6b 20 74 65 73 74 3a 20 64 69 73 6b 20 63 6f 6d 6d 61 6e 64 20 65 72 72 ┆ster disk test: disk command err┆
0xd140…d160 6f 72 20 20 09 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 ┆or ! !┆
0xd160…d180 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xd1a0…d1c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-------------! !-----------┆
0xd1c0…d1e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xd200…d220 (105,) 2d 2d 21 0d 0a 21 20 20 20 20 36 32 20 20 20 21 20 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b ┆--! ! 62 ! Winchester disk┆
0xd220…d240 20 74 65 73 74 3a 20 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 63 61 6e 20 6e 6f 74 20 72 ┆ test: Winchester disk can not r┆
0xd240…d260 65 61 64 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ead ! !---------┆
0xd260…d280 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
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0xd2a0…d2c0 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 8c 83 c8 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆----! !----------------┆
0xd2c0…d2e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd2e0…d300 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a ┆-----------------------------! ┆
0xd300…d320 21 20 20 20 20 36 33 20 20 20 21 20 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 74 65 73 74 ┆! 63 ! Winchester disk test┆
0xd320…d340 3a 20 57 69 6e 63 68 65 73 74 65 72 20 64 69 73 6b 20 63 61 6e 20 6e 6f 74 20 77 72 69 74 65 20 ┆: Winchester disk can not write ┆
0xd340…d360 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !----------------------┆
0xd360…d380 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd380…d3a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d ┆-----------------------! !-┆
0xd3a0…d3c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
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0xd3e0…d400 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 36 34 20 20 20 21 20 57 69 6e 63 68 ┆------------! ! 64 ! Winch┆
0xd400…d420 (106,) 65 73 74 65 72 20 64 69 73 6b 20 74 65 73 74 3a 20 62 61 64 20 74 65 73 74 20 73 65 63 74 6f 72 ┆ester disk test: bad test sector┆
0xd420…d440 09 09 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !--------------------┆
0xd440…d460 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd460…d480 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a ┆-------------------------! ┆
0xd480…d4a0 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆!-------------------------------┆
0xd4a0…d4c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd4c0…d4e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 38 30 20 20 20 21 20 46 6c 6f ┆--------------! ! 80 ! Flo┆
0xd4e0…d500 70 70 79 20 74 65 73 74 3a 20 74 72 61 6e 73 66 65 72 20 74 69 6d 65 6f 75 74 09 09 09 20 20 20 ┆ppy test: transfer timeout ┆
0xd500…d520 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !----------------┆
0xd520…d540 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd540…d560 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a ┆-----------------------------! ┆
0xd560…d580 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ !---------------------------┆
0xd580…d5a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd5a0…d5c0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 38 31 20 20 20 21 ┆------------------! ! 81 !┆
0xd5c0…d5e0 20 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 66 6c 6f 70 70 79 20 63 6f 6d 6d 61 6e 64 20 65 72 72 ┆ Floppy test: floppy command err┆
0xd5e0…d600 6f 72 20 20 09 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 ┆or ! !┆
0xd600…d620 (107,) 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xd640…d660 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-------------! !-----------┆
0xd660…d680 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
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0xd6a0…d6c0 2d 2d 21 0d 0a 21 20 20 20 20 38 32 20 20 20 21 20 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 66 6c ┆--! ! 82 ! Floppy test: fl┆
0xd6c0…d6e0 6f 70 70 79 20 63 61 6e 20 6e 6f 74 20 72 65 61 64 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 ┆oppy can not read ┆
0xd6e0…d700 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !---------┆
0xd700…d720 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xd740…d760 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆----! !--------------------┆
0xd760…d780 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd780…d7a0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 ┆-------------------------! ! ┆
0xd7a0…d7c0 20 38 33 20 20 20 21 20 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 66 6c 6f 70 70 79 20 63 61 6e 20 ┆ 83 ! Floppy test: floppy can ┆
0xd7c0…d7e0 6e 6f 74 20 77 72 69 74 65 20 20 20 09 09 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d ┆not write ! !--------┆
0xd7e0…d800 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xd820…d840 2d 2d 2d 2d 2d 21 0d 0a 0d 0a 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆-----! !-------------------┆
0xd840…d860 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd860…d880 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 ┆--------------------------! ! ┆
0xd880…d8a0 20 20 38 34 20 20 20 21 20 46 6c 6f 70 70 79 20 74 65 73 74 3a 20 62 61 64 20 73 65 63 74 6f 72 ┆ 84 ! Floppy test: bad sector┆
0xd8a0…d8c0 09 09 09 09 09 09 20 20 20 20 21 0d 0a 21 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ ! !------------------┆
0xd8c0…d8e0 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
0xd8e0…d8fe 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 21 0d 0a ┆---------------------------! ┆
0xd8fe…d901 FormFeed {
0xd8fe…d901 0c 82 88 ┆ ┆
0xd8fe…d901 }
0xd901…d920 0a 0d 0a 0a 0a 0a 0a 0a 0a 1a 1a 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆ --------------------┆
0xd920…d940 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d 2d ┆--------------------------------┆
[…0x1…]
0xd960…d980 2d 2d 2d 2d 2d 21 0d 0a 21 20 20 20 20 31 35 20 20 20 21 20 50 72 69 6e 74 65 72 20 54 65 73 74 ┆-----! ! 15 ! Printer Test┆