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Length: 2960 (0xb90)
Types: EM, TextFile
Names: »SEQ_ADR_STARTS_TESTS.EM«
└─⟦24d56d853⟧ Bits:30000744 8mm tape, Rational 1000, DFS, D_12_6_5 SEQ293
└─⟦this⟧ »SEQ_ADR_STARTS_TESTS.EM«
└─⟦9031b0687⟧ Bits:30000407 8mm tape, Rational 1000, DFS, D_12_7_3
└─⟦this⟧ »SEQ_ADR_STARTS_TESTS.EM«
[write]
[write,Testing,Sequencer,Board,Tile,13,,-,,Seq_adr_starts_tests]
[write]
[xeq seq clr_break_mask]
[xeq seq validate_all_ll]
[xeq seq prep_tos_tl_lw]
[set experiment_result [xeq seq tos_tl_fru]]
[eq,[arg 1,[var experiment_result]],false]
[FAIL_MESSAGE TOS_register_test_1]
[set num_fails [add,[var num_fails],1]]
[write [ASCII,7]]
[NAME_MESSAGE clr_break_mask]
[NAME_MESSAGE validate_all_ll]
[NAME_MESSAGE prep_tos_tl_lw]
[NAME_MESSAGE TOS_tl_fru][write]
[else]
[PASS_MESSAGE TOS_register_test_1]
[end]
[xeq seq prep_tos_pf_1_lw]
[set experiment_result [xeq seq tos_pf_1_fru]]
[eq,[arg 1,[var experiment_result]],false]
[FAIL_MESSAGE TOS_register_test_2]
[set num_fails [add,[var num_fails],1]]
[write [ASCII,7]]
[NAME_MESSAGE prep_tos_pf_1_lw]
[NAME_MESSAGE TOS_pf_1_fru][write]
[else]
[PASS_MESSAGE TOS_register_test_2]
[end]
[xeq seq prep_tos_pf_2_lw]
[xeq seq prep_tos_pf_2a]
[set experiment_result [xeq seq tos_pf_2_a_fru]]
[eq,[arg 1,[var experiment_result]],false]
[FAIL_MESSAGE TOS_register_test_3]
[set num_fails [add,[var num_fails],1]]
[write [ASCII,7]]
[NAME_MESSAGE prep_tos_pf_2_lw]
[NAME_MESSAGE prep_tos_pf_2a]
[NAME_MESSAGE TOS_pf_2_a_fru][write]
[else]
[PASS_MESSAGE TOS_register_test_3]
[end]
[xeq seq prep_tos_pf_2b]
[set experiment_result [xeq seq tos_pf_2_b_fru]]
[eq,[arg 1,[var experiment_result]],false]
[FAIL_MESSAGE TOS_register_test_4]
[set num_fails [add,[var num_fails],1]]
[write [ASCII,7]]
[NAME_MESSAGE prep_tos_pf_2b]
[NAME_MESSAGE TOS_pf_2_b_fru][write]
[else]
[PASS_MESSAGE TOS_register_test_4]
[end]
[xeq seq prep_cntrl_read_pred]
[set experiment_result [xeq seq cntrl_read_pred_fru]]
[eq,[arg 1,[var experiment_result]],false]
[FAIL_MESSAGE control_predecessor_dispatch_test]
[set num_fails [add,[var num_fails],1]]
[write [ASCII,7]]
[NAME_MESSAGE prep_cntrl_read_pred]
[NAME_MESSAGE cntrl_read_pred_fru][write]
[else]
[PASS_MESSAGE control_predecessor_dispatch_test]
[end]
[xeq seq prep_mpc_po_lw]
[xeq seq prep_mpc_po_1]
[set experiment_result [xeq seq mpc_po_1_fru]]
[eq,[arg 1,[var experiment_result]],false]
[FAIL_MESSAGE dispatch_branch_macro_instruction_test_1]
[set num_fails [add,[var num_fails],1]]
[write [ASCII,7]]
[NAME_MESSAGE prep_mpc_po_lw]
[NAME_MESSAGE prep_mpc_po_1]
[NAME_MESSAGE mpc_po_1_fru][write]
[else]
[PASS_MESSAGE dispatch_branch_macro_instruction_test_1]
[end]
[xeq seq prep_mpc_po_2]
[set experiment_result [xeq seq mpc_po_2_fru]]
[eq,[arg 1,[var experiment_result]],false]
[FAIL_MESSAGE dispatch_branch_macro_instruction_test_2]
[set num_fails [add,[var num_fails],1]]
[write [ASCII,7]]
[NAME_MESSAGE prep_mpc_po_2]
[NAME_MESSAGE mpc_po_2_fru][write]
[else]
[PASS_MESSAGE dispatch_branch_macro_instruction_test_2]
[end]